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MAX3761EEPMAXINN/a656avaiLow-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANs
MAX3761EEPN/a75avaiLow-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANs
MAX3761EEPMAXIMN/a450avaiLow-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANs
MAX3762EEPMAXIMN/a8avaiLow-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANs


MAX3761EEP ,Low-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANsApplications tested and guaranteed only at T = +25°C.A622Mbps LAN/ATM LAN Receivers155Mbps LAN/ATM ..
MAX3761EEP ,Low-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANsapplications. Interface Logic—MAX3766An integrated power detector senses the input signal’samplitud ..
MAX3761EEP ,Low-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANsELECTRICAL CHARACTERISTICS(V = +4.5V to +5.5V, DISABLE = low, T = -40°C to +85°C, unless otherwise ..
MAX3761EEP+ ,Low-Power, 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANsApplicationstested and guaranteed only at T = +25°C.A+Denotes a lead-free/RoHS-compliant package.62 ..
MAX3762EEP ,Low-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANsFeaturesThe MAX3761/MAX3762 limiting amplifiers, with 4mV' Chatter-Free Power Detector with Program ..
MAX3762EEP+ ,Low-Power, 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANsFeaturesThe MAX3761/MAX3762 limiting amplifiers, with 4mV♦♦ Chatter-Free Power Detector with Progra ..
MAX734CPA ,+12V, 120mA Flash Memory Programming Supply
MAX734CPA ,+12V, 120mA Flash Memory Programming Supply
MAX734CPA ,+12V, 120mA Flash Memory Programming Supply
MAX734CPA+ ,12V, 120mA Flash Memory Programming Supply
MAX734CSA ,+12V, 120mA Flash Memory Programming Supply
MAX734CSA ,+12V, 120mA Flash Memory Programming Supply


MAX3761EEP-MAX3762EEP
Low-Power / 622Mbps Limiting Amplifiers with Chatter-Free Power Detect for LANs
_______________General Description
The MAX3761/MAX3762 limiting amplifiers, with 4mV
sensitivity and PECL data outputs, are optimized for
operation in low-cost, 622Mbps, LAN/ATM LAN fiber
optics applications.
An integrated power detector senses the input signal’s
amplitude. A received-signal-strength indicator (RSSI)
gives an analog indication of the power level, while the
complementary loss-of-signal (LOS) outputs indicate if
the input power level exceeds the programmed
threshold level. The LOS threshold can be adjusted to
detect signal amplitudes between 3mVp-p and
100mVp-p, providing a 15dB LOS adjustment in fiber
optic receivers. The LOS outputs have 3.5dB of
hysteresis, which prevents chatter when input signal
levels are small. The MAX3761’s LOS outputs are com-
patible with TTL-logic levels. The MAX3762 has PECL
LOS outputs.
DISABLE and LOS can be used to implement a squelch
function, which turns off the data outputs when the
input signal is below the programmed threshold.
________________________Applications

622Mbps LAN/ATM LAN Receivers
155Mbps LAN/ATM LAN Receivers
____________________________Features
Chatter-Free Power Detector with Programmable
Loss-of-Signal Outputs
4mV Input Sensitivity (PECL Loss-of-Signal
Interface Logic—MAX3766
PECL Data OutputsSingle 5V Power Supply250ps Output Edge SpeedLow 15ps Pulse-Width DistortionTTL Loss-of-Signal Interface Logic—MAX3761
MAX3761/MAX3762, 622Mbps LimitingAmplifiers
with Chatter-Free Power Detect for LANs
________________________________________________________________Maxim Integrated Products1
_________Typical Operating Circuits
& the latest literature: http://,
__________________Pin Configuration
MAX3761/MAX3762
Low-Power, 622Mbps Limiting Amplifiers
with Chatter-Free Power Detect for LANs_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS

(VCC= +4.5V to +5.5V, DISABLE = low, TA= -40°C to +85°C, unless otherwise noted. Typical values are at VCC= +5.0V, TA= +25°C.)
(Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1:
Dice are tested at TA = +25°C.
Note 2:
Outputs terminated with 50Ωto VCC- 2V.
Note 3:
Voltage measurements are relative to VCC.
VCC, VCCO............................................................-0.5V to +7.0V
FILTER, RSSI, EN, VIN+, VIN-, CZP, CZN,
DISABLE, LOS+, LOS-, INV, VTH...............-0.5V to (VCC+ 0.5V)
PECL Output Current (OUT+, OUT-, LOS+, LOS-) ............50mA
Continuous Power Dissipation (TA= +85°C)
QSOP (derate 8.3mW/°C above +70°C).......................667mW
Operating Junction Temperature Range...........-40°C to +150°C
Processing Temperature (die).........................................+400°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10sec).............................+300°C
MAX3761/MAX3762
Low-Power, 622Mbps Limiting Amplifiers
with Chatter-Free Power Detect for LANs
_______________________________________________________________________________________3
AC ELECTRICAL CHARACTERISTICS

(VCC= +4.5V to +5.5V, PECL outputs terminated with 50Ωto VCC- 2V, input 4mV to 2Vp-p, TA= -40°C to +85°C, unless otherwise
noted. Typical values are at VCC= +5.0V, TA = +25°C.) (Note 5)
Note 5:
AC parameters are guaranteed by design and characterization.
Note 6:
Input signal is a 1-0 pattern, 622Mbps.
Note 7:
PWD = [(width of wider pulse) - (width of narrower pulse)] / 2.
__________________________________________Typical Operating Characteristics

(MAX3761/MAX3762 EV kit, VCC= +5.0V, PECL outputs terminated with 50Ωto VCC- 2V, input is a 1-0 pattern, 622Mbps, TA= +25°C,
unless otherwise noted.)
MAX3762
SUPPLY CURRENT vs. TEMPERATURE
MAX3761/62-01
AMBIENT TEMPERATURE (°C)
CURRENT (mA)10010001
INPUT SIGNAL (mVp-p)
RSSI VOLTAGE (V)
RSSI vs. INPUT AMPLITUDE
AND DATA PATTERN
MAX3761/62-02
RSSI vs.
INPUT POWER AND FREQUENCY
MAX3761/62-03
INPUT POWER (dBm)
RSSI VOLTAGE (V)
1.80
MAX3761/MAX3762
Low-Power, 622Mbps Limiting Amplifiers
with Chatter-Free Power Detect for LANs_______________________________________________________________________________________

RSSI vs. TEMPERATURE
(622Mbps 223 - 1 PRBS)
MAX3761/62-04
AMBIENT TEMPERATURE (°C)
RSSI VOLTAGE (V)
LOS HYSTERESIS vs. TEMPERATURE
(622Mbps 223 - 1 PRBS PATTERN)
MAX3761/62-05
AMBIENT TEMPERATURE (°C)
HYSTERESIS (dB)
LOS HYSTERESIS vs. TEMPERATURE
(622Mbps 1-0 PATTERN)
MAX3761/62-06
AMBIENT TEMPERATURE (°C)
HYSTERESIS (dB)
DATA OUTPUT LEVELS
(REFERENCE TO VCC)
MAX3761/62-07
AMBIENT TEMPERATURE (°C)
VOLTAGE (V)
INPUT SIGNAL (Vp-p)
DIFFERENTIAL OUTPUT (mV)
0.1m
DIFFERENTIAL OUTPUT
vs. INPUT AMPLITUDE
MAX3761/62-08
INPUT SIGNAL (Vp-p)
PULSE-WIDTH DISTORTION (PS)
PULSE-WIDTH DISTORTION
(622Mbps DATA RATE)

MAX3761/62-09
____________________________Typical Operating Characteristics (continued)

(MAX3761/MAX3762 EV kit, VCC= +5.0V, PECL outputs terminated with 50Ωto VCC- 2V, input is a 1-0 pattern, 622Mbps, TA= +25°C,
unless otherwise noted.)
MAX3761/MAX3762
Low-Power, 622Mbps Limiting Amplifiers
with Chatter-Free Power Detect for LANs
_______________________________________________________________________________________5
____________________________Typical Operating Characteristics (continued)

(MAX3761/MAX3762 EV kit, VCC= +5.0V, PECL outputs terminated with 50Ωto VCC- 2V, input is a 1-0 pattern, 622Mbps, TA= +25°C,
unless otherwise noted.)
______________________________________________________________Pin Description

FREQUENCY ON POWER SUPPLY (Hz)
RANDOM JITTER (ps rms)
RANDOM JITTER vs.
POWER-SUPPLY NOISE FREQUENCY

MAX3761/62-15
MAX3761/MAX3762
Low-Power, 622Mbps Limiting Amplifiers
with Chatter-Free Power Detect for LANs_______________________________________________________________________________________
_______________Detailed Description

Figure 1 shows the functional diagram for the MAX3761/
MAX3762. The input signal is applied to VIN+ and VIN-.
A chain of amplifier stages, each contributing approxi-
mately 12.5dB of gain, amplifies the input signal to
PECL output voltage swings. A 4mVp-p input signal will
cause the output to fully limit.
Received-Signal-Strength
Indicator (RSSI)

Each amplifier stage contains a full-wave logarithmic
detector (FWD). The full-wave detector outputs are
summed at the FILTER pin and used to generate the
received-signal-strength indication (RSSI). The RSSI
output voltage is linearly proportional to the input power
(in decibels), and is approximated by:
where VINis the peak-to-peak input signal in millivolts.
The RSSI output is insensitive to fluctuations in temperature
and supply voltage. The power detector functions as a
broadband power meter that detects the total power of all
signals present in the passband of approximately 750MHz.
Refer to the Typical Operating Characteristicsgraphs show-
ing RSSI output versus input power and signal amplitude.
The high-speed RSSI signal is filtered with one external
capacitor connected from FILTER to VCC. The imped-
ance at the FILTER pin is approximately 500Ω.
The FILTER capacitor (CFILTER) must be connected
to VCCfor proper operation.
Input-Offset Correction

The limiting amplifier provides approximately 60dB of
gain. An input DC offset of even 1mV reduces the
power-detection circuit’s accuracy and can cause the
output to limit. A low-frequency feedback loop is inte-
grated into the MAX3761/MAX3762 to remove input off-
set. DC coupling the inputs is not recommended, as
this prevents the DC-offset-correction circuitry from
functioning properly. Input offset is typically reduced to
less than 100µV.
The capacitance between pins CZP and CZN, in parallel
with a 10pF integrated capacitance, determines the off-
set-correction circuit’s time constant. The input imped-
ance between CZP and CZN is approximately 800kΩ.
The offset correction circuitry requires an average data-
input duty cycle of 50%. If the input data has a different
average duty cycle, the output will have increased
pulse-width distortion.
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