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MAX3280EAUK+N/AN/a2500avai±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
MAX3280EAUK+TMAXIMN/a4000avai±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
MAX3281EAUT+N/AN/a2500avai±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
MAX3283EAUT+N/AN/a4000avai±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
MAX3283EAUT+ |MAX3283EAUTMAXIMN/a1104avai±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
MAX3283EAUT+TN/AN/a2500avai±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
MAX3284EAUT+T |MAX3284EAUTTMAXIMN/a1867avai±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers


MAX3283EAUT+ ,±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receiversfeatures a voltage logic pin that allows compatibility with ● Three-State Output Stage (MAX3281E/MA ..
MAX3283EAUT+ ,±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe ReceiversApplicationsMAX3280EAUK+T -40°C to +125°C 5 SOT23 +ADVM● Clock DistributionMAX3280EAUK/V+T -40°C to ..
MAX3283EAUT+T ,±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe ReceiversFeaturesThe MAX3280E/MAX3281E/MAX3283E/MAX3284E are ● ESD Protection: single receivers designed for ..
MAX3284EAUT+T ,±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe ReceiversApplicationsMAX3280EAUK+T -40°C to +125°C 5 SOT23 +ADVM● Clock DistributionMAX3280EAUK/V+T -40°C to ..
MAX3286CHJ ,3.0V to 5.5V / 1.25Gbps/2.5Gbps LAN Laser Driversfeatures**Exposed pad.include dual enable inputs, dual shutdown circuits, and***Package Code: G2855 ..
MAX3286CTI+ ,3.0V to 5.5V, 1.25Gbps/2.5Gbps LAN Laser Driversfeatures. Automatic power control Selectable Laser Pinning (Common Cathode or(APC) adjusts the las ..
MAX693CPE ,Microprocessor Supervisory CircuitsFeatures . Precision Voltage Monitor 4.65V in MAX690, MAX691, MAX694 and MAX695 4.40V in MAX69 ..
MAX693CWE ,Microprocessor supervisory circuit.Features . Precision Voltage Monitor 4.65V in MAX690, MAX691, MAX694 and MAX695 4.40V in MAX69 ..
MAX693CWE+ ,Microprocessor Supervisory CircuitsGeneral Description Beneits and
MAX693CWE-T ,Microprocessor Supervisory CircuitsApplicationsthan +5V.● ComputersThe MAX691, MAX693, and MAX695 are supplied in 16-pin ● Controllers ..
MAX693EJE ,Microprocessor Supervisory CircuitsGeneral Description The MAX690 Family of supervisory circuits reduce the complexity and number ..
MAX693EWE ,Microprocessor Supervisory CircuitsFeatures . Precision Voltage Monitor 4.65V in MAX690, MAX691, MAX694 and MAX695 4.40V in MAX69 ..


MAX3280EAUK+-MAX3280EAUK+T-MAX3281EAUT+-MAX3283EAUT+-MAX3283EAUT+T-MAX3284EAUT+T
±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23 RS-485/RS-422 True Fail-Safe Receivers
Pin Configurations appear at end of data sheet.
General Description

The MAX3280E/MAX3281E/MAX3283E/MAX3284E are
single receivers designed for RS-485 and RS-422 com-
munication. These devices guarantee data rates up to
52Mbps, even with a 3V power supply. Excellent propaga-
tion delay (15ns max) and package-to-package skew time
(8ns max) make these devices ideal for multidrop clock
distribution applications.
The MAX3280E/MAX3281E/MAX3283E/MAX3284E
have true fail-safe circuitry, which guarantees a logic-high
receiver output when the receiver inputs are opened
or shorted. The receiver output will be a logic high if
all transmitters on a terminated bus are disabled (high
impedance). These devices feature 1/4-unit-load receiver
input impedance, allowing up to 128 receivers on the
same bus.
The MAX3280E is a single receiver available in a 5-pin
SOT23 package. The MAX3281E/MAX3283E single
receivers have a receiver enable (EN or EN) function and
are offered in a 6-pin SOT23 package. The MAX3284E
features a voltage logic pin that allows compatibility with
low-voltage logic levels, as in digital FPGAs/ASICs. On
the MAX3284E, the voltage threshold for a logic high
is user-defined by setting VL in the range from 1.65V to
VCC. The MAX3284E is also offered in a 6-pin SOT23
package.
Applications
●Clock Distribution●Telecom Racks●Base Stations●Industrial Control●Local Area Networks
Features
●ESD Protection: ±15kV Human Body Model ±6kV IEC 1000-4-2, Contact Discharge ±12kV IEC 1000-4-2, Air-Gap Discharge●Guaranteed 52Mbps Data Rate●Guaranteed 15ns Receiver Propagation Delay●Guaranteed 2ns Receiver Skew●Guaranteed 8ns Package-to-Package Skew Time●VL Pin for Connection to FPGAs/ASICs●Allow Up to 128 Transceivers on the Bus
(1/4-unit-load)●Tiny SOT23 Package●True Fail-Safe Receiver●-7V to +12V Common-Mode Range●3V to 5.5V Power-Supply Range●Enable (High and Low) Pins for Redundant Operation●Three-State Output Stage (MAX3281E/MAX3283E)●Thermal Protection Against Output Short Circuit
Note 1:
MAX3284E data rate is dependent on VL.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
/V denotes an automotive qualified part.
PARTVLENABLEDATA RATEPACKAGE

MAX3280E——52Mbps5-Pin SOT23
MAX3281E—Active High52Mbps6-Pin SOT23
MAX3283E—Active Low52Mbps6-Pin SOT23
MAX3284E✔—52Mbps (Note 1)6-Pin SOT23
PARTTEMP RANGEPIN-
PACKAGE
TOP
MARK
MAX3280EAUK+T
-40°C to +125°C5 SOT23+ADVM
MAX3280EAUK/V+T-40°C to +125°C5 SOT23+AFME
MAX3281EAUT+T
-40°C to +125°C6 SOT23+ABAT
MAX3283EAUT+T
-40°C to +125°C6 SOT23+ABAU
MAX3284EAUT+T
-40°C to +125°C6 SOT23+ABAV
MAX3280E/MAX3281E/
MAX3283E/MAX3284E
±15kV ESD-Protected 52Mbps, 3V to 5.5V,
SOT23 RS-485/RS-422 True Fail-Safe Receivers
Selector Guide
Ordering Information
(All Voltages Referenced to GND)
Supply Voltage (VCC) ..............................................-0.3V to +6V
Control Input Voltage (EN, EN) ...............................-0.3V to +6V
VL Input Voltage ......................................................-0.3V to +6V
Receiver Input Voltage (A, B) .............................-7.5V to +12.5V
Receiver Output Voltage (RO) .................-0.3V to (VCC + 0.3V)
Receiver Output Voltage
(RO) (MAX3284E) ...................................-0.3V to (VL + 0.3V)
Receiver Output Short-Circuit Current ......................Continuous
Continuous Power Dissipation (TA = +70°C) 5-Pin SOT23 (derate 7.1mW/°C above +70°C) ..........571mW6-Pin SOT23 (derate 8.7mW/°C above +70°C) ..........696mW
Operating Temperature Range
MAX328_EA__ .............................................-40°C to +125°C
Storage Temperature Range ............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
(VCC = 3V to 5.5V, VL = VCC, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 5V and TA = +25°C.) (Notes 2, 3)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Supply VoltageVCC3.05.5V
Supply CurrentICCNo load915mA
VL Input RangeVLMAX3284E1.65VCCV
VL Supply CurrentILNo load (MAX3284E)10µA
RECEIVER

Input Current (A and B)IA, BVCC = VGND or 5.5VVIN = +12V250µAVIN = -7V-200
Receiver Differential Threshold
VoltageVTH-7V ≤ VCM ≤ +12V (Note 4)-200-125-50mV
Receiver Input Hysteresis∆VTHVA + VB = 0V25mV
Receiver Enable Input LowVENILMAX3281E, MAX3283E only0.4V
Receiver Enable Input HighVENIHMAX3281E, MAX3283E only2V
Receiver Enable Input LeakageILEAKMAX3281E, MAX3283E only±10µA
Receiver Output High VoltageVOH
MAX3280E/MAX3281E/MAX3283E,
IOH = -4mA, RO highVCC - 0.4MAX3284E, IOH = -1mA, 1.65V ≤ VL ≤ VCC,
RO highVL - 0.4
Receiver Output Low VoltageVOL
MAX3280E/MAX3281E/MAX3283E,
IOL = 4mA, RO low0.4MAX3284E, IOL = 1mA, 1.65V ≤ VL ≤ VCC,
RO low0.4
Three-State Output Current at
ReceiverIOZR0 ≤ VO ≤ VCC, RO = high impedance±5µA
Receiver Input ResistanceRIN-7V ≤ VCM ≤ +12V (Note 5)48kΩ
Receiver Output Short-Circuit
Current IOSR0 ≤ VRO ≤ VCC±130mA
ESD PROTECTION

ESD Protection (A, B)
Human Body Model±15IEC1000-4-2 (Air-Gap Discharge)±12
MAX3280E/MAX3281E/
MAX3283E/MAX3284E
±15kV ESD-Protected 52Mbps, 3V to 5.5V,
SOT23 RS-485/RS-422 True Fail-Safe Receivers
Electrical Characteristics

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Absolute Maximum Ratings
Note 2: Parameters are 100% production tested at +25°C, limits over temperature are guaranteed by design.
Note 3:
All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to device
ground, unless otherwise noted.
Note 4: VCM is the common-mode input voltage. VID is the differential input voltage.
Note 5:
Not production tested. Guaranteed by design.
Note 6:
See Table 2 for MAX3284E data rates with VL < VCC.
(VCC = 3.3V, TA = +25°C, unless otherwise noted.)
(VCC = 3V to 5.5V, VL = VCC, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 5V and TA = +25°C.) (Notes 2, 3)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Maximum Data RatefMAXCL = 15pF (Notes 5, 6)52Mbps
Receiver Propagation Delay
tPLHFigure 1, CL = 15pF, VID = 2V, VCM = 0V715tPHLFigure 1, CL = 15pF, VID = 2V, VCM = 0V815
Receiver Output |tPLH - tPHL|tPSKEWFigure 1, CL = 15pF, TA = +25°C2ns
Device-to-Device Propagation
Delay Matching
Same power supply, maximum temperature
difference between devices = +30°C
(Note 5)ns
ENABLE/DISABLE TIME FOR MAX3281E/MAX3283E

Receiver Enable to Output LowtPRZLFigure 2, CL = 15pF500ns
Receiver Enable to Output HightPRZHFigure 2, CL = 15pF500ns
Receiver Disable Time from LowtPRLZFigure 2, CL = 15pF500ns
Receiver Disable Time from HightPRHZFigure 2, CL = 15pF500ns
RECEIVER OUTPUT HIGH VOLTAGE
vs. TEMPERATURE
MAX3280/1/3/4E toc03
TEMPERATURE (°C)
RECEIVER OUTPUT HIGH VOLTAGE (V)
VCC = 5V
VCC = 3.3V
VA = 1V, B = GND, IOH = -4mA
RECEIVER OUTPUT HIGH VOLTAGE
vs. OUTPUT CURRENT
MAX3280/1/3/4E toc02
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
VCC = 3.3V
VCC = 5V201030405060
RECEIVER OUTPUT LOW VOLTAGE
vs. OUTPUT CURRENT

MAX3280/1/3/4E toc01
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
VCC = 3.3V
VCC = 5V
MAX3280E/MAX3281E/
MAX3283E/MAX3284E
±15kV ESD-Protected 52Mbps, 3V to 5.5V,
SOT23 RS-485/RS-422 True Fail-Safe Receivers
Typical Operating Characteristics
Switching Characteristics
(VCC = 3.3V, TA = +25°C, unless otherwise noted.)
VL SUPPLY CURRENT
vs. TEMPERATURE
MAX3280/1/3/4 toc10
TEMPERATURE (°C)
L SUPPLY CURRENT (mA)
VCC = VL = 5V
DATA RATE = 52MbpsVCC = VL = 3.3V
DATA RATE = 52Mbps
VCC = VL = 5V
DATA RATE = 100kbps
VCC = VL = 3.3V
DATA RATE = 100kbps
SUPPLY CURRENT vs. DATA RATE

MAX3280/1/3/4E toc09
DATA RATE (kbps)
SUPPLY CURRENT (mA)100010010,000100,000
ICC, VCC = VL = 5V
ICC, VCC = VL = 3.3V
IL, VCC = VL = 5V
IL, VCC = VL = 3.3V
MAX3284E MAXIMUM DATA RATE
vs. VOLTAGE LOGIC LEVEL
MAX3280/1/3/4E toc08
VOLTAGE LOGIC LEVEL (V)
DATA RATE (Mbps)
SUPPLY CURRENT vs. TEMPERATURE

MAX3280/1/3/4E toc07
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
VCC = 5V
VCC = 3.3V
RECEIVER PROPAGATION DELAY (tPHL)
vs. TEMPERATURE
MAX3280/1/3/4E toc06
TEMPERATURE (°C)
tPHL
(ns)
VCC = 5V
VCC = 3.3V
RECEIVER PROPAGATION DELAY (tPLH)
vs. TEMPERATURE
MAX3280/1/3/4E toc05
TEMPERATURE (°C)
tPLH
(ns)
VCC = 5V
VCC = 3.3V
RECEIVER OUTPUT LOW VOLTAGE
vs. TEMPERATURE
MAX3280/1/3/4E toc04
TEMPERATURE (°C)
RECEIVER OUTPUT LOW VOLTAGE (mV)
VCC = 5V
VCC = 3.3V
A = GND, VB = 1V, IOL = 4mA
MAX3280E/MAX3281E/
MAX3283E/MAX3284E
±15kV ESD-Protected 52Mbps, 3V to 5.5V,
SOT23 RS-485/RS-422 True Fail-Safe Receivers
Typical Operating Characteristics (continued)
Detailed Description
The MAX3280E/MAX3281E/MAX3283E/MAX3284E are
single, true fail-safe receivers designed to operate at data
rates up to 52Mbps. The fail-safe architecture guarantees
a high output signal if both input terminals are open or
shorted together. See the True Fail-Safe section. This
feature assures a stable and predictable output logic state
with any transmitter driving the line. These receivers func-
tion with a 3.3V or 5V supply voltage and feature excellent
propagation delay times (15ns).
The MAX3280E is a single receiver available in a 5-pin
SOT23 package. The MAX3281E (EN, active high) and
MAX3283E (EN, active low) are single receivers that
also contain an enable pin. Both the MAX3281E and
MAX3283E are available in a 6-pin SOT23 package. The
MAX3284E is a single receiver that contains a VL pin,
which allows communication with low-level logic included
in digital FPGAs. The MAX3284E is available in a 6-pin
SOT23 package.
The MAX3284E’s low-level logic application allows users
to set the logic levels. A logic high level of 1.65V will limit
the maximum data rate to 20Mbps.
±15kV ESD Protection
ESD-protection structures are incorporated on the
receiver input pins to protect against ESD encountered
during handling and assembly. The MAX3280E/
MAX3281E/MAX3283E/MAX3284E receiver inputs (A,
B) have extra protection against static electricity found
in normal operation. Maxim’s engineers developed
state-of-the-art structures to protect these pins against
±15kV ESD without damage. After an ESD event, this
family of parts continues working without latchup.
ESD protection can be tested in several ways. The
receiver inputs are characterized for protection to the
following:●±15kV using the Human Body Model●±6kV using the Contact Discharge method specified
in IEC 1000-4-2 (formerly IEC 801-2)●±12kV using the Air-Gap Discharge method specified
in IEC 1000-4-2 (formerly IEC 801-2)
ESD Test Conditions

ESD performance depends on a number of conditions.
Contact Maxim for a reliability report that documents test
setup, methodology, and results.
Human Body Model

Figure 3a shows the Human Body Model, and Figure
3b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the device through a 1.5kΩ
resistor.
IEC 1000-4-2

Since January 1996, all equipment manufactured
and/or sold in the European community has been
required to meet the stringent IEC 1000-4-2 specifica-
tion. The IEC 1000-4-2 standard covers ESD test-
ing and performance of finished equipment; it does
not specifically refer to integrated circuits. The
PINNAMEFUNCTIONMAX3280EMAX3281EMAX3283EMAX3284E
111VCCPositive Supply: 3V ≤ VCC ≤ 5.5V. Bypass with a 0.1µF
capacitor to GND.222GNDGround333ROReceiver Output. RO will be high if (VA - VB) ≥ -50mV. RO will
be low if (VA - VB) ≤ -200mV.444BInverting Receiver Input—5—ENReceiver Output Enable. Drive EN low to enable RO. When
EN is high, RO is high impedance.5——ENReceiver Output Enable. Drive EN high to enable RO. When
EN is low, RO is high impedance.——5VL
Low-Voltage Logic-Level Supply Voltage. VL is a user-defined
voltage, ranging from 1.65V to VCC. RO output high is pulled
up to VL. Bypass with a 0.1µF capacitor to GND.666ANoninverting Receiver Input
MAX3280E/MAX3281E/
MAX3283E/MAX3284E
±15kV ESD-Protected 52Mbps, 3V to 5.5V,
SOT23 RS-485/RS-422 True Fail-Safe Receivers
Pin Description
users design equipment that meets Level 3 of IEC 1000-
4-2, without additional ESD-protection components.
The main difference between tests done using the Human
Body Model and IEC 1000-4-2 is higher peak current
in IEC 1000-4-2. Because series resistance is lower in
the IEC 1000-4-2 ESD test model (Figure 4a), the ESD-
withstand voltage measured to this standard is generally
lower than that measured using the Human Body Model.
Figure 4b shows the current waveform for the ±8kV IEC
1000-4-2 Level 4 ESD Contact Discharge test. The Air-
Gap test involves approaching the device with a charger
probe. The Contact Discharge method connects the
probe to the device before the probe is energized.
Machine Model

The Machine Model for ESD testing uses a 200pF stor-
age capacitor and zero-discharge resistance. It mimics
the stress caused by handling during manufacturing and
assembly. All pins (not just the RS-485 inputs) require this
protection during manufacturing. Therefore, the Machine
Model is less relevant to the I/O ports than are the Human
Body Model and IEC 1000-4-2.
True Fail-Safe

The MAX3280E/MAX3281E/MAX3283E/MAX3284E guar-
antee a logic-high receiver output when the receiver inputs
are shorted or open, or when they are connected to a
terminated transmission line with all drivers disabled. This
guaranteed logic high is achieved by setting the receiver
threshold between -50mV and -200mV. If the differential
receiver input voltage (VA - VB) is greater than or equal to
-50mV, RO is logic high. If (VA - VB) is less than or equal
to -200mV, RO is logic low.
In the case of a terminated bus with all transmitters dis-
abled, the receiver’s differential input voltage is pulled to
ground by the termination. This results in a logic high with
a 50mV minimum noise margin. Unlike previous fail-safe
devices, the -50mV to -200mV threshold complies with
the ±200mV EIA/TIA-485 standard.
Receiver Enable
(MAX3281E and MAX3283E only)

The MAX3281E and MAX3283E feature a receiver out-
put enable (EN, MAX3281E or EN, MAX3283E) input
that controls the receiver. The MAX3281E receiver
enable (EN) pin is active high, meaning the receiver
outputs are active when EN is high. The MAX3283E
receiver enable (EN) pin is active low. Receiver outputs
are high impedance when the MAX3281E’s EN pin is low
and when the MAX3283E’s EN pin is high.
Low-Voltage Logic Levels
(MAX3284E only)

An increasing number of applications now operate at
low-voltage logic levels. To enable compatibility with
these low-voltage logic level applications, such as digital
FPGAs, the MAX3284E VL pin is a user-defined supply
voltage that designates the voltage threshold for a logic
high.
At lower VL voltages, the data rate will also be lower.
A logic-high level of 1.65V will receive data at 20Mbps.
Table 2 gives data rates at various voltages at VL.
Applications Information
Propagation Delay Matching

The MAX3280E/MAX3281E/MAX3283E/MAX3284E (VCC
= VL) exhibit propagation delays that are closely matched
from one device to another, even between devices from
different production lots. This feature allows multiple data
lines to receive data and clock signals with minimal skew
with respect to each other. Figure 5 shows the typical
propagation delays. Small receiver skew times, the differ-
ence between the low-to-high and high-to-low propagation
delay, help maintain a symmetrical ratio (50% duty cycle).
The receiver skew time | tPLH - tPHL | is under 2ns for
either a 3.3V supply or a 5V supply.
Multidrop Clock Distribution

Low package-to-package skew (8ns max) makes the
MAX3280E/MAX3281E/MAX3283E/MAX3284E
(VCC = VL) ideal for multidrop clock distribution. When
distributing a clock signal to multiple circuits over long
transmission lines, receivers in separate locations, and
Table 1. MAX3281E/MAX3283E Enable
Table
Table 2. MAX3284E Data Rate Table
VCC = 3V TO 5.5VMAXIMUM DATA RATE

1.65V20Mbps
2.2V33Mbps
≥3.3V52Mbps
PARTENABLE = HIGHENABLE = LOW

MAX3281EActiveHigh Z
MAX3283EHigh ZActive
MAX3280E/MAX3281E/
MAX3283E/MAX3284E
±15kV ESD-Protected 52Mbps, 3V to 5.5V,
SOT23 RS-485/RS-422 True Fail-Safe Receivers
ic,good price


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