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MAX3140CEI+ |MAX3140CEIMAXN/a5avaiSPI/MICROWIRE-Compatible UART with Integrated True Fail Safe RS-485/RS-422 Transceivers
MAX3140EEI+MAXIMN/a1500avaiSPI/MICROWIRE-Compatible UART with Integrated True Fail Safe RS-485/RS-422 Transceivers


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MAX3140CEI+-MAX3140EEI+
SPI/MICROWIRE-Compatible UART with Integrated True Fail Safe RS-485/RS-422 Transceivers
General Description
The MAX3140 is a complete universal asynchronous
receiver-transmitter (UART) and a true fail-safe RS-
485/RS-422 transceiver combined in a single 28-pin
QSOP package for space-, cost-, and power-con-
strained applications. The MAX3140 saves additional
board space as well as microcontroller (µC) I/O pins by
featuring an SPI™/QSPI™/MICROWIRE™-compatible
serial interface. It is pin-programmable for configuration
in all RS-485/RS-422 networks.
The MAX3140 includes a single RS-485/RS-422 driver
and receiver featuring true fail-safe circuitry, which
guarantees a logic-high receiver output when the
receiver inputs are open or shorted. This feature pro-
vides immunity to faults without requiring complex ter-
mination. The MAX3140 provides software-selectable
control of half- or full-duplex operation, data rate, slew
rate, and transmitter and receiver phase. The RS-485
driver slew rate is programmable to minimize EMI and
results in maximum data rates of 115kbps, 500kbps,
and 10Mbps. Independent transmitter/receiver phase
control enables software correction of twisted-pair
polarity reversal. A 1/8-unit-load receiver input imped-
ance allows up to 256 transceivers on the bus.
The MAX3140’s UART includes an oscillator circuit
derived from an external crystal, and a baud-rate gen-
erator with software-programmable divider ratios for all
common baud rates from 300 baud to 230k baud. The
UART features an 8-word-deep receive FIFO that mini-
mizes processor overhead and provides a flexible inter-
rupt with four maskable sources, including address
recognition on 9-bit networks. Two control lines are
included for hardware handshaking—one input and
one output.
The MAX3140 operates from a single +5V supply and
typically consumes only 645µA with the receiver active.
Hardware-invoked shutdown reduces supply current to
only 20µA. The UART and RS-485/RS-422 functions can
be used together or independently since the two func-
tions share only supply and ground connections (the
MAX3140 is hardware- and software-compatible with the
MAX3100 and MAX3089).
Applications

Industrial-Control Transceivers for EMI-
Local Area NetworksSensitive Applications
HVAC and Building ControlEmbedded Systems
Point-of-Sale DevicesIntelligent Instrumentation
Features
Integrated UART and RS-485/RS-422 Transceiver
in a Single 28-Pin QSOP
SPI/MICROWIRE-Compatible Interface Saves µC
I/O Pins
True Fail-Safe Receiver Output Eliminates
Complex Network Termination
Pin-Programmable RS-485/RS-422 Features
Half/Full-Duplex Operation
Slew-Rate Limiting for Reduced EMI
115kbps/500kbps/10Mbps Data Rates
Receiver/Transmitter Phase for Twisted-Pair
Polarity Reversal
Full-Featured UART
Programmable Up to 230k baud with a
3.6864MHz Crystal
8-Word Receive FIFO Minimizes Processor
Overhead
9-Bit Address-Recognition Interrupt
Allows Up to 256 Transceivers on the BusLow 20µA Hardware Shutdown ModeHardware/Software-Compatible with MAX3100
and MAX3089
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers

19-1453; Rev 1; 9/10
PART

MAX3140CEI+
MAX3140EEI+-40°C to +85°C
0°C to +70°C
TEMP. RANGEPIN-PACKAGE

28 QSOP
28 QSOP
Ordering Information

SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
Typical Application Circuit

SCLK
SPI/
MICRO-
WIRE
DIN
DOUT
UART
IRQ
H/FSRL
HALF/FULL-DUPLEX
RS-485/RS-422
TXP
CONTROL
LOGIC
RS-485
RS-422
RXP
MAX3140
+Denotes a lead(Pb)-free/RoHS-compliant package.
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VCC= +5V ±5%, DE = VCC, RE= GND, SHDN= VCC, fXTL= 1.8432MHz, TA= TMINto TMAX, unless otherwise noted. Typical values
are measured with VCC= +5V, UART configured for 9600 baud, TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND ..........................................................................+6V
Input Voltage to GND (CS, SHDN, X1, CTS, RX, DIN, SCLK,
RE, DE, H/F, SRL, TXP, RXP, Dl).............-0.3V to (VCC+ 0.3V)
Output Voltage to GND
DOUT, RTS, TX, X2, RO...........................-0.3V to (VCC+ 0.3V)
IRQ........................................................................-0.3V to +6V
Driver Output Voltage (Y, Z) ...............................................±13V
Receiver Input Voltage, Half Duplex (Y, Z).........................±13V
Receiver Input Voltage, Full Duplex (A, B) .........................±25V
TX, RTSOutput Current ...................................................100mA
X2, DOUT, IRQShort-Circuit Duration
(to VCCor GND)......................................................Continuous
Continuous Power Dissipation (TA= +70°C)
28-pin QSOP (derate 10.8mW/°C above +70°C)..........860mW
Operating Temperature Ranges
MAX3140CEI .......................................................0°C to +70°C
MAX3140EEI ....................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
Soldering Temperature (reflow).......................................+260°C
ISOURCE= 5mA; DOUT, RTS
SHDN= GND or SHDNi bit = 1;
DE = GND; RE= VCC
SHDN= GND or SHDNi bit = 1
CONDITIONS

VCC- 0.55CIN2Input Capacitance±1ILKG1Input Leakage Current250VHYST2Input Hysteresis0.3VCCVIL2Input Low Voltage0.7VCCVIH2Input High Voltage5CIN1Input Capacitance0.2VCCVIL1Input Low Voltage0.7VCCVIH1Input High Voltage
0.71.920ICCSHDN
(FULL)
Supply Current with Both
RS-485 Transceiver and UART
Shut Down
0.742mA
ICCSupply Current0.471ICCSHDN
UART
Supply Current with Only UART
Shut Down
UNITSMINTYPMAXSYMBOLPARAMETER

ISINK= 4mA; DOUT, RTS
ISOURCE= 10mA; TX only
0.4VCC- 0.5VOH1Output High Voltage4.755.25VCCSupply Voltage
VX1= 0 or VCCµA2IIN1Input CurrentSHDNi bit = 0
SHDNi bit = 1
ISINK= 25mA; TX onlyV0.9VOL1Output Low Voltage= VCC; DOUTonlyµA
ILKG2Output Leakage±1
SHDN= VCC;
SHDNi bit = 0,
no load
DE = VCC
DE = GND
DE = VCC
DE = GND
SRL = VCC
SRL = GND
or open
UART OUTPUTS (DOUT, TX, RTS)
UART LOGIC INPUTS (DIN, SCLK, CS, SHDN, CTS, RX)
UART OSCILLATOR INPUT (X1)
POWER SUPPLY
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
ELECTRICAL CHARACTERISTICS (continued)

(VCC= +5V ±5%, DE = VCC, RE= GND, SHDN= VCC, fXTL= 1.8432MHz, TA= TMINto TMAX, unless otherwise noted. Typical values
are measured with VCC= +5V, UART configured for 9600 baud, TA= +25°C.) (Note 1)
R = 50Ωor R = 27Ω, Figure 1
R = 50Ωor R = 27Ω, Figure 1 (Note 2)
R = 27Ω(RS-422), Figure 1
R = 50Ω(RS-422), Figure 1
No load, Figure 1
VIRQ= VCC
ISINK= 4mA
R = 50Ωor R = 27Ω, Figure 1 (Note 2)
CONDITIONS
3VOCCommon-Mode Output
Voltage0.2ΔVODChange in Magnitude of
Differential Output Voltage
1.5VOD2Differential Output Voltage2.0VOD15COUT2Output Capacitance±1ILKG3Output Leakage0.4VOL2Output Low Voltage0.2ΔVOCChange In Magnitude of
Common-Mode Voltage
UNITSMINTYPMAXSYMBOLPARAMETER

(Note 3)
H/F, TXP, RXP, internal pull-down
DE, DI, RE
SRL = VCCor unconnected
DE, Dl, RE, H/F, TXP, RXP
DE, Dl, RE
SRL = GND (Note 3)
SRL = VCC0.4 ·VCC0.6 · VCCVIM2SRL Input Middle VoltageVCC- 0.8VIH2SRL Input High Voltage1040IIN2Input Current±2IIN1100VHYSDI Input Hysteresis0.8VIL1Input Low Voltage
2.0-75IIN3SRL Input Current750.8VIL2SRL Input Low Voltage
(Note 4)
DE = GND
VCC= GND or 5.25V
DE = GND
-250125IOFull-Duplex Output Leakage
(Y and Z)-75IIN4125Full-Duplex Input Current
(A and B)
±25
IOSDShort-Circuit Output Current
-7V ≤VCM≤+12VmV-200-125-50VTH25ΔVTHInput Hysteresis
Differential Threshold Voltage
ISINK= 4mA, VID= -200mV
ISOURCE= 4mA, VID= -50mV
0.4V ≤VO≤2.4V0.4VOLVCC- 1.5VOH±1IOZR
Output High Voltage
Three-State Output Current
Output Low Voltage
-7V ≤VCM≤12V96RIN
Input Resistance
VIN= 12V
VIN= -7V
VCC= GND or 5.25V
VIN= 12V
VIN= -7V-100
-7V ≤VOUT≤VCC
0 ≤VOUT≤12V
0 ≤VOUT≤VCC
H/F, TXP, RXPV2.4VIH1Input High Voltage
UART IRQOUTPUT (Open Drain)
RS-485 DRIVER
RS-485 RECEIVER
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
UART SWITCHING CHARACTERISTICS

(VCC= +5V ±5%, fXTL= 1.8432MHz, TA= TMINto TMAX, unless otherwise noted. Typical values are measured with VCC= +5V,
UART configured for 9600 baud, TA= +25°C.) (Note 1)
CONDITIONSUNITSMINTYPMAXSYMBOLPARAMETER

CLOAD= 100pFns100tDVCSLow to DOUT Valid
CLOAD= 100pF, RCS= 10kΩns100tTRCSHigh to DOUT Tri-State0tCSHCSto SCLK Hold Time100tCSSCSto SCLK Setup Time100tDSDIN to SCLK Setup Time238tCPSCLK Period0tDHDIN to SCLK Hold Time
CLOAD= 100pFns100tDOSCLK Fall to DOUT Valid100tCLSCLK Low Time200tCS1CSRising Edge to SCLK
Rising100tCS0SCLK Rising Edge to CS
FaIling
TX, RTS,DOUT; CLOAD= 100pFns10trOutput Rise Time
TX, RTS, DOUT, IRQ; CLOAD= 100pFns10tfOutput Fall Time200tCSWCSHigh Pulse Width100tCHSCLK High Time
UART AC TIMING (Figure 1)
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
SWITCHING CHARACTERISTICS—SRL = Unconnected

(VCC= +5V ±5%, TA= TMINto TMAX, unless otherwise noted. Typical values are at VCC= +5V and TA= +25°C.)
50020302600tDPHL
PARAMETERSYMBOLMINTYPMAXUNITS

Driver Disable Time from LowtDLZ100ns
Driver Enable to Output LowtDZL3500ns
Driver Enable to Output HightDZH3500ns
Maximum Data RatefMAX115kbps
Driver Disable Time from HightDHZ100ns
Receiver Input to OutputtRPLH,
tRPHL127200ns
|tRPLH- tRPHL|Differential
Receiver SkewtRSKD3±30ns
Receiver Enable to Output LowtRZL2050ns
Driver Output Skew
|tDPLH- tDPHL|
Driver Input to OutputtDPLH50020302600ns
tDSKEW-3±200ns
Driver Rise or Fall TimetDR, tDF66713202500ns
Receiver Enable to Output HightRZH2050ns
Receiver Disable Time from LowtRLZ2050ns
Receiver Disable Time from
HightRHZ2050ns
Time to ShutdowntSHDN50200600ns
Driver Enable from Shutdown to
Output HightDZH(SHDN)6000ns
Driver Enable from Shutdown to
Output LowtDZL(SHDN)6000ns
Receiver Enable from Shutdown
to Output HightRZH(SHDN)3500ns
Receiver Enable from Shutdown
to Output LowtRZL(SHDN)3500ns
CONDITIONS

Figures 2 and 8, CL= 100pF, S2 closed
Figures 4 and 6, CL= 15pF, S1 closed
Figures 2 and 8, CL= 100pF, S1 closed
Figures 4 and 6, CL= 100pF, S1 closed
Figures 4 and 6, CL= 100pF, S2 closed
Figures 4 and 6, CL= 15pF, S2 closed
Figures 7 and 9, |VID|≥2.0V,
rise and fall time of VID≤15ns
Figures 2 and 8, CL= 100pF, S2 closed
(Note 5)
Figures 7 and 9, |VID|≥2.0V,
rise and fall time of VID≤15ns
Figures 2 and 8, CL= 100pF, S1 closed
Figures 4 and 6, CL= 15pF, S2 closed
Figures 4 and 6, CL= 15pF, S1 closed
Figures 2 and 8, CL= 100pF, S2 closed
Figures 3 and 5, RDIFF= 54Ω,
CL1= CL2= 100pF
Figures 2 and 8, CL= 100pF, S1 closed
Figures 3 and 5, RDIFF= 54Ω,
CL1= CL2= 100pF
Figures 3 and 5, RDIFF= 54Ω,
CL1= CL2= 100pF
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
SWITCHING CHARACTERISTICS—SRL = VCC

(VCC= +5V ±5%, TA= TMINto TMAX, unless otherwise noted. Typical values are at VCC= +5V and TA= +25°C.)
Receiver Enable from Shutdown
to Output LowtRZL(SHDN)3500nsFigures 2 and 8, CL= 100pF, S1 closed
tDPHL
PARAMETERSYMBOLMINTYPMAXUNITS

Driver Disable Time from LowtDLZ100ns
Driver Enable to Output LowtDZL2500ns
Driver Enable to Output HightDZH2500ns
Maximum Data RatefMAX500kbps
Driver Disable Time from HightDHZ100ns
Receiver Input to OutputtRPLH,
tRPHL127200ns
|tRPLH- tRPHL|Differential
Receiver SkewtRSKD3±30ns
Receiver Enable to Output LowtRZL2050ns
Driver Output Skew
|tDPLH- tDPHL|
Driver Input to OutputtDPLH2507201000ns
tDSKEW-3±100ns
Driver Rise or Fall TimetDR, tDF200530950ns
Receiver Enable to Output HightRZH2050ns
Receiver Disable Time from LowtRLZ2050ns
Receiver Disable Time from
HightRHZ2050ns
Time to ShutdowntSHDN50200600ns
Driver Enable from Shutdown to
Output HightDZH(SHDN)4500ns
Driver Enable from Shutdown to
Output LowtDZL(SHDN)4500ns
Receiver Enable from Shutdown
to Output HightRZH(SHDN)3500ns
CONDITIONS

Figures 2 and 8, CL= 100pF, S2 closed
Figures 4 and 6, CL= 15pF, S1 closed
Figures 2 and 8, CL= 100pF, S1 closed
Figures 4 and 6, CL= 100pF, S1 closed
Figures 4 and 6, CL= 100pF, S2 closed
Figures 4 and 6, CL= 15pF, S2 closed
Figures 7 and 9, |VID|≥2.0V,
rise and fall time of VID≤15ns
Figures 2 and 8, CL= 100pF, S2 closed
(Note 5)
Figures 7 and 9, |VID|≥2.0V,
rise and fall time of VID≤15ns
Figures 2 and 8, CL= 100pF, S1 closed
Figures 4 and 6, CL= 15pF, S2 closed
Figures 4 and 6, CL= 15pF, S1 closed
Figures 2 and 8, CL= 100pF, S2 closed
Figures 3 and 5, RDIFF= 54Ω,
CL1= CL2= 100pF
Figures 3 and 5, RDIFF= 54Ω,
CL1= CL2= 100pF
Figures 3 and 5, RDIFF= 54Ω,
CL1= CL2= 100pF
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
SWITCHING CHARACTERISTICS—SRL = GND

(VCC= +5V ±5%, TA= TMINto TMAX, unless otherwise noted. Typical values are at VCC= +5V and TA= +25°C.)
PARAMETERSYMBOLMINTYPMAXUNITS

Driver Disable Time from LowtDLZ100ns
Driver Enable to Output LowtDZL150ns
Driver Enable to Output HightDZH150ns
Maximum Data RatefMAX10Mbps
Driver Disable Time from HightDHZ100ns
Receiver Input to OutputtRPLH,
tRPHL106150ns
|tRPLH- tRPHL|Differential
Receiver SkewtRSKD0±10ns
Receiver Enable to Output LowtRZL2050ns
Driver Output Skew
|tDPLH- tDPHL|
Driver Input to OutputtDPLH3460ns
tDSKEW-2.5±10ns
Driver Rise or Fall TimetDR, tDF1425ns
Receiver Enable to Output HightRZH2050ns
Receiver Disable Time from LowtRLZ2050ns
Receiver Disable Time from
HightRHZ2050ns
Time to ShutdowntSHDN50200600ns
Driver Enable from Shutdown to
Output HightDZH(SHDN)250ns
Driver Enable from Shutdown to
Output LowtDZL(SHDN)250ns
Receiver Enable from Shutdown
to Output HightRZH(SHDN)3500ns60
CONDITIONS

Figures 2 and 8, CL= 100pF, S2 closed
Figures 4 and 6, CL= 15pF, S1 closed
Figures 2 and 8, CL= 100pF, S1 closed
Figures 4 and 6, CL= 100pF, S1 closed
Figures 4 and 6, CL= 100pF, S2 closed
Figures 4 and 6, CL= 15pF, S2 closed
Figures 7 and 9, |VID|≥2.0V,
rise and fall time of VID≤15ns
Figures 2 and 8, CL= 100pF, S2 closed
(Note 5)
Figures 7 and 9, |VID|≥2.0V,
rise and fall time of VID≤15ns
Figures 2 and 8, CL= 100pF, S1 closed
Figures 4 and 6, CL= 15pF, S2 closed
Figures 4 and 6, CL= 15pF, S1 closed
Figures 2 and 8, CL= 100pF, S2 closed
Figures 3 and 5, RDIFF= 54Ω,
CL1= CL2= 100pF
Receiver Enable from Shutdown
to Output Low
Figures 3 and 5, RDIFF= 54Ω,
CL1= CL2= 100pF
tRZL(SHDN)3500
Figures 3 and 5, RDIFF= 54Ω,
CL1= CL2= 100pFFigures 2 and 8, CL= 100pF, S1 closed
tDPHL
Note 1:
All currents into the device are positive; all currents out of the device are negative. All voltages are referred to device
ground unless otherwise noted.
Note 2:
ΔVODand ΔVOCare the changes in VODand VOC, respectively, when the Dl input changes state.
Note 3:
The SRL pin is internally biased to VCC/2 by a 100kΩ/100kΩresistor-divider. It is guaranteed to be VCC/2 if left unconnected.
Note 4:
Maximum current level applies to peak current just prior to foldback-current limiting; minimum current level applies during
current limiting.
Note 5:
The device is put into shutdown by bringing REhigh and DE low. If the enable inputs are in this state for less than 50ns, the
device is guaranteed not to enter shutdown. If the enable inputs are in this state for at least 600ns, the device is guaranteed
to have entered shutdown.
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
Typical Operating Characteristics

(VCC= +5V, TA = +25°C, unless otherwise noted.)
UART SUPPLY CURRENT
vs. TEMPERATURE
MAX3140-01
TEMPERATURE (°C)
SUPPLY CURRENT (
1.8432MHz CRYSTAL
TRANSMITTING AT 115.2 kbps
UART SHUTDOWN CURRENT
vs. TEMPERATURE
MAX3140-02
TEMPERATURE (°C)
SHUTDOWN CURRENT (
1.8432MHz CRYSTAL
10010k1000100k1M
UART SUPPLY CURRENT
vs. BAUD RATE

MAX3140-03
BAUD RATE (bps)
SUPPLY CURRENT (
TRANSMITTING
1.8432 MHz
CRYSTAL
STANDBY
UART SUPPLY CURRENT vs.
EXTERNAL CLOCK FREQUENCY
MAX3140-04
EXTERNAL CLOCK FREQUENCY (MHz)
SUPPLY CURRENT (
RS-485 OUTPUT CURRENT
vs. RECEIVER OUTPUT LOW VOLTAGE
MAX3140-07
OUTPUT LOW VOLTAGE (V)
OUTPUT CURRENT (mA)0.20.10.60.70.81.0
TX, RTS, DOUT OUTPUT CURRENT
vs. OUTPUT LOW VOLTAGE

MAX3140-05
OUTPUT LOW VOLTAGE (V)
OUTPUT SINK CURRENT (mA)
RTS
DOUT
RS-485 TRANSCEIVER NO-LOAD
SUPPLY CURRENT vs. TEMPERATURE
MAX3140-06
TEMPERATURE (°C)
NO-LOAD SUPPLY CURRENT (
A: SRL = GND
B: SRL = OPEN OR VCC
DE = VCC
DE = GND
RS-485 OUTPUT CURRENT
vs. RECEIVER OUTPUT HIGH VOLTAGE

MAX3140-08
OUTPUT HIGH VOLTAGE (V)
OUTPUT CURRENT (mA)
RS-485 TRANSCEIVER SHUTDOWN
CURRENT vs. TEMPERATURE
MAX3140-09
TEMPERATURE (°C)
SHUTDOWN CURRENT (nA)
-40-202080
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
Typical Operating Characteristics (continued)

(VCC= +5V, TA = +25°C, unless otherwise noted.)
RS-485 RECEIVER OUTPUT LOW VOLTAGE
vs. TEMPERATURE
MAX3140-10
TEMPERATURE (°C)
OUTPUT LOW VOLTAGE (V)
IRO = 8mA
RS-485 RECEIVER OUTPUT HIGH VOLTAGE
vs. TEMPERATURE
MAX3140-11
TEMPERATURE (°C)
OUTPUT HIGH VOLTAGE (V)
IRO = 8mA
RS-485 RECEIVER PROPAGATION DELAY
(500kbps MODE) vs. TEMPERATURE
MAX3140-12
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
CLOAD = 100pF
RS-485 RECEIVER PROPAGATION DELAY
(10Mbps MODE) vs. TEMPERATURE
MAX3140-13
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
CLOAD = 100pF
RS-485 DRIVER PROPAGATION DELAY
(10Mbps MODE) vs. TEMPERATURE
MAX3140-16
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
Rt = 54Ω
RS-485 DRIVER PROPAGATION DELAY
(115kbps MODE) vs. TEMPERATURE
MAX3140-14
TEMPERATURE (°C)
PROPAGATION DELAY (
Rt = 54Ω
RS-485 DRIVER PROPAGATION DELAY
(500kbps MODE) vs. TEMPERATURE
MAX3140-15
TEMPERATURE (°C)
PROPAGATION DELAY (ns)
Rt = 54Ω
RS-485 DRIVER DIFFERENTIAL
OUTPUT VOLTAGE vs. TEMPERATURE
MAX3140-17
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
Rt = 54Ω
RS-485 DRIVER OUTPUT CURRENT
vs. DIFFERENTIAL OUTPUT VOLTAGE
MAX3140-18
DIFFERENTIAL OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)45
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
Typical Operating Characteristics (continued)

(VCC= +5V, TA = +25°C, unless otherwise noted.)
OUTPUT CURRENT vs.
RS-485 DRIVER OUTPUT LOW VOLTAGE
MAX3140-19
OUTPUT LOW VOLTAGE (V)
OUTPUT CURRENT (mA)
OUTPUT CURRENT vs.
RS-485 DRIVER OUTPUT HIGH VOLTAGE
MAX3140-20
OUTPUT HIGH VOLTAGE (V)
OUTPUT CURRENT (mA)42-6-4050ns/div
VA - VB
(2V/div)
(5V/div)
MAX3140-21
RS-485 RECEIVER PROPAGATION DELAY
(SRL = GND)

50ns/div
VA - VB
(2V/div)
(5V/div)
MAX3140-22
RS-485 RECEIVER PROPAGATION DELAY
(SRL = OPEN OR VCC)

2μs/div
RS-485 DRIVER PROPAGATION DELAY
(SRL = OPEN)

(5V/div)
VY - VZ
(2.5V/div)
MAX3140-23
500ns/div
RS-485 DRIVER PROPAGATION DELAY
(SRL = VCC)

(5V/div)
VY - VZ
(2.5V/div)
MAX3140-24
50ns/div
RS-485 DRIVER PROPAGATION DELAY
(SRL = GND)

(5V/div)
VY - VZ
(2.5V/div)
MAX3140-25
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
Pin Description

UART Crystal Connection. Leave X2 unconnected for external clock. See the Crystals,
Oscillators, and Ceramic Resonatorssection.X211UART Crystal Connection. X1 also serves as an external clock input. See the Crystals,
Oscillators, and Ceramic Resonatorssection.X12UART Request-to-Send Active-Low Output. Controlled by the RTS bit. Use to control the dri-
ver enable in RS-485 networks.RTS4
UART Clear-to-Send Active-Low Input. Read via the CTS bit. CTS3UART Asynchronous Serial-Data (transmitter) OutputTX6GroundGND8
RS-485 Half/Full-Duplex Selector Pin. Connect H/Fto VCCfor half-duplex mode; connect H/F
to GND or leave it unconnected for full-duplex mode.H/F7
UART Asynchronous Serial-Data (receiver) Input. The serial information received from the modem
or RS-232/RS-485 receiver. A transition on RX while in shutdown generates an interrupt (Table 1).RX5RS-485 Receiver Output Enable. Drive RElow to enable RO; RO is high impedance when RE
is high. Drive REhigh and DE low to enter low-power shutdown mode.RE10RS-485 Driver Input. With DE high, a low on DI forces noninverting output low and inverting
output high. Similarly, a high on DI forces noninverting output high and inverting output low.DI12
RS-485 Driver Output Enable. Drive DE high to enable driver outputs. These outputs are high
impedance when DE is low. Drive REhigh and DE low to enter low-power shutdown mode.DE11No Connection. Not internally connected.N.C.14RS-485 Noninverting Driver OutputY16
RS-485 Transmitter Phase. Connect TXP to GND or leave it unconnected for normal transmit-
ter phase/polarity. Connect TXP to VCCto invert the transmitter phase/polarity.TXP15
RS-485 Transceiver Slew-Rate-Limit Selector Pin. Connect SRL to GND for a 10Mbps com-
munication rate, connect SRL to VCCfor a 500kbps rate, or leave SRL unconnected for a
115kbps rate.
SRL13
RS-485 Receiver Output. When REis low and if A - B ≥-50mV, RO will be high; if A - B ≤
-200mV,RO will be low. RO9No Connection. Not internally connected.N.C.17RS-485 Inverting Receiver Input and RS-485 Inverting Driver Output*Z—
RS-485 Inverting Driver OutputZ18RS-485 Receiver Input Resistors*B—RS-485 Receiver Input Resistors*A—
RS-485 Noninverting Receiver InputA20
RS-485 Inverting Receiver InputB19
RS-485 Noninverting Receiver Input and RS-485 Noninverting Driver Output*Y—
FULL
DUPLEX
HALF
DUPLEX
PIN
NAMEFUNCTION
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
Pin Description (continued)
Transceiver Function Tables
Positive Supply (4.75V to 5.25V)VCC22UART SPI/MICROWIRE Serial-Data Output. High impedance when CSis high.DOUT24
UART SPI/MICROWIRE Serial-Data Input. Schmitt-trigger input.DIN23UART Active-Low Chip-Select Input. DOUT goes high impedance when CSis high. IRQ, TX,
and RTSare always active. Schmitt-trigger input.CS26
UART Hardware Shutdown Input. When shut down (SHDN= 0), the UART oscillator turns off
immediately without waiting for the current transmission to end, reducing the supply current
to just leakage currents.
SHDN28
UART Active-Low Interrupt Output. Open-drain interrupt output to microprocessor.IRQ27
UART SPI/MICROWIRE Serial-Clock Input. Schmitt-trigger input.SCLK25
RS-485 Receiver Phase. Connect RXP to GND or leave it unconnected for normal receiver
phase/polarity. Connect RXP to VCCto invert the receiver phase/polarity.RXP21
FULL
DUPLEX
HALF
DUPLEX
PIN
NAMEFUNCTION

*In half-duplex mode, the driver outputs serve as receiver inputs. The full-duplex receiver inputs ( A and B) still have a 1/8-unit load, but
do not affect the receiver output.DETXP
TRANSMITTING
YDI11X1000X1001X1110X11
High-ZHigh-ZX00X
Shutdown (High-Z)X10X
H/F
OUTPUTSINPUTS

RXP-0.05V-0.2V-0.05V-0.2V
A-B-0.05V-0.2V
Y-Z0
Open/
Shorted1
Open/
Shorted0-0.05V-0.2V
Open/
Shorted
Open/
ShortedHigh-ZShutdown
(High-Z)
OUTPUTS
RECEIVING
INPUTS
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers

VOD
VOC
Figure 1. Driver DC Test Load
RECEIVER
OUTPUT
TEST POINT
VCC
15pF
Figure 2. Receiver Enable/Disable Timing Test Load
VCC
CL1
CL2
RDIFF
VID
Figure 3. Driver Timing Test Circuit
OUTPUT
UNDER TEST
500ΩS1
VCC
Figure 4. Driver Enable/Disable Timing Test Load
-VO
1.5V
tPLH
1/2 VO
10%
90%90%
tPHL
1.5V
1/2 VO
10%
VDIFF = V (Y) - V (Z)
VDIFF
tSKEW = | tPLH - tPHL |
Figure 5. Driver Propagation Delays
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
Y, Z
VOL
Y, Z
1.5V1.5V
VOL +0.5V
VOH -0.5V2.3V
2.3V
tZL(SHDN), tZLtLZ
tZH(SHDN), tZHtHZ
Figure 6. Driver Enable and Disable Times
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers

VOH
VOL
-1V
1.5V1.5VOUTPUT
INPUT
tPLHtPHL
Figure 7. Receiver Propagation Delays
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
VCC
1.5V1.5V
VOL + 0.5V
VOH - 0.5V1.5V
1.5V
tZL(SHDN), tZLtLZ
tZH(SHDN), tZHtHZ
Figure 8. Receiver Enable and Disable Times
RECEIVER
OUTPUTATE
VIDR
Figure 9. Receiver Propagation Delay Test Circuit
_______________Detailed Description

The MAX3140 combines an SPI/QSPI/MICROWIRE-
compatible UART (MAX3100) and an RS-485/RS-422
transceiver (MAX3089) in one package. The UART sup-
ports data rates up to 230k baud for both standard
UART bit streams as well as IrDA, and includes an
8-wordreceive FIFO. Also included is a parity-bit inter-
rupt useful in 9-bit address recognition.
The RS-485/RS-422 transceiver has a true fail-safe
receiver and allows up to 256 transceivers on the bus.
Other features include pin-selectable full/half-duplex
operation and a phase control to correct for twisted-
pair reversal. The slew rate of the RS-485/RS-422 trans-
ceiver is selectable, limiting the maximum data rate to
115kbps, 500kbps, or 10Mbps. The RS-485/RS-422 dri-
vers are output short-circuit current limited, and thermal
shutdown circuitry protects the RS-485/RS-422 drivers
against excessive power dissipation.
The UART and RS-485/RS422 functions can be used
together or independently since the two functions only
share supply and ground connections. This part oper-
ates from a single +5V supply.
UART
The universal asynchronous receiver transmitter
(UART) interfaces the SPI/MICROWIRE-compatible syn-
chronous serial data from a microprocessor (µP) to
asynchronous, serial-data communication ports (RS-
485, IrDA). Figure 10 shows the MAX3140 functional
diagram. Included in the UART function is an
SPI/MICROWIRE interface, a baud-rate generator, and
an interrupt generator.
SPI Interface

The MAX3140 is compatible with SPI, QSPI (CPOL = 0,
CPHA = 0), and MICROWIRE serial-interface standards
(Figure 11). The MAX3140 has a unique full-duplex
architecture that expects a 16-bit word for DIN and
simultaneously produces a 16-bit word for DOUT
regardless of which read/write register used. The DIN
stream is monitored for its first two bits to tell the UART
the type of data transfer being executed(see the
WRITE CONFIGURATION register, READ CONFIG-
URATION register, WRITE DATA register, andREAD
DATA registersections). DIN (MOSI) is latched on
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers

TXP
GND
DIN
SCLK
DOUT
CTS
RTS
I/O
IRQ
SPI
INTERFACE
INTERRUPT
LOGIC
BAUD-RATE
GENERATOR
TX BUFFER
TX SHIFT REGISTSER
RX SHIFT REGISTSER
RX FIFO
RX BUFFER
SRL
H/F
NOTE: SWITCH POSITIONS INDICATE H/F = GND
RXP
MAX3140
Figure 10. Functional Diagram
SCLK
SCLK
SCLK
SCLK
(CPOL = 0, CPHA = 0)
(CPOL = 0, CPHA = 1)
(CPOL = 1, CPHA = 0)
(CPOL = 1, CPHA = 1)
COMPATIBLE
WITH MAX3140
NOT COMPATIBLE
WITH MAX3140
DINMSB1314121110987654321LSB
DOUTMSB1314121110987654321LSB
MAX3140
SCLK’s rising edge. DOUT (MISO) is read into the µP
on SCLK’s rising edge. The first bit (bit 15) of DOUT
transitions on CS’s falling edge, and bits 14–0 transition
on SCLK’s falling edge. Figure 12 shows the detailed
serial timing specifications for the synchronous SPI
port.
Only 16-bit words are expected. If CSgoes high in the
middle of a transmission (any time before the 16th bit),
the sequence is aborted (i.e., data does not get written
to individual registers). Most operations, such as the
clearing of internal registers, are executed only on CS’s
rising edge. Every time CSgoes low, a new 16-bit
stream is expected. Figure 13 shows an example of
using the WRITE CONFIGURATION register.
Table 1 describes the bits located in the WRITE CON-
FIGURATION, READ CONFIGURATION, WRITE DATA,
and READ DATAregisters. This table also describes
whether the bit is a read or write bit and what the
power-on reset states (POR) of the bits are. Figure 14
shows an example of parity and word length control.
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers

• • •
• • •
• • •
• • •
SCLK
DIN
DOUT
tCSOtCL
tDS
tDH
tDV
tCH
tDOtTR
tCSHtCS1tCSS
Figure 12. Detailed Serial Timing Specifications for the Synchronous Port
SCLK
DIN
DOUT345678910111213141516
DATA
UPDATED1FENSHDNTMRMPMRAMIRSTPELB3B2B1B000000000000000
Figure 13. SPI Interface (Write Configuration)
IDLE
SECOND STOP BIT IS OMITTED IF ST = 0.
PE = 1, L = 1
TIMESTARTD1D2D3D4D5D6PtSTOPSTOPIDLE
IDLE
PE = 1, L = 0STARTD1D2D3D4D5D6D7PtSTOPSTOPIDLE
IDLE
PE = 0, L = 1STARTD1D2D3D4D5D6STOPSTOPIDLE
IDLE
PE = 0, L = 0STARTD1D2D3D4D5D6D7STOPSTOPIDLE
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
Table 1. Bit Descriptions
PE
POR
STATE

write
Parity-Enable Bit. Appends the Pt bit to the transmitted data when PE = 1, and sends the Pt
bit as written. No parity bit is transmitted when PE = 0. With PE = 1, an extra bit is expected to
be received. This data is put into the Pr register. Pr = 0 when PE = 0. The MAX3140 does not
calculate parity.PEreadReads the value of the Parity-Enable bit.PMwriteMask for Pr bit. IRQis asserted if PM= 1 and Pr = 1 (Table 7).
DESCRIPTION

0000Prread
Receive-Parity Bit. This bit is the extra bit received if PE = 1. Therefore, PE = 1 results in 9-bit
transmissions (L = 0). If PE = 0, then Pr is set to 0. Pr is stored in the FIFO with the receive
data (see the 9-Bit Networkssection).readReads the value of the IR bit.
BIT
TYPE

write
B0–B3writeBaud-Rate Divisor Select Bits. Sets the baud clock’s value (Table 6).
B0–B3readBaud-Rate Divisor Select Bits. Reads the 4-bit baud clock value assigned to these registers.
BIT
NAME

Bit to set the word length of the transmitted or received data. L = 0 results in 8-bit words
(9-bit words if PE = 1) (see Figure 5). L = 1 results in 7-bit words (8-bit words if PE = 1).readReads the value of the L bit.write
Transmit-Parity Bit. This bit is treated as an extra bit that is transmitted if PE = 1. In 9-bit net-
works, the MAX3140 does not calculate parity. If PE = 0, then this bit (Pt) is ignored in transmit
mode (see the 9-Bit Networkssection).
D0r–D7rreadEight data bits read from the receive FIFO or the receive-buffer register. When L = 1, D7r is
always 0.
FENwriteFIFO Enable. Enables the receive FIFO when FEN= 0. When FEN= 1, FIFO is disabled.
FENreadFIFO-Enable Readback. FEN’s state is read.writeEnables the IrDA timing mode when IR = 1.
change
XXXXXXXX
CTSreadClear-to-Send-Input. Records the state of the CTSpin (CTS bit = 0 implies CTSpin = logic
high).
D0t–D7twriteTransmit-Buffer Register. Eight data bits written into the transmit-buffer register. D7t is ignored
when L = 1.PMreadReads the value of the PMbit (Table 7).Rread
Receive Bit or FIFO Not Empty Flag. R = 1 means new data is available to be read or is being
read from the receive register or FIFO. If performing a READ DATA or WRITE DATA operation,
the R bit will clear on the falling edge of SCLK's 16th pulse if no new data is available.RMwriteMask for R bit. IRQis asserted if RM= 1 and R = 1 (Table 7).RMreadReads the value of the RMbit (Table 7).RAMwriteMask for RA/FE bit. IRQis asserted if RAM= 1 and RA/FE = 1 (Table 7).RAMreadReads the value of the RAMbit (Table 7).RTSwriteRequest-to-Send Bit. Controls the state of the RTSoutput. This bit is reset on power-up (RTS
bit = 0 sets the RTSpin = logic high).
MAX3140
SPI/MICROWIRE-Compatible UART with Integratedrue Fail-Safe RS-485/RS-422 Transceivers
Table 1. Bit Descriptions (continued)
POR
STATEDESCRIPTIONBIT
TYPE
BIT
NAME
SHDNiwrite
Software-Shutdown Bit. Enter software shutdown with a WRITE CONFIGURATIONwhere
SHDNi = 1. Software shutdown takes effect after CSgoes high, and causes the oscillator to
stop as soon as the transmitter becomes idle. Software shutdown also clears R, T, RA/FE,
D0r–D7r, D0t–D7t, Pr, Pt, and all data in the receive FIFO. RTS and CTS can be read and
updated while in shutdown. Exit software shutdown with a WRITE CONFIGURATIONwhere
SHDNi = 0. The oscillator restarts typically within 50ms of CSgoing high. RTS and CTS are
unaffected. Refer to the Pin Description for hardware shutdown (SHDNinput).SHDNoread
Shutdown Read-Back Bit. The READ CONFIGURATIONregister outputs SHDNo = 1 when the
UART is in shutdown. Note that this bit is not sent until the current byte in the transmitter is
sent (T = 1). This tells the processor when it may shut down the RS-485/RS-422 driver. This bit
is also set immediately when the device is shut down through the SHDNpin.RA/FEread
Receiver-Activity/Framing-Error Bit. In shutdown mode, this is the RA bit. In normal operation,
this is the FE bit. In shutdown mode, a transition on RX sets RA = 1. In normal mode, a fram-
ing error sets FE = 1. A framing error occurs if a zero is received when the first stop bit is
expected. FE is set when a framing error occurs, and cleared upon receipt of the next proper-
ly framed character independent of the FIFO being enabled. When the device wakes up, it is
likely that a framing error will occur. This error is cleared with a WRITE CONFIGURATION. The
FE bit is not cleared on a READ DATA operation. When an FE is encountered, the UART
resets itself to the state where it is looking for a start bit. STwriteTransmit-Stop Bit. One stop bit will be transmitted when ST = 0. Two stop bits will be transmit-
ted when ST = 1. The receiver only requires one stop bit.STreadReads the value of the ST bit.TMwriteMask for T Bit. IRQis asserted if TM= 1 and T = 1 (Table 7).TMreadReads the value of the TMbit (Table 7).TreadTransmit-Buffer-Empty Flag. T = 1 means that the transmit buffer is empty and ready to
accept another data word.TEwriteTransmit-Enable Bit. If TE= 1, then only the RTSpin is updated on CS’s rising edge. The con-
tents of RTS, Pt, and D0t–D7t transmit on CS’s rising edge when TE= 0.
Notice to High-Level Programmers

The MAX3140 follows the SPI convention of providing a
bidirectional data path for writes and reads. Whenever
the data is written, data is also read back. This speeds
operation over the SPI bus, as required, when operat-
ing at high baud rates. In most high-level languages,
like C, there are commands for writing and reading
stream I/O devices like the console or serial port. In C
specifically, there is a “PUTCHAR” command that
transmits a character and a “GETCHAR” command that
receives a character. Implementing direct write and
read commands in C with no underlying driver code
causes an intended PUTCHAR command to become a
PUTGETCHAR command. These C commands assume
that they’ll receive some form of BIOS-level support.
The proper way to implement these commands is to
use driver code—usually in the form of an assembly
language interrupt service routine and a callable rou-
tine used by high-level routines. This driver handles the
interrupts and manages the receive and transmit
buffers for the MAX3140. When a PUTCHAR executes,
this driver is called and it safely buffers any characters
received when the current character is transmitted.
Likewise, when a GETCHAR executes, it checks its own
receive buffer before getting data from the MAX3140.
See the C-language outline of a MAX3140 software dri-
ver in Listing 1.
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