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MAX2150ETI+MAIXMN/a2500avaiWideband I/Q Modulator with Sigma-Delta Fractional-N Synthesizer
MAX2150ETI+TMAXIMN/a8avaiWideband I/Q Modulator with Sigma-Delta Fractional-N Synthesizer


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MAX2150ETI+-MAX2150ETI+T
Wideband I/Q Modulator with Sigma-Delta Fractional-N Synthesizer
General Description
The MAX2150 is a complete wideband direct upconver-
sion quadrature modulator IC incorporating a 28-bit
sigma-delta fractional-N synthesizer. The device is tar-
geted for applications in the 700MHz to 2300MHz fre-
quency range.
The super-high-resolution sigma-delta fractional-N syn-
thesizer is capable of better than 50mHz resolution
when used with a 10MHz reference. Other features:
fully differential I/Q modulation inputs, an internal LO
buffer, and a 50Ωwideband output driver amplifier.
A standard 3-wire interface is provided for synthesizer
programming and overall device configuration. An on-
chip low-noise crystal oscillator amplifier is also includ-
ed and can be configured as a buffer when an external
reference oscillator is used.
The device typically achieves 34dBc of carrier and side-
band suppression at a -1dBm output level. The wide-
band, internally matched RF output can also
be disabled while the synthesizer and 3-wire bus remain
powered up for continuous programming.
The device consumes 72mA from a single +3.0V sup-
ply and is packaged in an ultra-compact 28-pin QFN
package (5mm ✕5mm) with an exposed pad.
Applications

Wireless Broadband
Satellite Uplink
LMDS
Wireless Base Station
Features
Single Voltage Supply (2.7V to 3.6V)75MHz 3dB I/Q Input BandwidthWideband 50ΩRF Output: 700MHz to 2300MHz Ultra-Fine Frequency Resolution: 100mHzHigh Reference Frequency for Fast-Switching
Applications
Ultra-Low Phase NoiseLow Spurious and Reference Emissions-1dBm RMS Output Power 60dB RF Muting Control34dBc Typical Carrier Suppression34dBc Typical Sideband SuppressionSoftware- and Hardware-Controlled Shutdown
Modes
MAX2150
Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer

RFOUT
N.C.
N.C.
TXEN
VCC_PA
VCC_RF272625242322
MAX2150
∑ Δ – MOD
PROGRAMMING
AND CONTROL
CLKDATASYNEN
QFN

OSCINVCC_XTALQ+I-Q-BUFOUTBUFEN
LO+
LO-
VCC_LO
VCC_D
VCC_A
CHP
VCC_CHP
LOCK
VCC_SD
1/N
1/R
PFDCHPSHDN91011121314
Pin Configuration/
Functional Diagram
Ordering Information

19-2389; Rev 4; 6/08
PARTTEMP RANGEPIN-PACKAGE

MAX2150ETI -40°C to +85°C 28 TQFN-EP*
MAX2150ETI+ -40°C to +85°C 28 TQFN-EP*
*EP = Exposed paddle.
+Denotes lead-free package.
MAX2150
Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND...........................................................-0.3V to +6.0V
RF Signals: LO+, LO-, OSCIN........................................+10dBm
I+ to I-, Q+ to Q-.......................................................................2V
LO+, LO-, I+, I-, Q+, Q-, BUFEN, TXEN, CLK, DATA,
EN, SYNEN, OSCIN, OSCOUT, BUFOUT, CHP,
SHDN,LOCK, VCC_CP to GND..............-0.3V to (VCC + 0.3V)
Digital Input Current.........................................................±10mA
Short-Circuit Duration RFOUT, BUFOUT, OSCOUT,
Lock, CHP...........................................................................10s
Continuous Power Dissipation
28-Pin TQFN (TA = +70°C)..................................................2W
(derate 28.5mW/°C above +70°C)
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature Range..........................................+150°C
Storage Temperature.........................................-65°C to +150°C
Lead Temperature (soldering 10s)..................................+300°C
DC ELECTRICAL CHARACTERISTICS

(MAX2150 EV kit. VCC= +2.7V to +3.6V, GND = 0V, SHDN= PLLEN = TXEN = high, BUFEN= low. No AC input signals. RFOUT and
BUFOUT output ports are terminated in 50Ω. TA= -40°C to +85°C. Typical values are at VCC= +3V, TA= +25°C, unless otherwise
noted.) (Note 1)
PARAMETERCONDITIONSMINTYPMAXUNITS
SUPPLY

Supply Voltage2.733.6V
TX mode, SHDN = PLLEN = TXEN = high
BUFEN = low72107
SYNTH mode, SHDN = PLLEN = high, TXEN =
BUFEN = low2538Supply Current
MOD mode, SHDN = TXEN = high, SYNEN =
BUFEN = low4669
LO Buffer Supply CurrentAdditional current in all modes for BUFEN = high3.35.5mA
HW_SHDN mode, SHDN = low0.3600Shutdown Supply CurrentSW_SHDN mode, PWDN bit at logic low35600µA
CONTROL INPUT/OUTPUTS (SHDN, TXEN, SYNEN, BUFEN)

Input Logic High2V
Input Logic Low0.5V
Input Logic High Current1µA
Input Logic Low Current-1µA
Lock Detect High (Locked)2V
Lock D etect Low ( U nl ocked ) 0.5V
Power-Up TimeMOD mode25µs
Power-Down TimeMOD mode1µs
3-WIRE CONTROL INPUT (CLK, DATA, EN)

Input Logic HighVCC -
0.5V
Input Logic Low0.5V
Input Logic High Current1µA
Input Logic Low Current-1µA
CAUTION! ESD SENSITIVE DEVICE
MAX2150
Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer
PARAMETERCONDITIONSMINTYPMAXUNITS
MODULATION INPUT

BW (-1dB)26I/Q Input BandwidthBW (-3dB)75MHz
I/Q Differential Input LevelAssumes a sine-wave input to achieve the RFOUT output
power specified below1VP-P
I/Q DC Input Resistance200kΩ
I/Q Common-Mode Input Range(Note 2)1.51.61.7V
RF OUTPUT

Frequency Range7002300MHz
TXEN = high, fRF = 1750MHz-7-1Output PowerTXEN = low, fRF = 1750MHz-60dBm
Output 1dB Compression Point1dBm
Output IP314dBm
Carrier SuppressionfRF = 1750MHz34dBc
Sideband SuppressionfLO - fI/Q, fRF = 1750MHz2534dBc
RF Output Noise FloorfOFFSET > 40MHz (Note 2)-148-143dBm/Hz
Output Return Loss(Note 3)-9dB
LO INPUT/OUTPUT

Frequency Range7002300MHz
LO Input Power(Note 2)-12-10-7dBm
LO Input Return LossfLO =2000MHz-15dB
LO Buffer Output LevelBUFEN = high (Note 2)-14-9.5dBm
SIGMA-DELTA FRACTIONAL-N SYNTHESIZER
SYSTEM REQUIREMENTS

Frequency Range(Note 2)7002300MHz
Phase-Detector Input-Referred
Phase Noise FloorfCOMP = fREF = 20MHz, CP0 = CP1 = CPX = 1 (Note 4)-138dBc/Hz
In-Loop Spurious EmissionsfLO = 1740.005MHz, fCOMP = fREF = 20MHz, CP0 = CP1
= CPX = 1 (Note 5)-40dBc
MAIN DIVIDER AND PHASE DETECTOR

Minimum Fractional-N Step SizefCOMP/28
Phase-Detector Comparison
Frequency2030MHz
Maximum N Division251
Minimum N Division35
AC ELECTRICAL CHARACTERISTICS

(MAX2150 EV kit. VCC= +2.7V to +3.6V, SHDN= PLLEN = TXEN = high, BUFEN =low. Input I/Q signals: FI/Q = 500kHz, VI/Q = 1VP-P.
I+, Q+ single-ended input, driven from AC-coupled source. I-, Q- single-ended inputs are AC-coupled to GND. RFOUT and BUFOUT
output ports are terminated in 50Ωloads. fLO=1750MHz, PLO= -10dBm, typical values are at VCC= +3V, TA= +25°C, unless other-
wise noted.) (Note 1)
MAX2150
Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer
PARAMETERCONDITIONSMINTYPMAXUNITS
REFERENCE OSCILLATOR AND DIVIDER

Input Frequency Range1050MHz
AC-Coupled Input SensitivityAC-coupled, single ended (Note 2)0.42.3VP-P
Reference Division Ratio(Notes 2, 6)14
CHARGE-PUMP OUTPUT

CPX = 00.120.170.22CP1, CP0 = 00CPX = 10.230.340.44
CPX = 00.230.350.46CP1, CP0 = 01CPX = 10.470.670.88
CPX = 00.360.520.68CP1, CP0 = 10CPX = 10.701.001.30
CPX = 00.480.690.90
Charge-Pump Current (Note 7)
CP1, CP0 = 11CPX = 10.911.311.70
Charge-Pump Voltage
ComplianceSink/source currents match within ±5%0.5VCC -
0.5V
AC ELECTRICAL CHARACTERISTICS (continued)

(MAX2150 EV kit. VCC= +2.7V to +3.6V, SHDN= PLLEN = TXEN = high, BUFEN = low. Input I/Q signals: FI/Q = 500kHz, VI/Q = 1VP-P.
I+, Q+ single-ended input, driven from AC-coupled source. I-, Q- single-ended inputs are AC-coupled to GND. RFOUT and BUFOUT
output ports are terminated in 50Ωloads. fLO=1750MHz, PLO= -10dBm, typical values are at VCC= +3V, TA= +25°C, unless other-
wise noted.) (Note 1)
Note 1:
Parameters are guaranteed by production testing at +25°C and +85°C. Minimum and maximum values over the tempera-
ture and supply voltage range are guaranteed by design and characterization.
Note 2:
Guaranteed by design and characterization.
Note 3:
Measured with MAX2150 EV kit.
Note 4:
Measured with an on-chip crystal oscillator.
Note 5:
In-loop spurious emissions occur when synthesizing a frequency at an integer multiple of the comparison frequency with
fractional offset within the PLL loop BW.
Note 6:
If an on-chip oscillator is used, a fundamental tone crystal is needed.
Note 7:
Minimum and maximum values at CPX = 1 are guaranteed by production testing. Values at CPX = 0 are guaranteed by
design and characterization.
MAX2150
Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer
SUPPLY CURRENT
vs. SUPPLY VOLTAGE

MAX2150 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
+85°C
+25°C
-40°C
TX MODE
MODULATION OUTPUT POWER
vs. FREQUENCY
MAX2150 toc02
FREQUENCY (MHz)
MODULATION OUTPUT POWER (dBm)
+85°C
+25°C
-40°C
TXEN = HIGH
MODULATION OUTPUT POWER
vs. FREQUENCY

MAX2150 toc03
FREQUENCY (MHz)
MODULATION OUTPUT POWER (dBm)
+85°C
+25°C
-40°C
TXEN = LOW
OUTPUT POWER vs. LO POWER

MAX2150 toc04
LO POWER (dBm)
OUTPUT POWER (dBm)1089
CARRIER AND SIDEBAND
SUPPRESSIONS vs. LO POWER
MAX2150 toc05
LO POWER (dBm)
CARRIER AND SIDEBAND SUPPRESSIONS (dB)1098
SIDEBAND SUPPRESSION
CARRIER SUPPRESSION
MODULATOR OUTPUT POWER
vs. I/Q INPUT LEVEL

MAX2150 toc06
I/Q INPUT LEVEL (mV)
MODULATOR OUTPUT POWER (dBm)
-40°C
+25°C
+85°C
Typical Operating Characteristics

(MAX2150 EV kit. VCC= +3V, SHDN= PLLEN = TXEN = high, BUFEN = low. Input I/Q signals: FI/Q= 500kHz, VI/Q= 1VP-P. I+, Q+ sin-
gle-ended input, driven from AC-coupled source. I-, Q- single-ended inputs are AC-coupled to GND. RFOUT and BUFOUT output ports
are terminated in 50Ωloads. fLO=1750MHz, PLO= -10dBm, TA= +25°C, unless otherwise noted.)
MAX2150
Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer
MODULATOR OUTPUT IP3 vs. VCC

MAX2150 toc07
VCC (V)
MODULATOR OUTPUT IP3 (dBm)
-40°C
+25°C
+85°C
MODULATOR OUTPUT P1dB vs. VCC

MAX2150 toc08
VCC (V)
MODULATOR OUTPUT P1dB (dBm)
-40°C
+25°C
+85°C
LO PORT INPUT RETURN LOSS
vs. FREQUENCY

MAX2150 toc09
FREQUENCY (MHz)
LO PORT RETURN LOSS (dB)
BUFOUT PORT RETURN LOSS
vs. FREQUENCY
MAX2150 toc10
FREQUENCY (MHz)
BUFOUT PORT RETURN LOSS (dB)
LO BUFFER OUTPUT POWER
vs. FREQUENCY
MAX2150 toc11
FREQUENCY (MHz)
LO BUFFER OUTPUT POWER (dBm)
-40°C
+25°C
+85°C
BUFEN = HIGH
LO BUFFER OUTPUT POWER
vs. FREQUENCY

MAX2150 toc12
FREQUENCY (MHz)
LO BUFFER OUTPUT POWER (dBm)
-40°C
+25°C
+85°C
BUFEN = LOW
Typical Operating Characteristics (continued)

(MAX2150 EV kit. VCC= +3V, SHDN= PLLEN = TXEN = high, BUFEN = low. Input I/Q signals: FI/Q= 500kHz, VI/Q= 1VP-P. I+, Q+
single-ended input, driven from AC-coupled source. I-, Q- single-ended inputs are AC-coupled to GND. RFOUT and BUFOUT output
ports are terminated in 50Ωloads. fLO=1750MHz, PLO= -10dBm, TA= +25°C, unless otherwise noted.)
MAX2150
Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer
OSCIN PORT SENSITIVITY
(SYNTHESIZER) vs. FREQUENCY

MAX2150 toc13
FREQUENCY (MHz)
OSCIN PORT SENSITIVITY (V)403530252015
-40°C
-40°C
+25°C
+25°C
+85°C
+85°C
OSCIN IMPEDANCE vs. FREQUENCY

MAX2150 toc14
FREQUENCY (MHz)
OSCIN PORT IMPEDANCE (403035202515
IMAGINARY
REAL
SYNTHESIZER PHASE NOISE

MAX2150 toc15
SPAN = 20kHzCENTER = 1.75MHz
-8.5dBm
N/C = -99dBc/Hz
I/Q MODULATOR OUTPUT SPURS

MAX2150 toc16
SPAN = 2 MHzCENTER = 1.75 GHz
1 AVG
CARRIER
SUPPRESSION
-34dBcSIDEBAND
SUPPRESSION
-36dBc
Typical Operating Characteristics (continued)

(MAX2150 EV kit. VCC= +3V, SHDN= PLLEN = TXEN = high, BUFEN = low. Input I/Q signals: FI/Q= 500kHz, VI/Q= 1VP-P. I+, Q+
single-ended input, driven from AC-coupled source. I-, Q- single-ended inputs are AC-coupled to GND. RFOUT and BUFOUT output
ports are terminated in 50Ωloads. fLO=1750MHz, PLO= -10dBm, TA= +25°C, unless otherwise noted.)
MAX2150
Wideband I/Q Modulator with Sigma-Delta
Fractional-N Synthesizer
Pin Description
PINNAMEFUNCTION
TXENModulator Enable Input. Set TXEN low to inhibit the RF and modulator circuits. This mode can be used
for quiet frequency synthesis.VCC_PASupply Voltage Input for RFOUT Output Driver Circuits. Bypass as close to the pin as possible. The
bypass capacitor should not share ground vias with other branches.RFOUTModulator RF Output. This is a wideband, internally matched 50Ω output. A DC-blocking capacitor is
required.
4, 5N.C.Do Not Connect. (These pins must be left floating.)LOCKLock Status of the PLL. A static logic-level high indicates that the PLL is in the locked condition.VCC_SDSupply Voltage Input for Sigma-Delta Modulator Circuits. Bypass as close to the pin as possible. The
bypass capacitor should not share ground vias with other branches.
8, 9, 10CLK, DATA,
Input Pins from 3-Wire Serial Bus. An RC lowpass filter on each of these pins can be used to reduce
digital noise.SHDNShutdown Control. Set SHDN low to disable all internal circuits for lowest power consumption. An RC
lowpass filter can be used to reduce digital noise.SYNENSynthesizer Enable Input. Set SYNTH low to disable the internal frequency synthesizer. An RC lowpass
filter can be used to reduce digital noise.OSCIN
Reference Oscillator Input. Connect a parallel, resonant, fundamental-tone crystal between this pin and
ground to facilitate a crystal oscillator circuit. For applications with an external reference oscillator, the
OSCIN input can be driven through a large-value series capacitor.VCC_XTALSupply Voltage Input for Crystal Oscillator. Bypass as close to the pin as possible. The bypass capacitor
should not share ground vias with other branches.VCC_CHPSupply Voltage Input for Charge Pump. Bypass as close to the pin as possible. The bypass capacitor
should not share ground vias with other branches.CHP
High-Impedance Charge-Pump Output. Connect to the tune input of the VCO through the PLL loop filter.
Keep the line from this pin to the tune input as short as possible to prevent spurious pickup, and
connect the loop filter as close to the tune input as possible.VCC_ASupply Voltage Input for PLL. Bypass as close to the pin as possible. The bypass capacitor should not
share ground vias with other branches.VCC_DSupply Voltage Input for PLL. Bypass as close to the pin as possible. The bypass capacitor should not
share ground vias with other branches.VCC_LOSupply Voltage Input for Internal LO Circuits. Bypass as close to the pin as possible. The bypass
capacitor should not share ground vias with other branches.
20, 21LO-, LO+Differential Local-Oscillator Input. These inputs require DC-blocking capacitors. The LO can be applied
with a single-ended input to the LO+/LO- pin. In this mode, the other pin should be AC-grounded.BUFOUTBuffered LO Output. Internally matched to 50Ω, requires a DC-blocking capacitor.BUFENLO Output Buffer Amplifier Enable. Set BUFEN high to enable the on-chip output LO buffer for driving
external circuits. An RC lowpass filter can be used to reduce digital noise.
24, 25Q-, Q+Differential Q-Channel Baseband Inputs to the Modulator. These pins connect directly to the bases of
a differential pair and require an external common-mode bias voltage of 1.6V.
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