IC Phoenix
 
Home ›  MM36 > MAX2140ETH+-MAX2140ETH+T-MAX2140ETH+TCK3,Complete SDARS Receiver
MAX2140ETH+-MAX2140ETH+T-MAX2140ETH+TCK3 Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
MAX2140ETH+ |MAX2140ETHMAXIMN/a5635avaiComplete SDARS Receiver
MAX2140ETH+T |MAX2140ETHTMAXINN/a8562avaiComplete SDARS Receiver
MAX2140ETH+TCK3 |MAX2140ETHTCK3MAXN/a3569avaiComplete SDARS Receiver


MAX2140ETH+T ,Complete SDARS ReceiverFeaturesThe MAX2140 complete receiver is designed for satellite ● Integrated Receiver, Requires Onl ..
MAX2140ETH+TCK3 ,Complete SDARS ReceiverElectrical Characteristics(V = 3.1V to 3.6V; VINANT ≥ V , VOUTANT in open circuit, T = -40°C to +85 ..
MAX214CPI ,Programmable DTE/DCE, +5V RS-232 TransceiverELECTRICAL CHARACTERISTICS(V = 4.5V to 5.5V, C1 to C4 = 1m F, T = T to T , unless otherwise noted.) ..
MAX214CWI ,Programmable DTE/DCE, +5V RS-232 TransceiverELECTRICAL CHARACTERISTICS(V = 4.5V to 5.5V, C1 to C4 = 1m F, T = T to T , unless otherwise noted.) ..
MAX214CWI ,Programmable DTE/DCE, +5V RS-232 TransceiverFeaturesThe MAX214 +5V RS-232 transceiver provides a com-' Eliminates Null Modem Cablesplete, 8-lin ..
MAX214CWI ,Programmable DTE/DCE, +5V RS-232 TransceiverApplicationsAT-Compatible Laptop Computers______________Ordering InformationAT-Compatible Desktop C ..
MAX525BCPP ,Low-Power, Quad, 12-Bit Voltage-Output DAC with Serial InterfaceFeaturesThe MAX525 combines four low-power, voltage-output, ' Four 12-Bit DACs with Configurable 12 ..
MAX525BEAP ,Low-Power, Quad, 12-Bit Voltage-Output DAC with Serial InterfaceMAX52519-1098; Rev 1; 12/96Low-Power, Quad, 12-Bit Voltage-Output DACwith Serial Interface_________ ..
MAX525BEAP+ ,Low-Power, Quad, 12-Bit Voltage-Output DAC with Serial InterfaceGeneral Description __________
MAX525BEAP+T ,Low-Power, Quad, 12-Bit Voltage-Output DAC with Serial InterfaceFeaturesThe MAX525 combines four low-power, voltage-output, ♦ Four 12-Bit DACs with Configurable 12 ..
MAX5264ACMH ,Octal, 14-Bit Voltage-Output DAC with Parallel Interface for ATEApplications LD 7 27 D12A2 8 26 D11A1 9 25 D10A0 10 24 D9CS 11 23 D8Functional Diagram appears at e ..
MAX526CCNG+ ,Calibrated, Quad, Voltage-Output, 12-Bit DACFeatures ' Reference Input Range Includes Ground (C, D grades) ' Full 12-Bit Performance Withou ..


MAX2140ETH+-MAX2140ETH+T-MAX2140ETH+TCK3
Complete SDARS Receiver
General Description
The MAX2140 complete receiver is designed for satellite
digital audio radio services (SDARS). The device includes
a fully monolithic VCO and only needs a SAW at the IF
and a crystal to generate the reference frequency.
To form a complete SDARS radio, the MAX2140 requires
only a low-noise amplifier (LNA), which can be controlled
by a baseband controller. The small number of external
components needed makes the MAX2140-based platform
the lowest cost and the smallest solution for SDARS.
The receiver includes a self-contained RF AGC loop and
baseband-controlled IF AGC loop, effectively providing a
total dynamic range of over 92dB.
Channel selectivity is ensured by the SAW filter and by
on-chip monolithic lowpass filters.
The fractional-N PLL allows a very small frequency step,
making possible the implementation of an AFC loop.
Additionally, the reference is provided by an external
XTAL and on-chip oscillator. A reference buffer output is
also provided.
A 2-wire interface (I2C-bus compatible) programs the
circuit for a wide variety of conditions, providing features
such as:●Programmable gains●Lowpass filters tuning●Individual functional block shutdown
The MAX2140 minimizes the requirement on the base-
band controller. No compensation or calibration proce-
dures are required. The device is available in a 7mm x
7mm 44-pin thin QFN package.
Applications
●Satellite Digital Audio Radio Services (SDARS)●2.4GHz ISM Radios
Features
●Integrated Receiver, Requires Only One SAW Filter●Self-Contained RF AGC Loop●Differential I/Q Interface●Complete Integrated Frequency Generation●Bias Supply for External LNAs●Overcurrent Protection●Low-Power Standby Mode●Very Small 44-Pin Thin QFN Package
*EP = Exposed pad.
+Denotes a lead(Pb)-free/RoHS-compliant package.
PARTTEMP RANGEPIN-PACKAGE

MAX2140ETH-40°C to +85°C44 Thin QFN-EP*
MAX2140ETH+-40°C to +85°C44 Thin QFN-EP*
IF2QO-SCLIF2QI-IF2QO+
RFAGC_C
VCC_FE0
RFIN-
XM TUNER
I2CA1I
CA2
SDA
IFOUT-
IFOUT+
VCC_FE1
RFIN+
CHP
1/N
1/R
/4/8
QUAD
PFD
IF2II-
IF2IO+
IF2IO-
IF2II+
VINANT
VOUT
ANT
VCC_BE11415
VCC_BE2
IOUT
IOUT+1922121836373438394041424344
VCC_FE2
IFIN-
IFIN+
IF2QI+
VCC_FE3
QOUT
QOUT+
VCC_D
VCC_BE4
VCC_A
LOCK
CPOUT
VCCREG
REFOUT
VCC_XTAL
XTAL
VTUNE
VCC_BE3
AGCPWM
LPFHPF
LPFHPF
AGC
VCC_VCO
∑ ∆ - MOD
ACTUAL SIZE
7mm x 7mm
MAX2140
MAX2140Complete SDARS Receiver
Block Diagram/Pin Coniguration
Ordering Information
EVALUATION KIT AVAILABLE
VCC_XX to GND ...................................................-0.3V to +4.3V
VINANT to GND ...................................................-0.3V to +5.6V
AGCPWM to GND ................................................-0.3V to +3.0V
Digital Input Current .........................................................±10mA
Maximum VSWR Without Damage ........................................4:1
Maximum VSWR Without Oscillations ...................................4:1
All Other Pins ...........................................-0.3V to (VCC + 0.3V)
Continuous Power Dissipation (TA = +70°C)
44-Pin TQFN (derate 26.31mW/°C above +70°C) ....2105mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
θJC .....................................................................................1°C/W
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
(VCC = 3.1V to 3.6V; VINANT ≥ VCC, VOUTANT in open circuit, TA = -40°C to +85°C. Typical values are at VCC = 3.3V, VVINANT =
3.3V, and TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Supply Voltage Range (Note 2)VCC3.13.33.6VVINANT3.13.35.3
Operating Supply CurrentICCAll blocks on150180mA
ISHDNAll blocks off30µA
Lock Indicator High (Locked)VIH_LKVCC - 0.5V
Lock Indicator Low (Unlocked)VIL_LK0.5V
Digital Input-Logic HighVIHVCC - 0.5V
Digital Input-Logic LowVIL0.5V
Input Current for Digital Control
PinsIDIG-1+1µA
Input Current for AGCPWMIAGCPWM-10+290µA
Voltage Drop VINANT to
VOUTANT in Normal Operating
Mode
VANTDC-
DROP
Maximum current sink at VOUTANT is
150mA0.35V
Current Sink at VOUTANT to Flag
Bit ACP = 1IANTDC_HVOUTANT shorted to ground (Note 4)195500mA
Current Sink at VOUTANT to Flag
Bit AND = 1IANTDC_L122030mA
MAX2140Complete SDARS Receiver
Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
DC Electrical Characteristics
CAUTION! ESD SENSITIVE DEVICE
(MAX2140 EV kit, current drawn at VOUTANT, IVOUTANT = 150mA max, VCC = 3.1V to 3.6V, VVINANT = 3.1V to 5.3V, fRF = 2320MHz
to 2345MHz, fLO = 2076MHz, TA = -40°C to +85°C. Typical values are at VCC = VVINANT = 3.3V, fRF = 2338MHz, TA = +25°C, unless
otherwise noted.) (Note 2)
Interstage (IF) 259MHz SAW filter specification: insertion loss = 19dB max, 9.3MHz to 12MHz from center attenuation = 24dB min,
beyond 12MHz from center attenuation = 40dB min.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
GENERAL RECEIVER

Minimum Input RF Power to
Produce 20mVP-P (Differential) at
I and Q Baseband Outputs
PMINIF AGC is set at maximum gain,
bit HPF = 0 (Note 4)-91-84dBm
Maximum Input RF Power to
Produce 400mVP-P (Differential)
at I and Q Baseband Outputs
PMAX
RF AGC threshold: RF_AGC_TRIP =
-17dBm; IF AGC is set at minimum gain, bit
HPF = 0 dBm
LO to RF Input Leakage PLK_HLO-related spurious > 2GHz-66dBmPLK_LLO-related spurious < 2GHz-38
Noise Figure (Notes 3, 5)NF
RF AGC is at maximum gain,
IF AGC is at reference gain8.510.4
RF AGC is at maximum gain,
IF AGC is at reference gain -10dB9.311.7
RF AGC is at maximum gain -5dB,
IF AGC is at reference gain13.315.5
RF AGC is at maximum gain -10dB,
IF AGC is at reference gain17.821.5
In-Band Input IP3 (Notes 5, 6)I_IIP3
RF AGC is at maximum gain,
IF AGC is at reference gain-32
dBm
RF AGC is at maximum gain,
IF AGC is at reference gain -5dB-27
RF AGC is at maximum gain -30dB,
IF AGC is at reference gain -43dB+9
RF AGC is at maximum gain -20dB,
IF AGC is at reference gain -53dB+6
Out-of-Band Input IP3
(Notes 5, 7)O_IIP3
RF AGC is at maximum gain,
IF AGC is at reference gain-9
dBmRF AGC is at maximum gain -7dB,
IF AGC is at reference gain-3
RF AGC is at maximum gain -25dB,
IF AGC is at reference gain+12
MAX2140Complete SDARS Receiver
AC Electrical Characteristics
(MAX2140 EV kit, current drawn at VOUTANT, IVOUTANT = 150mA max, VCC = 3.1V to 3.6V, VVINANT = 3.1V to 5.3V, fRF = 2320MHz
to 2345MHz, fLO = 2076MHz, TA = -40°C to +85°C. Typical values are at VCC = VVINANT = 3.3V, fRF = 2338MHz, TA = +25°C, unless
otherwise noted.) (Note 2)
Interstage (IF) 259MHz SAW filter specification: insertion loss = 19dB max, 9.3MHz to 12MHz from center attenuation = 24dB min,
beyond 12MHz from center attenuation = 40dB min.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

In-Band Input IP2 (Notes 5, 6)I_IIP2
RF AGC is at maximum gain,
IF AGC is at reference gain+1
dBmRF AGC is at maximum gain,
IF AGC is at reference gain -5dB+6
RF AGC is at maximum gain,
IF AGC is at reference gain -25dB+27
Out-of-Band Input IP2
(Notes 5, 7)O_IIP2
RF AGC is at maximum gain,
IF AGC is at reference gain+38
dBmRF AGC is at maximum gain -7dB,
IF AGC is at reference gain+45
RF AGC is at maximum gain -25dB,
IF AGC is at reference gain+60
Opposite Sideband RejectionOSRBaseband frequencies = 100kHz (Note 4)3239dB
Image RejectionIRejAt fLO - fIF 54dB
Half IF RejectionHRejAt fLO + 0.5 x fIF 53dB
RF AGC LOOP

LNA Gain ReductionRFAGC_
Range(Note 4)3042dB
Minimum RF AGC Trip PointRFAGC_minBits RF4/3/2/1/0 = 00000 (BIN)-35dBm
RF AGC Trip PointRFAGC_intBits RF4/3/2/1/0 = 00010 (BIN) (Note 4)-37-33-29dBm
Maximum RF AGC Trip PointRFAGC_maxBits RF4/3/2/1/0 = 10100 (BIN)-15dBm
FRONT-END (FE) PROGRAMMABLE GAIN

FE Programmable Gain RangeFE_Rge(Note 4)192226dB
FE Programmable Gain StepFE_Step2dB
IF FILTER INTERFACE

IF Output Differential AdmittanceYout, IFBetween pins IFOUT+, IFOUT-,
fIF = 259MHz and 467MHz
1/900
+ j0S
Input Differential Impedance
Presented by the IC to the IF
Filter Output
Zin, IFBetween pins IFOUT+, IFOUT-,
fIF = 259MHz and 467MHz
+ j0Ω
IF AGC LOOP

IF AGC Control Voltage for Max
GainIFAGC_VMApplied at pin AGCPWM0.2V
IF AGC Control Voltage for Min
GainIFAGC_VmApplied at pin AGCPWM2.5V
MAX2140Complete SDARS Receiver
AC Electrical Characteristics (continued)
(MAX2140 EV kit, current drawn at VOUTANT, IVOUTANT = 150mA max, VCC = 3.1V to 3.6V, VVINANT = 3.1V to 5.3V, fRF = 2320MHz
to 2345MHz, fLO = 2076MHz, TA = -40°C to +85°C. Typical values are at VCC = VVINANT = 3.3V, fRF = 2338MHz, TA = +25°C, unless
otherwise noted.) (Note 2)
Interstage (IF) 259MHz SAW filter specification: insertion loss = 19dB max, 9.3MHz to 12MHz from center attenuation = 24dB min,
beyond 12MHz from center attenuation = 40dB min.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

IF AGC Gain-Control RangeIFAGC_
Rge(Note 4)4764dB
INTERNAL BASEBAND LOWPASS FILTERS

LPF In-Band RippleLPFA_ripFrom 0 to 6.3MHz with respect to the
amplitude at 100kHz0.7dB
LPF Out-of-Band Rejection
(Note 4)
LPFrejAt 10.25MHz with respect to the amplitude
at 2MHz1421
LPFrejAt 16MHz with respect to the amplitude at
2MHz4751
INTERNAL OUTPUT STAGE

Gain IncreaseBB_DGFrom bit HPF = 0 to HPF = 14dB
Maximum I/QOUT± Pin LoadingIQ_loadPer each of the four pins10//10kΩ//pF
FREQUENCY GENERATION: VCO AND PLL

VCO Frequency RangeVCO_RangeOver VCHP range (Note 4)18612079MHz
VCO Tuning GainVCO_Gain(Note 4)240MHz/V
Synthesized VCO Phase NoiseVCO_PN
At 1kHz within PLL band-79
dBc/HzAt 10kHz outside PLL band-80
At 100kHz outside PLL band-101
Synthesized VCO Phase-Noise
JitterVCO_jitIntegrated from 100Hz to 100kHz, LO
frequency = 2079MHz1.2DegRMS
Charge-Pump Voltage RangeVCHP0.402.75V
Charge-Pump CurrentICHPBit CHP = 00.6mABit CHP = 11.2
Pin CHP Leakage CurrentCHP_leakAcross VCHP range5nA
PLL Reference Division RatioPLLref12
Synthesized VCO Smallest
Fractional StepPLLstepProgrammable through I2C23Hz
MAX2140Complete SDARS Receiver
AC Electrical Characteristics (continued)
(MAX2140 EV kit, current drawn at VOUTANT, IVOUTANT = 150mA max, VCC = 3.1V to 3.6V, VVINANT = 3.1V to 5.3V, fRF = 2320MHz
to 2345MHz, fLO = 2076MHz, TA = -40°C to +85°C. Typical values are at VCC = VVINANT = 3.3V, fRF = 2338MHz, TA = +25°C, unless
otherwise noted.) (Note 2)
Interstage (IF) 259MHz SAW filter specification: insertion loss = 19dB max, 9.3MHz to 12MHz from center attenuation = 24dB min,
beyond 12MHz from center attenuation = 40dB min.
Note 1:
At TA = -40°C, minimum and maximum values are guaranteed by design and characterization.
Note 2:
Minimum and maximum values are guaranteed by design and characterization, unless otherwise noted.
Note 3:
At TA = +25°C, minimum and maximum values are guaranteed by design and characterization.
Note 4:
At TA = +25°C and TA = +85°C, parameters are production tested.
Note 5:
IF AGC reference level is defined as being the required voltage applied on pin AGCPWM, and the corresponding receiver IF
gain, to measure 20mVP-P at each I/Q differential output when the RF input power is -91dBm. If even for zero volts applied
on pin AGCPWM the I/Q differential outputs are below 20mVP-P when the RF input power is -91dBm, then the reference
level is defined as zero volts.
Note 6:
In-band IP2 and IP3 are measured with two CW tones at RF input: f1 = 2339.55MHz, f2 = 2339.75MHz.
Note 7:
Out-of-band IP2 and IP3 are measured with two CW tones at RF input: f1 = 2326.25MHz, f2 = 2330.25MHz.
Note 8:
Error computed using a crystal with no error.
Note 9:
No spur in the offset frequency range.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Synthesized VCO SpursVCOspur
0Hz < foffset < 10kHz(Note 9)
dBc10kHz < foffset < 1MHz(Note 9)
1MHz < foffset < 10MHz-47
XTAL Oscillator Frequency RangeXTALrge2449MHz
XTAL Oscillator Frequency ErrorXTALerrorUsing an external XTAL (Note 8)-16+16ppm
XTAL Oscillator Input VoltageXTALswingUsing an external TCXO0.8VCCVP-P
XTAL Oscillator Input Duty CycleXTALdutyUsing an external TCXO475053%
Reference Buffer Output VoltageREFVUsing the REFOUT pin loading speciied
below (Note 4)0.951.10VP-P
Reference Buffer Output Duty
CycleREFduty
Using an external XTAL, not overdriven; bit
RFD = 0, using the REFOUT pin loading speciied below5055%
Maximum REFOUT Pin LoadingREFOUT_1dREFOUT pin frequency = 24MHz20pFREFOUT pin frequency = 48MHz8
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
SERIAL INTERFACE (NOTE 2)

Serial Clock FrequencyfSCL200kHz
MAX2140Complete SDARS Receiver
AC Electrical Characteristics (continued)
Timing Characteristics
(TA = +25°C, unless otherwise noted.)
RF AGC ENGAGEMENT THRESHOLD

MAX2140 toc02
RF AGC ENGAGEMENT SETTING
RF AGC ENGAGEMENT THRESHOLD (dBm)1284
DIVIDER: /4
DIVIDER: /8
RF AGC ATTENUATION
vs. CONTROL VOLTAGE

MAX2140 toc03
CONTROL VOLTAGE (V)
RF AGC ATTENUATION (dB)
TA = +85°C
TA = +25°CTA = -40°C
RF AGC SETTLING TIME
WITH 20dB STEP

MAX2140 toc04
START TIME: 0µs
STOP TIME: 200µs
RF AGC ATTACK
TIME
RF AGC DECAY
TIME
0dBm
5dB/div
-50dBm
IF AGC ATTENUATION
vs. CONTROL VOLTAGE

MAX2140 toc05
CONTROL VOLTAGE (V)
IF AGC ATTENUATION (dB)
R4 = 100Ω
C32 = 0.1µF
TA = +85°C
TA = +25°C
TA = -40°C
IF AGC ATTENUATION
vs. CONTROL VOLTAGE

MAX2140 toc06
CONTROL VOLTAGE (V)
IF AGC ATTENUATION (dB)
R4 = 5000Ω
C32 = 0.22µF
TA = +85°C
TA = +25°C
TA = -40°C
INPUT RETURN LOSS
vs. FREQUENCY

MAX2140 toc01
FREQUENCY (GHz)
INPUT RETURN LOSS (dB)
MAXIMUM RF AGC
MINIMUM RF AGC
-100dB
1MHz16MHz
0dB
LPF FREQUENCY RESPONSE

MAX2140 toc0710.250000MHz
-27.278dB
MAX2140Complete SDARS Receiver
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
REF
80ns
100ns/div
LPF GROUP DELAY vs. FREQUENCY

MAX2140 toc08
6.250000MHz
113.8ns
1MHz16MHz
-50dBc/Hz
-150dBc/Hz
FREQUENCY OFFSET (Hz)1M10
VCO PHASE NOISE vs. OFFSET FREQUENCY

MAX2140 toc09
REFOUT WAVEFORM (REF = 0, RFD = 0)

MAX2140 toc10
20ns/div
500mV/div
REFOUT WAVEFORM (REF = 1, RFD = 0)

MAX2140 toc11
10ns/div
200mV/div
REFOUT WAVEFORM (REF = 1, RFD = 1)

MAX2140 toc12
20ns/div
500mV/div
MAX2140Complete SDARS Receiver
Typical Operating Characteristics (continued)
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED