MAX1902EAI+T ,500kHz Multi-Output, Low-Noise Power-Supply Controllers for Notebook ComputersApplicationsINPUTNotebook and Subnotebook Computers5V (RTC) 12VPDAs and Mobile Communicators5V 12VL ..
MAX1904BEAI+ ,500kHz Multi-Output, Low-Noise Power-Supply Controllers for Notebook ComputersApplicationsINPUTNotebook and Subnotebook Computers5V (RTC) 12VPDAs and Mobile Communicators5V 12VL ..
MAX1904BEAI+ ,500kHz Multi-Output, Low-Noise Power-Supply Controllers for Notebook ComputersFeaturesThe MAX1901/MAX1902/MAX1904 are buck-topology, ♦ 97% Efficiencystep-down, switch-mode, powe ..
MAX1904EAI ,500kHz Multi-Output / Low-Noise Power-Supply Controllers for Notebook ComputersFeaturesThe MAX1901/MAX1902/MAX1904 are buck-topology, 97% Efficiencystep-down, switch-mode, powe ..
MAX1904EAI ,500kHz Multi-Output / Low-Noise Power-Supply Controllers for Notebook ComputersFeaturesThe MAX1901/MAX1902/MAX1904 are buck-topology, 97% Efficiencystep-down, switch-mode, powe ..
MAX1904EAI+ ,500kHz Multi-Output, Low-Noise Power-Supply Controllers for Notebook ComputersMAX1901/MAX1902/MAX190419-2224; Rev 3; 12/03500kHz Multi-Output, Low-Noise Power-SupplyControllers ..
MAX485ECSA+T ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 TransceiversApplications:ceivers on the bus. The MAX488E–MAX491E areMAX3483E/MAX3485E/MAX3486E/MAX3488E/designe ..
MAX485EEPA ,15kV ESD-Protected / Slew-Rate-Limited / Low-Power / RS-485/RS-422 TransceiversFeaturesThe MAX481E, MAX483E, MAX485E, MAX487E–MAX491E, ' ESD Protection: ±15kV—Human Body Modelan ..
MAX485EEPA+ ,±15kV ESD-Protected, Slew-Rate-Limited, Low-Power, RS-485/RS-422 TransceiversApplications:MAX491E, and MAX1487E are low-power transceivers forMAX3430: ±80V Fault-Protected, Fai ..
MAX485EESA ,15kV ESD-Protected / Slew-Rate-Limited / Low-Power / RS-485/RS-422 TransceiversGeneral Description ________
MAX485EESA ,15kV ESD-Protected / Slew-Rate-Limited / Low-Power / RS-485/RS-422 Transceiversapplications. For
MAX485EESA ,15kV ESD-Protected / Slew-Rate-Limited / Low-Power / RS-485/RS-422 TransceiversGeneral Description ________
MAX1901ETJ+-MAX1901ETJ+T-MAX1901ETJ-T-MAX1902EAI+-MAX1902EAI+T-MAX1904BEAI+-MAX1904EAI+-MAX1904EAI+T-MAX1904ETJ+T
500kHz Multi-Output, Low-Noise Power-Supply Controllers for Notebook Computers
General DescriptionThe MAX1901/MAX1902/MAX1904 are buck-topology,
step-down, switch-mode, power-supply controllers that
generate logic-supply voltages in battery-powered sys-
tems. These high-performance, dual/triple-output devices
include on-board power-up sequencing, power-good sig-
naling with delay, digital soft-start, secondary winding
control, low dropout circuitry, internal frequency-compen-
sation networks, and automatic bootstrapping.
Up to 97% efficiency is achieved through synchronous
rectification and Maxim’s proprietary Idle Mode™ control
scheme. Efficiency is greater than 80% over a 1000:1
load-current range, which extends battery life in system
suspend or standby mode. Excellent dynamic response
corrects output load transients within five clock cycles.
Strong 1A on-board gate drivers ensure fast external N-
channel MOSFET switching.
These devices feature a logic-controlled and synchroniz-
able, fixed-frequency, pulse-width modulation (PWM)
operating mode. This reduces noise and RF interference
in sensitive mobile communications and pen-entry appli-
cations. Asserting the SKIPpin enables fixed-frequency
mode, for lowest noise under all load conditions.
The MAX1901/MAX1902/MAX1904 include two PWM reg-
ulators, adjustable from 2.5V to 5.5V with fixed 5.0V and
3.3V modes. All these devices include secondary feed-
back regulation, and the MAX1902 contains a 12V/120mA
linear regulator. The MAX1901/MAX1904 include a sec-
ondary feedback input (SECFB), plus a control pin
(STEER) that selects which PWM (3.3V or 5V) receives the
secondary feedback signal. SECFB provides a method
for adjusting the secondary winding voltage regulation
point with an external resistor divider, and is intended to
aid in creating auxiliary voltages other than fixed 12V.
The MAX1901/MAX1902 contain internal output overvolt-
age and undervoltage protection features.
________________________ApplicationsNotebook and Subnotebook Computers
PDAs and Mobile Communicators
Desktop CPU Local DC-DC Converters
Features97% Efficiency4.2V to 30V Input Range2.5V to 5.5V Dual Adjustable OutputsSelectable 3.3V and 5V Fixed or Adjustable
Outputs (Dual Mode™)12V Linear RegulatorAdjustable Secondary Feedback
(MAX1901/MAX1904)5V/50mA Linear Regulator OutputPrecision 2.5V Reference OutputProgrammable Power-Up SequencingPower-Good (RESET) OutputOutput Overvoltage Protection
(MAX1901/MAX1902)Output Undervoltage Shutdown
(MAX1901/MAX1902)333kHz/500kHz Low-Noise, Fixed-Frequency
OperationLow-Dropout, 98% Duty-Factor Operation2.5mW Typical Quiescent Power (12V input, both
SMPSs on)4µA Typical Shutdown Current
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersLINEAR
12V
LINEAR
POWER-UP
SEQUENCE
POWER-
GOOD
3.3V
SMPS
SMPS
RESETON/OFF
5V (RTC)
3.3V
INPUT
12V
Functional Diagram19-2224; Rev 3; 12/03
Ordering InformationIdle Mode is a trademark of Maxim Integrated Products, Inc.
Dual Mode is a trademark of Maxim Integrated Products, Inc.
Pin Configurations appear at end of data sheet.
PARTTEMP RANGEPIN-PACKAGE
MAX1901EAI-40°C to +85°C28 SSOP
MAX1901ETJ-40°C to +85°C32 Thin QFN 5m m x 5m m
MAX1902EAI-40°C to +85°C28 SSOP
MAX1902ETJ-40°C to +85°C32 Thin QFN 5m m x 5m m
MAX1904EAI-40°C to +85°C28 SSOP
MAX1904ETJ-40°C to +85°C32 Thin QFN 5m m x 5m m
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(V+ = 15V, both PWMs on, SYNC = VL, VLload = 0, REF load = 0, SKIP= 0, TA
= 0°C to +85°C, unless otherwise noted. Typicalvalues are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V+ to GND..............................................................-0.3V to +36V
PGND to GND.....................................................................±0.3Vto GND ................................................................-0.3V to +6V
BST3, BST5 to GND ..............................................-0.3V to +36V
CSH3, CSH5 to GND................................................-0.3V to +6V
FB3 to GND..............................................-0.3V to (CSL3 + 0.3V)
FB5 to GND...............................................-0.3V to (CSL5 +0.3V)
LX3 to BST3..............................................................-6V to +0.3V
LX5 to BST5..............................................................-6V to +0.3V
REF, SYNC, SEQ, STEER, SKIP,
TIME/ON5, SECFB, RESETto GND ........-0.3V to (VL+ 0.3V)
VDDto GND............................................................-0.3V to +20V
RUN/ON3, SHDNto GND.............................-0.3V to (V+ + 0.3V)
12OUT to GND ..........................................-0.3V to (VDD+ 0.3V)
DL3, DL5 to PGND........................................-0.3V to (VL+ 0.3V)
DH3 to LX3 ..............................................-0.3V to (BST3 + 0.3V)
DH5 to LX5 ..............................................-0.3V to (BST5 + 0.3V)
VL, REF Short to GND ................................................Momentary
12OUT Short to GND..................................................Continuous
REF Current...........................................................+5mA to -1mACurrent.........................................................................+50mA
12OUT Current ..............................................................+200mA
VDDShunt Current............................................................+15mA
Continuous Power Dissipation (TA= +70°C)
28-Pin SSOP (derate 9.52mW/°C above +70°C) ......762mW
32-Pin Thin QFN (derate 21.3mW/°C above +70°C) ..1702mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range ............................-65°C to +160°C
Lead Temperature (soldering, 10s) ................................+300°C
PARAMETERCONDITIONSMINTYPMAXUNITS
MAIN SMPS CONTROLLERSInput Voltage Range4.230.0V
3V Output Voltage in Adjustable ModeV+ = 4.2V to 30V, CSH3 - CSL3 = 0,
CSL3 tied to FB32.422.52.58V
3V Output Voltage in Fixed ModeV+ = 4.2V to 30V, 0 < CSH3 - CSL3
< 80mV, FB3 = 03.203.393.47V
5V Output Voltage in Adjustable ModeV+ = 4.2V to 30V, CSH5 - CSL5 = 0,
CSL5 tied to FB52.422.52.58V
5V Output Voltage in Fixed ModeV+ = 5.3V to 30V, 0 < CSH5 - CSL5
< 80mV, FB5 = 04.855.135.25V
Output Voltage Adjust RangeEither SMPSREF5.5V
Adjustable-Mode Threshold VoltageDual-mode comparator0.51.1V
Load RegulationEither SMPS, 0 < CSH_ - CSL_ < 80mV-2%
Line RegulationEither SMPS, 5.2V < V+ < 30V0.03%/V
CSH3 - CSL3 or CSH5 - CSL580100120Current-Limit ThresholdSKIP = VL or VDD < 13V or SECFB < 2.44V-50-100-150mV
Idle Mode ThresholdSKIP = 0, not tested102540mV
Soft-Start Ramp TimeFrom enable to 95% full current limit with
respect to fOSC (Note 1)512clks
SYNC = VL450500550Oscillator FrequencySYNC = 0283333383kHz
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued)(V+ = 15V, both PWMs on, SYNC = VL, VLload = 0, REF load = 0, SKIP= 0, TA
= 0°C to +85°C, unless otherwise noted. Typicalvalues are at TA= +25°C.)
PARAMETERCONDITIONSMINTYPMAXUNITSSYNC = VL9597Maximum Duty FactorSYNC = 0 (Note 2)96.598%
SYNC Input High-Pulse WidthNot tested200ns
SYNC Input Low-Pulse WidthNot tested200ns
SYNC Rise/Fall TimeNot tested200ns
SYNC Input Frequency Range400583kHz
Current-Sense Input Leakage CurrentV+ = VL = 0,
CSL3 = CSH3 = CSL5 = CSH5 = 5.5V0.0110µA
FLYBACK CONTROLLERVDD Regulation ThresholdFalling edge (Note 3)1314V
SECFB Regulation ThresholdFalling edge (MAX1901/MAX1904)2.442.60V
DL Pulse WidthVDD < 13V or SECFB < 2.44V0.75µs
VDD Shunt ThresholdRising edge, hysteresis = 1% (Note 3)1820V
VDD Shunt Sink CurrentVDD = 20V (Note 3)10mA
VDD Leakage CurrentVDD = 5V, off mode (Notes 3, 4)30µA
12V LINEAR REGULATOR (Note 3)12OUT Output Voltage13V < VDD < 18V, 0 < ILOAD < 120mA11.6512.1012.50V
12OUT Current Limit12OUT forced to 11V, VDD = 13V150mA
Quiescent VDD CurrentVDD = 18V, run mode, no 12OUT load50100µA
INTERNAL REGULATOR AND REFERENCEVL Output VoltageSHDN = V+, RUN/ON3 = TIME/ON5 = 0,
5.4V < V+ < 30V, 0mA < ILOAD < 50mA4.75.1V
VL Undervoltage Lockout-Fault ThresholdFalling edge, hysteresis = 1%3.53.63.7V
VL Switchover ThresholdRising edge of CSL5, hysteresis = 1%4.24.54.7V
REF Output VoltageNo external load (Note 5)2.452.52.55V
0 < ILOAD < 50µA12.5REF Load Regulation0 < ILOAD < 5mA100.0mV
REF Sink Current10µA
REF Fault-Lockout VoltageFalling edge1.82.4V
V+ Operating Supply CurrentVL switched over to CSL5, 5V SMPS on550µA
V+ Standby Supply CurrentV+ = 5.5V to 30V, both SMPSs off, includes
current into SHDN3060µA
V+ Standby Supply Current in DropoutV+ = 4.2V to 5.5V, both SMPSs off, includes
current into SHDN50200µA
V+ Shutdown Supply CurrentV+ = 4.0V to 30V, SHDN = 0410µA
(Note 3)2.54
Quiescent Power Consumption
Both SMPSs enabled,
FB3 = FB5 = 0,
CSL3 = CSH3 = 3.5V,
CSL5 = CSH5 = 5.3VMAX1901/MAX19041.54
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued)(V+ = 15V, both PWMs on, SYNC = VL, VLload = 0, REF load = 0, SKIP= 0, TA
= 0°C to +85°C, unless otherwise noted. Typicalvalues are at TA= +25°C.)
PARAMETERCONDITIONSMINTYPMAXUNITS
FAULT DETECTION (MAX1901/MAX1902)Overvoltage Trip ThresholdWith respect to unloaded output voltage4710%
Overvoltage Fault Propagation DelayCSL_ driven 2% above overvoltage trip
threshold1.5µs
Output Undervoltage ThresholdWith respect to unloaded output voltage607080%
Output Undervoltage Lockout TimeFrom each SMPS enabled, with respect to
fOSC5,0006,1447,000clks
Thermal-Shutdown ThresholdTypical hysteresis = 10°C150°C
RESET
RESET Trip ThresholdWith respect to unloaded output voltage,
falling edge; typical hysteresis = 1%-7-5.5-4%
RESET Propagation DelayFalling edge, CSL_ driven 2% below RESET
trip threshold1.5µs
RESET Delay TimeWith respect to fOSC27,00032,00037,000clks
INPUTS AND OUTPUTSFeedback-Input Leakage CurrentFB3, FB5; SECFB = 2.6V150nA
Logic Input-Low VoltageRUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC0.6V
Logic Input-High VoltageRUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC2.4V
Input Leakage CurrentRUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC, SEQ; VPIN = 0V or 3.3V±1µA
Logic Output-Low VoltageRESET, ISINK = 4mA0.4V
Logic Output-High CurrentRESET = 3.5V1mA
TIME/ON5 Input Trip LevelSEQ = 0 or VL2.42.6V
TIME/ON5 Source CurrentTIME/ON5 = 0, SEQ = 0 or VL2.533.5µA
TIME/ON5 On-ResistanceTIME/ON5; RUN/ON3 = 0, SEQ = 0 or VL1580Ω
Gate-Driver Sink/Source CurrentDL3, DH3, DL5, DH5; forced to 2V1A
SSOP package1.57Gate-Driver On-ResistanceHigh or low (Note 6)QFN package1.58Ω
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
ELECTRICAL CHARACTERISTICS (V+ = 15V, both PWMs on, SYNC = VL, VLload = 0, REF load = 0, SKIP= 0, TA
= -40°C to +85°C, unless otherwise noted.) (Note 7)
PARAMETERCONDITIONSMINTYPMAXUNITS
MAIN SMPS CONTROLLERSInput Voltage Range4.230.0V
3V Output Voltage in Adjustable ModeV+ = 4.2V to 30V, CSH3 - CSL3 = 0,
CSL3 tied to FB32.422.58V
3V Output Voltage in Fixed ModeV+ = 4.2V to 30V, 0 < CSH3 - CSL3
< 80mV, FB3 = 03.203.47V
5V Output Voltage in Adjustable ModeV+ = 4.2V to 30V, CSH5 - CSL5 = 0,
CSL5 tied to FB52.422.58V
5V Output Voltage in Fixed ModeV+ = 5.3V to 30V, 0 < CSH5 - CSL5
< 80mV, FB5 = 04.855.25V
Output Voltage Adjust RangeEither SMPSREF5.5V
Adjustable-Mode Threshold VoltageDual-mode comparator0.51.1V
CSH3 - CSL3 or CSH5 - CSL580120Current-Limit ThresholdSKIP = VL or VDD < 13V or SECFB < 2.44V-50-150mV
SYNC = VL450550Oscillator FrequencySYNC = 0283383kHz
SYNC = VL95Maximum Duty FactorSYNC = 0 (Note 2)97%
SYNC Input Frequency Range400583kHz
FLYBACK CONTROLLERVDD Regulation ThresholdFalling edge (Note 3)1314V
SECFB Regulation ThresholdFalling edge (MAX1901/MAX1904)2.442.60
VDD Shunt ThresholdRising edge, hysteresis = 1% (Note 3)1820
VDD Shunt Sink CurrentVDD = 20V (Note 3)10mA
12V LINEAR REGULATOR (Note 3)12OUT Output Voltage13V < VDD < 18V, 0mA < ILOAD < 100mA11.6512.50V
Quiescent VDD CurrentVDD = 18V, run mode, no 12OUT load100µA
INTERNAL REGULATOR AND REFERENCEVL Output VoltageSHDN = V+, RUN/ON3 = TIME/ON5 = 0,
5.4V < V+ < 30V, 0 < ILOAD < 50mA4.75.1V
VL Undervoltage Lockout-Fault ThresholdFalling edge, hysteresis = 1%3.53.7V
VL Switchover ThresholdRising edge of CSL5, hysteresis = 1%4.24.7V
REF Output VoltageNo external load (Note 5)2.452.55V
0 < ILOAD < 50µA12.5REF Load Regulation0 < ILOAD < 5mA100.0mV
REF Sink Current10µA
REF Fault Lockout VoltageFalling edge1.82.4V
V+ Operating Supply CurrentVL switched over to CSL5, 5V SMPS on50µA
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued) (V+ = 15V, both PWMs on, SYNC = VL, VLload = 0, REF load = 0, SKIP= 0, TA
= -40°C to +85°C, unless otherwise noted.) (Note 7)
PARAMETERCONDITIONSMINTYPMAXUNITSV+ Standby Supply CurrentV+ = 5.5V to 30V, both SMPSs off, includes
current into SHDN60µA
V+ Standby Supply Current in DropoutV+ = 4.2V to 5.5V, both SMPSs off, includes
current into SHDN200µA
V+ Shutdown Supply CurrentV+ = 4.0V to 30V, SHDN = 010µA
(Note 3)4
Quiescent Power Consumption
Both SMPSs enabled,
FB3 = FB5 = 0,
CSL3 = CSH3 = 3.5V,
CSL5 = CSH5 = 5.3VMAX1901/MAX19044
FAULT DETECTION (MAX1901/MAX1902)Overvoltage Trip ThresholdWith respect to unloaded output voltage410%
Output Undervoltage ThresholdWith respect to unloaded output voltage6080%
Output Undervoltage Lockout TimeFrom each SMPS enabled, with respect to
fOSC5,0007,000clks
RESET
RESET Trip ThresholdWith respect to unloaded output voltage,
falling edge; typical hysteresis = 1%-7-4
RESET Delay TimeWith respect to fOSC27,00037,000
clks
INPUTS AND OUTPUTSFeedback-Input Leakage CurrentFB3, FB5; SECFB = 2.6V50nA
Logic Input-Low VoltageRUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC0.6V
Logic Input-High VoltageRUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC2.4V
Logic Output-Low VoltageRESET, ISINK = 4mA0.4V
Logic Output-High CurrentRESET = 3.5V1mA
TIME/ON5 Input Trip LevelSEQ = 0 or VL2.42.6V
TIME/ON5 Source CurrentTIME/ON5 = 0, SEQ = 0 or VL2.53.5µA
TIME/ON5 On-ResistanceTIME/ON5; RUN/ON3 = 0, SEQ = 0 or VL80Ω
SSOP package7Gate-Driver On-ResistanceHigh or low (Note 6)QFN package8Ω
Note 1:Each of the four digital soft-start levels is tested for functionality; the steps are typically in 20mV increments.
Note 2:High duty-factor operation supports low input-to-output differential voltages, and is achieved at a lowered operating frequency
(see theDropout Operation section).
Note 3:MAX1902 only.
Note 4:Off mode for the 12V linear regulator occurs when the SMPS that has flyback feedback (VDD) steered to it is disabled. In situa-
tions where the main outputs are being held up by external keep-alive supplies, turning off the 12OUT regulator prevents a leak-
age path from the output-referred flyback winding, through the rectifier, and into VDD.
Note 5:Since the reference uses VLas its supply, the reference’s V+ line-regulation error is insignificant.
Note 6:Production testing limitations due to package handing require relaxed maximum on-resistance specifications for the thin
QFN package. The SSOP and thin QFN package contain the same die, and the thin QFN package imposes no additional
resistance incircuit.
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersEFFICIENCY vs. 5V OUTPUT CURRENT
MAX1901 toc01
5V OUTPUT CURRENT (A)
EFFICIENCY (%)70
ON5 = 5V
ON3 = 0V
f = 500kHz
MAX1901/MAX1904
V+ = 15V
V+ = 6V
EFFICIENCY vs. 3.3V OUTPUT CURRENT
MAX1901 toc02
3.3V OUTPUT CURRENT (A)
EFFICIENCY (%)70
ON5 = ON3 = 5V
f = 500kHz
MAX1901/MAX1904
V+ = 15V
V+ = 6V
MAXIMUM VDD OUTPUT CURRENT
vs. INPUT VOLTAGE
MAX1901 toc03
INPUT VOLTAGE (V)
MAXIMUM V
OUTPUT CURRENT (mA)
5V LOAD = 0
5V LOAD = 3A
NO LOAD INPUT CURRENT
vs. INPUT VOLTAGE
MAX1901 toc04
INPUT VOLTAGE (V)
INPUT CURRENT (mA)25
SKIP = 0V
SKIP = VL
ON5 = ON3 = 5V
NO LOAD
10,000
V+ STANDBY INPUT CURRENT
vs. INPUT VOLTAGE
MAX1901 toc05
INPUT VOLTAGE (V)
INPUT CURRENT (25
ON5 = ON3 = 0V
NO LOAD0
SHUTDOWN INPUT CURRENT
vs. INPUT VOLTAGE
MAX1901 toc06
INPUT VOLTAGE (V)
INPUT CURRENT (
SHDN = 0V
MINIMUM VIN TO VOUT DIFFERENTIAL
vs. 5V OUTPUT CURRENT
MAX1901 toc07
5V OUTPUT CURRENT (A)
MINIMUM V
TO V
OUT
DIFFERENTIAL (mV)
f = 500kHz
f = 333kHz
VOUT > 4.8V
SWITCHING FREQUENCY
vs. LOAD CURRENT
MAX1901 toc08
LOAD CURRENT (A)
SWITCHING FREQUENCY (kHz)
3.3V, VIN = 15V
5V, VIN = 15V
3.3V, VIN = 6.5V
5V, VIN = 6.5V
VL REGULATOR OUTPUT VOLTAGE
vs. OUTPUT CURRENT
MAX1901 toc09
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
VIN = 15V
ON3 = ON5 = 0V
Typical Operating Characteristics(Circuit of Figure 1, Table 1, 6A/500kHz components, TA = +25°C, unless otherwise noted.)
STARTUP WAVEFORMSMAX1901 toc11
3.3V OUTPUT
2V/div
5V OUTPUT
5V/div
TIME
2V/div
RUN
5V/div
2ms/div
SEQ = VL, O.O1μF CAPACITOR ON TIME
5V LOAD TRANSIENT RESPONSEMAX1901 toc12
10V
ILX5
5A/div
VLX5
10V/div
5V OUTPUT
5OmV/div
AC-COUPLED
20μs/div
VIN = 8V, IOUT = 1A TO 5A
3.3V LOAD TRANSIENT RESPONSEMAX1901 toc13
10V
ILX3
5A/div
VLX3
10V/div
3.3V OUTPUT
5OmV/div
AC-COUPLED
20μs/div
VIN = 8V, IOUT = 1A TO 5A
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
Typical Operating Characteristics (continued)(Circuit of Figure 1, Table 1, 6A/500kHz components, TA = +25°C, unless otherwise noted.)
REF OUTPUT VOLTAGE
vs. OUTPUT CURRENT
MAX1901 toc10
OUTPUT CURRENT (mA)
REF OUTPUT VOLTAGE (V)
VIN = 15V
ON3 = ON5 = 0
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
Pin Description
PIN
SSOPQFNNAMEFUNCTION29CSH3Current-Sense Input for the 3.3V SMPS. Current-limit level is 100mV referred to CSL3.30CSL3Current-Sense Input. Also serves as the feedback input in fixed-output mode.31FB3
Feedback Input for the 3.3V SMPS. Regulates at FB3 = REF (approx. 2.5V) in
adjustable mode. FB3 is a dual-mode input that also selects the 3.3V fixed output
voltage setting when connected to GND. Connect FB3 to a resistor-divider for
adjustable-output mode.
12OUT
(MAX1902)
12V/120mA Linear-Regulator Output. Input supply comes from VDD. Bypass 12OUT to
GND with 1µF (min).STEER
(MAX1901/
MAX1904)
Logic-Control Input for Secondary Feedback. Selects the PWM that uses a transformer
and secondary feedback signal (SECFB):
STEER = GND: 3.3V SMPS uses transformer
STEER = VL: 5V SMPS uses transformer
VDD
(MAX1902)
Supply Voltage Input for the 12OUT Linear Regulator. Also connects to an internal
resistor-divider for secondary winding feedback and to an 18V overvoltage shunt
regulator clamp.
SECFB
(MAX1901/
MAX1904)
Secondary Winding Feedback Input. Normally connected to a resistor-divider from an
auxiliary output. SECFB regulates at VSECFB = 2.5V (see the Secondary Feedback
Regulation Loop section). Connect to VL if not used.3SYNC
Oscillator Synchronization and Frequency Select. Connect to VL for 500kHz operation;
connect to GND for 333kHz operation. Can be driven at 400kHz to 583kHz for external
synchronization.4TIME/ON5Dual-Purpose Timing Capacitor Pin and ON/OFF Control Input. See the Power-Up
Sequencing and ON/OFF Controls section.5GNDLow-Noise Analog Ground and Feedback Reference Point7REF2.5V Reference Voltage Output. Bypass to GND with 1µF (min).8SKIPLog i c- contr ol i np ut that d i sab l es i d l e m od e w hen hi g h. C onnect to GN D for nor m al use.9RESETActive-Low Timed Reset Output. RESET swings GND to VL. Goes high after a fixed
32,000 clock-cycle delay following power-up.10FB5
Feedback Input for the 5V SMPS. Regulates at FB5 = REF (approx. 2.5V) in adjustable
mode. FB5 is a dual-mode input that also selects the 5V fixed output voltage setting
when connected to GND. Connect FB5 to a resistor-divider for adjustable-output
mode.11CSL5C ur r ent- S ense Inp ut for the 5V S M P S . Al so ser ves as the feed b ack i np ut i n fi xed - outp utod e, and as the b ootstr ap sup p l y i np ut w hen the vol tag e on C S L5/V L i s > 4.5V .12CSH5Current-Sense Input for the 5V SMPS. Current-limit level is 100mV referred to CSL5.
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
Pin Description (continued)
PIN
QSOPQFNNAMEFUNCTION13SEQ
Pin-strap input that selects the SMPS power-up sequence:
SEQ = GND: 5V before 3.3V, RESET output determined by both outputs
SEQ = REF: Separate ON3/ON5 controls, RESET output determined by 3.3V
output
SEQ = VL: 3.3V before 5V, RESET output determined by both outputs14DH5Gate-Drive Output for the 5V, High-Side N-Channel Switch. DH5 is a floating driver
output that swings from LX5 to BST5, riding on the LX5 switching node voltage.15LX5Switching-Node (Inductor) Connection. Can swing 2V below ground without hazard.17BST5Boost Capacitor Connection for High-Side Gate Drive (0.1µF)18DL5Gate-Drive Output for the Low-Side Synchronous-Rectifier MOSFET. Swings 0 to VL.19PGNDPower Ground20VL
5V Internal Linear-Regulator Output. VL is also the supply-voltage rail for the chip.
After the 5V SMPS output has reached 4.5V (typ), VL automatically switches to the
output voltage through CSL5 for bootstrapping. Bypass to GND with 4.7µF. VL
supplies up to 25mA for external loads.21V+Battery Voltage Input, 4.2V to 30V. Bypass V+ to PGND close to the IC with a 0.22µF
capacitor. Connects to a linear regulator that powers VL.22SHDN
Shutdown Control Input, Active Low. Logic threshold is set at approximately 1V. For
automatic startup, connect SHDN to V+ through a 220kΩ resistor and bypass SHDN to
GND with a 0.01µF capacitor.23DL3Gate-Drive Output for the Low-Side Synchronous-Rectifier MOSFET. Swings 0 to VL.24BST3Boost Capacitor Connection for High-Side Gate Drive (0.1µF)26LX3Switching-Node (Inductor) Connection. Can swing 2V below ground without hazard.27DH3Gate-Drive Output for the 3.3V, High-Side N-Channel Switch. DH3 is a floating driver
output that swings from LX3 to BST3, riding on the LX3 switching-node voltage.28RUN/ON3ON/OFF Control Input. See the Power-Up Sequencing and ON/OFF Controls section.6, 16, 25, 32N.C.No Connection
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersMAX1901
MAX1904SHDNVLSECFB
INPUTON/OFF
7V TO 24V
REFSEQ
1μF
2.5V ALWAYS ON
*1A SCHOTTKY DIODE REQUIRED
FOR THE MAX1901 (SEE THE OUTPUT
OVERVOLTAGE PROTECTION SECTION).
5V ALWAYS ON
5V ON/OFF
3.3V ON/OFF
0.1μF0.1μFR23.3V OUTPUT*
4.7μF
0.1μF
4.7μF
0.1μF10Ω
0.1μF
0.1μF
DL3
CSH3
CSL3
FB3
RESET
RESET OUTPUT
SKIP
STEERR15V OUTPUTDL5
LX5
DH5
BST5BST3
SYNC
DH3
LX3
PGND
CSL5
CSH5
RUN/ON3
TIME/ON5
FB5
GND
Figure 1. Standard 3.3V/5V Application Circuit (MAX1901/MAX1904)
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
Standard Application CircuitThe basic MAX1901/MAX1904 dual-output 3.3V/5V
buck converter (Figure 1) is easily adapted to meet a
wide range of applications with inputs up to 28V by
substituting components from Table 1. These circuits
represent a good set of tradeoffs between cost, size,
and efficiency, while staying within the worst-case
specification limits for stress-related parameters, such
as capacitor ripple current. Don’t change the frequency
of these circuits without first recalculating component
values (particularly inductance value at maximum bat-
tery voltage). Adding a Schottky rectifier across each
synchronous rectifier improves the efficiency of these
circuits by approximately 1%, but this rectifier is other-
wise not needed because the MOSFETs required for
these circuits typically incorporate a high-speed silicon
diode from drain to source. Use a Schottky rectifier
rated at a DC current equal to at least one-third of the
load current.
Detailed DescriptionThe MAX1901/MAX1902/MAX1904 are dual, BiCMOS,
switch-mode power-supply controllers designed pri-
marily for buck-topology regulators in battery-powered
applications where high-efficiency and low-quiescent
supply current are critical. Light-load efficiency is
enhanced by automatic Idle-Mode operation, a vari-
able-frequency pulse-skipping mode that reduces tran-
sition and gate-charge losses. Each step-down,
power-switching circuit consists of two N-channel
MOSFETs, a rectifier, and an LC output filter. The out-
put voltage is the average AC voltage at the switching
node, which is regulated by changing the duty cycle of
the MOSFET switches. The gate-drive signal to the
N-channel high-side MOSFET must exceed the battery
voltage, and is provided by a flying-capacitor boost cir-
cuit that uses a 100nF capacitor connected to BST_.
Table 1. Component Selection for Standard 3.3V/5V Application
LOAD CURRENTCOMPONENT4A/333kHz4A/500kHz6A/500kHzInput Range7V to 24V7V to 24V7V to 24V
Frequency333kHz500kHz500kHz
Q1, Q3 High-Side
MOSFETs
1/2 Fairchild FDS6982S or
1/2 International Rectifier
IRF7901D1
1/2 Fairchild FDS6982S or
1/2 International Rectifier
IRF7901D1
Fairchild FDS6612A or
International Rectifier
IRF7807V
Q2, Q4 Low-Side
MOSFETs with Integrated
Schottky Diodes
1/2 Fairchild FDS6982S or
1/2 International Rectifier
IRF7901D1
1/2 Fairchild FDS6982S or
1/2 International Rectifier
IRF7901D1
Fairchild FDS6670S or
International Rectifier
IRF7807DV1
C3 Input Capacitor3 ✕ 10µF, 25V ceramic
Taiyo Yuden TMK432BJ106KM
3 ✕ 10µF, 25V ceramic
Taiyo Yuden TMK432BJ106KM
4 ✕ 10µF, 25V ceramic
Taiyo Yuden TMK432BJ106KM
C1 Output Capacitor150µF, 6V POSCAP
Sanyo 6TPC150M
150µF, 6V POSCAP
Sanyo 6TPC150M
2 ✕ 150µF, 6V POSCAP
Sanyo 6TPC150M
C2 Output Capacitor2 ✕ 150µF, 4V POSCAP
Sanyo 4TPC150M
2 ✕ 150µF, 4V POSCAP
Sanyo 4TPC150M
2 ✕ 220µF, 4V POSCAP
Sanyo 4TPC220M
R1, R2 Resistors0.018Ω
Dale WSL2512-R018-F
0.018Ω
Dale WSL2512-R018-F
0.012Ω
Dale WSL2512-R012-F
L1 Inductor10µH, 4.5A Ferrite
Sumida CDRH124-100
7.0µH, 5.2A Ferrite
Sumida CEI122-H-7R0
4.2µH, 6.9A Ferrite
Sumida CEI122-H-4R2
L2 Inductor7.0µH, 5.2A Ferrite
Sumida CEI122-H-7R0
5.6µH, 5.2A Ferrite
Sumida CEI122-H-5R6
4.2µH, 6.9A Ferrite
Sumida CEI122-H-4R2
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersThe MAX1901/MAX1902/MAX1904 contain ten major
circuit blocks (Figure 2).
The two pulse-width-modulation (PWM) controllers
each consist of a Dual Mode feedback network and
multiplexer, a multi-input PWM comparator, high-side
and low-side gate drivers, and logic. MAX1901/
MAX1902 contain fault-protection circuits that monitor
the main PWM outputs for undervoltage and overvolt-
age. A power-on sequence block controls the power-
up timing of the main PWMs and determines whether
one or both of the outputs are monitored for undervoltage
faults. The MAX1902 includes a secondary feedback net-
work and 12V linear regulator to generate a 12V output
from a coupled-inductor flyback winding. The
MAX1901/MAX1904 have a secondary feedback input
(SECFB) instead, which allows a quasi-regulated,
adjustable output, coupled-inductor flyback winding to be
attached to either the 3.3V or the 5V main inductor. Bias
generator blocks include the 5V IC internal rail (VL) linear
regulator, 2.5V precision reference, and automatic boot-
strap switchover circuit. The PWMs share a common
333kHz/500kHz synchronizable oscillator.
These internal IC blocks aren’t powered directly from
the battery. Instead, the 5V VLlinear regulator steps
down the battery voltage to supply both VLand the
gate drivers. The synchronous-switch gate drivers are
directly powered from VL, while the high-side switch
gate drivers are indirectly powered from VLvia an
external diode-capacitor boost circuit. An automatic
bootstrap circuit turns off the 5V linear regulator and
powers the IC from the 5V PWM output voltage if the
output is above 4.5V.
PWM Controller BlockThe two PWM controllers are nearly identical. The only
differences are fixed output settings (3.3V vs. 5V), the
VL/CSL5 bootstrap switch connected to the 5V PWM,
and SECFB. The heart of each current-mode PWM con-
troller is a multi-input, open-loop comparator that sums
three signals: the output-voltage error signal with
respect to the reference voltage, the current-sense sig-
nal, and the slope-compensation ramp (Figure 3). The
PWM controller is a direct-summing type, lacking a tra-
ditional error amplifier and the phase shift associated
with it. This direct-summing configuration approaches
ideal cycle-by-cycle control over the output voltage.
When SKIP= low, Idle Mode circuitry automatically
optimizes efficiency throughout the load current range.
Idle Mode dramatically improves light-load efficiency
by reducing the effective frequency, which reduces
switching losses. It keeps the peak inductor current
above 25% of the full current limit in an active cycle,
allowing subsequent cycles to be skipped. Idle Mode
transitions seamlessly to fixed-frequency PWM opera-
tion as load current increases.
With SKIP= high, the controller always operates in fixed-
frequency PWM mode for lowest noise. Each pulse from
the oscillator sets the main PWM latch that turns on the
high-side switch for a period determined by the duty fac-
tor (approximately VOUT/ VIN). As the high-side switch
turns off, the synchronous rectifier latch sets; 60ns later,
the low-side switch turns on. The low-side switch stays on
until the beginning of the next clock cycle.
In PWM mode, the controller operates as a fixed-fre-
quency current-mode controller where the duty ratio is
set by the input/output voltage ratio. The current-mode
feedback system regulates the peak inductor current
value as a function of the output-voltage error signal. In
continuous-conduction mode, the average inductor
current is nearly the same as the peak current, so the
circuit acts as a switch-mode transconductance ampli-
fier. This pushes the second output LC filter pole, nor-
mally found in a duty-factor-controlled (voltage-mode)
PWM, to a higher frequency. To preserve inner-loop
stability and eliminate regenerative inductor current
“staircasing”, a slope-compensation ramp is summed
into the main PWM comparator to make the apparent
duty factor less than 50%.
The MAX1901/MAX1902/MAX1904 use a relatively low
loop gain, allowing the use of lower-cost output capaci-
tors. The relative gains of the voltage-sense and cur-
rent-sense inputs are weighted by the values of current
sources that bias three differential input stages in the
main PWM comparator (Figure 4). The relative gain of
the voltage comparator to the current comparator is
internally fixed at K = 2:1. The low loop gain results in
the 2% typical load-regulation error. The low value of
loop gain helps reduce output filter capacitor size and
cost by shifting the unity-gain crossover frequency to a
lower level.
Table 2. Component Suppliers
MANUFACTURERUSA PHONEFACTORY FAXDale-Vishay402-564-3131402-563-6418
Fairchild
Semiconductor408-721-2181408-721-1635
International
Rectifier310-322-3331310-322-3332
Sanyo619-661-6835619-661-1055
Sumida847-956-0666847-956-0702
Taiyo Yuden408-573-4150408-573-4159
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersLPF
50kHz
REF1.75V
2.388V
4.5V
REF
2.5V
REF
333kHz
500kHz
OSC
PWM
LOGIC
LINEAR
REG
BST3
DH3
LX3
DL3
3.3V
ON/OFF
INPUT
7V to 24V
5V ALWAYS ON
CSL5
SHDNV+ SYNC
12V
LINEAR
REG
12V
13V BST5 RAW 15V
DH5
DL5
VL
PGND
CSH5
CSL5
CSH3
CSL3
FB5
RESET
SEQ
2.6V
1V
0.6V 0.6V
VL
GND RUN/ON3
TIME/ON5
REF
LX5 5V
12OUT
VDD
IN
SECFB
3.3V
PWM
LOGIC
REF
OUTPUTS
LPF
50kHz
TIMER
POWER-ON
SEQUENCE
LOGIC
FB3
MAX1902
OV/UV
FAULT
2.68V
Figure 2. MAX1902 Functional Diagram
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersSHOOT-
THROUGH
CONTROL
30mVQ
LEVEL
SHIFT
0.75μs
SINGLE-SHOT
MAIN PWM
COMPARATOR
OSC
LEVEL
SHIFT
CURRENT
LIMIT
SYNCHRONOUS
RECTIFIER CONTROL
REF
SHDN
-100mV
CSH_
CSL_
FROM
FEEDBACK
DIVIDER
BST_
DH_
LX_
DL_
PGND
SLOPE COMP
SKIP
REF
SECFB
COUNTER
DAC
SOFT-START
Figure 3. PWM Controller Functional Block Diagram
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersThe output filter capacitors (Figure1, C1 and C2) set a
dominant pole in the feedback loop that must roll off the
loop gain to unity before encountering the zero intro-
duced by the output capacitor’s parasitic resistance
(ESR) (see the Design Procedure section). A 50kHz
pole-zero cancellation filter provides additional rolloff
above the unity-gain crossover. This internal 50kHz
low-pass compensation filter cancels the zero due to fil-
ter capacitor ESR. The 50kHz filter is included in the
loop in both fixed-output and adjustable-output modes.
Synchronous Rectifier Driver (DL)Synchronous rectification reduces conduction losses in
the rectifier by shunting the normal Schottky catch
diode with a low-resistance MOSFET switch. Also, the
synchronous rectifier ensures proper startup of the
boost gate-driver circuit.
If the circuit is operating in continuous-conduction
mode, the DL drive waveform is simply the complement
of the DH high-side drive waveform (with controlled
dead time to prevent cross-conduction or “shoot
through”). In discontinuous (light-load) mode, the syn-
chronous switch is turned off as the inductor current falls
through zero. The synchronous rectifier works under all
operating conditions, including Idle Mode.
The SECFB signal further controls the synchronous switch
timing in order to improve multiple-output cross-regulation
(see the Secondary Feedback Regulation Loopsection).
Internal VL and REF SuppliesAn internal regulator produces the 5V supply (VL) that
powers the PWM controller, logic, reference, and other
blocks within the IC. This 5V low-dropout linear regula-
tor supplies up to 25mA for external loads, with a
reserve of 25mA for supplying gate-drive power.
Bypass VLto GND with 4.7µF.
Important:Ensure that VLdoes not exceed 6V.
Measure VLwith the main output fully loaded. If it is
pumped above 5.5V, either excessive boost-diode
capacitance or excessive ripple at V+ is the probable
cause. Use only small-signal diodes for the boost cir-
cuit (10mA to 100mA Schottky or 1N4148 are pre-
ferred), and bypass V+ to PGND with 4.7µF directly at
the package pins.
Table 3. SKIP PWM TableSKIP
LOAD CURRENTMODEDESCRIPTIONLowLightIdlePulse-skipping, supply current = 250µA at VIN =12V, discontinuous inductor
LowHeavyPWMConstant-frequency PWM continuous-inductor current
HighLightPWMConstant-frequency PWM continuous-inductor current
HighHeavyPWMConstant-frequency PWM continuous-inductor current
FB_
REF
CSH_
CSL_
SLOPE COMPENSATIONR2
TO PWM
LOGIC
OUTPUT DRIVER
UNCOMPENSATED
HIGH-SPEED
LEVEL TRANSLATOR
AND BUFFERI3VBIAS
Figure 4. Main PWM Comparator Block Diagram
MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersThe 2.5V reference (REF) is accurate to ±2% over tem-
perature, making REF useful as a precision system ref-
erence. Bypass REF to GND with 1µF minimum. REF
can supply up to 5mA for external loads. (Bypass REF
with a minimum 1µF/mA reference load current.)
However, if extremely accurate specifications for both
the main output voltages and REF are essential, avoid
loading REF more than 100µA. Loading REF reduces
the main output voltage slightly, because of the refer-
ence load-regulation error.
When the 5V main output voltage is above 4.5V, an
internal P-channel MOSFET switch connects CSL5 to
VL, while simultaneously shutting down the VL linear
regulator. This action bootstraps the IC, powering the
internal circuitry from the output voltage, rather than
through a linear regulator from the battery.
Bootstrapping reduces power dissipation due to gate
charge and quiescent losses by providing that power
from a 90%-efficient switch-mode source, rather than
from a much less efficient linear regulator.
Boost High-Side Gate-Drive Supply
(BST3 and BST5)Gate-drive voltage for the high-side N-channel switches
is generated by a flying-capacitor boost circuit (Figure 2).
The capacitor between BST_ and LX_ is alternately
charged from the VL supply and placed parallel to the
high-side MOSFET’s gate-source terminals. On startup,
the synchronous rectifier (low-side MOSFET) forces LX_
to 0V and charges the boost capacitors to 5V. On the
second half-cycle, the SMPS turns on the high-side MOS-
FET by closing an internal switch between BST_ and
DH_. This provides the necessary enhancement voltage
to turn on the high-side switch, an action that “boosts” the
5V gate-drive signal above the battery voltage.
Ringing at the high-side MOSFET gate (DH3 and DH5)
in discontinuous-conduction mode (light loads) is a nat-
ural operating condition. It is caused by residual ener-
gy in the tank circuit, formed by the inductor and stray
capacitance at the switching node, LX. The gate-drive
negative rail is referred to LX, so any ringing there is
directly coupled to the gate-drive output.
Current-Limiting and Current-Sense
Inputs (CSH and CSL)The current-limit circuit resets the main PWM latch and
turns off the high-side MOSFET switch whenever the
voltage difference between CSH and CSL exceeds
100mV. This limiting is effective for both current flow
directions, putting the threshold limit at ±100mV. The
tolerance on the positive current limit is ±20%, so the
external low-value sense resistor (R1) must be sized for
80mV/ IPEAK, where IPEAKis the required peak-inductor
current to support the full load current, while compo-
nents must be designed to withstand continuous-
current stresses of 120mV/R1.
For breadboarding or for very-high-current applica-
tions, it may be useful to wire the current-sense inputs
with a twisted pair, rather than PC traces. (This twisted
pair need not be special; two pieces of wire-wrap wire
twisted together is sufficient.) This reduces the possible
noise picked up at CSH_ and CSL_, which can cause
unstable switching and reduced output current. The
CSL5 input also serves as the IC’s bootstrap supply
input. Whenever VCSL5> 4.5V, an internal switch con-
nects CSL5 to VL.
Oscillator Frequency and
Synchronization (SYNC)The SYNC input controls the oscillator frequency. Low
selects 333kHz; high selects 500kHz. SYNC can also
be used to synchronize with an external 5V CMOS or
TTL clock generator. SYNC has a guaranteed 400kHz
to 583kHz capture range. A high-to-low transition on
SYNC initiates a new cycle.
500kHz operation optimizes the application circuit for
component size and cost. 333kHz operation provides
increased efficiency, lower dropout, and improved
load-transient response at low input-output voltage dif-
ferences (see the Low-Voltage Operation section).
Shutdown ModeHoldingSHDNlow puts the IC into its 4µA shutdown
mode. SHDNis logic input with a threshold of about 1V
(the VTHof an internal N-channel MOSFET). For automat-
ic startup, bypass SHDNto GND with a 0.01µF capacitor
and connect it to V+ through a 220kΩresistor.
Power-Up Sequencing and
ON/OFFControlsStartup is controlled by RUN/ON3 and TIME/ON5 in
conjunction with SEQ. With SEQ tied to REF, the two
control inputs act as separate ON/OFFcontrols for
each supply. With SEQ tied to VL or GND, RUN/ON3
becomes the master ON/OFFcontrol input and
TIME/ON5 becomes a timing pin, with the delay
between the two supplies determined by an external
capacitor. The delay is approximately 800µs/nF. The
3.3V supply powers up first if SEQ is tied to VL, and the
5V supply is first if SEQ is tied to GND. When driving
TIME/ON5 as a control input with external logic, always
place a resistor (>1kΩ) in series with the input. This
prevents possible crowbar current due to the internal
discharge pulldown transistor, which turns on in stand-
by mode and momentarily at the first power-up or in
shutdown mode.
