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MAX1889ETE+MAXIMN/a1115avaiTriple-Output TFT LCD Power Supply with Fault Protection
MAX1889ETE+TMAXIM Pb-freeN/a2500avaiTriple-Output TFT LCD Power Supply with Fault Protection


MAX1889ETE+T ,Triple-Output TFT LCD Power Supply with Fault ProtectionFeaturesThe MAX1889 provides the three regulated output volt- ♦ High-Performance Step-Up Regulatora ..
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MAX483CUA ,Low-Power / Slew-Rate-Limited RS-485/RS-422 TransceiversELECTRICAL CHARACTERISTICS(V = 5V ±5%, T = T to T , unless otherwise noted.) (Notes 1, 2)CC A MIN M ..
MAX483CUA ,Low-Power / Slew-Rate-Limited RS-485/RS-422 TransceiversMAX481/MAX483/MAX485/MAX487–MAX491/MAX148719-0122; Rev 5; 2/96Low-Power, Slew-Rate-LimitedRS-485/RS ..
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MAX1889ETE+-MAX1889ETE+T
Triple-Output TFT LCD Power Supply with Fault Protection
General Description
The MAX1889 provides the three regulated output volt-
ages required for active matrix, thin-film transistor liquid
crystal displays (TFT LCDs). It combines a high-perfor-
mance step-up regulator with two linear-regulator con-
trollers and multiple levels of protection circuitry for a
complete power-supply system.
The main DC-DC converter is a high-frequency
(500kHz/1MHz), current-mode step-up regulator with
an integrated N-channel power MOSFET that allows the
use of ultra-small inductors and ceramic capacitors.
With its high closed-loop bandwidth performance, the
MAX1889 provides fast transient response to pulsed
loads while operating with efficiencies over 85%. The
positive and negative linear-regulator controllers post-
regulate charge-pump outputs for TFT gate-on and
gate-off supplies.
The MAX1889 has a unique input switch control that
can replace the typical input fuse by disconnecting the
load from the input supply when a fault is detected.
The fault detector monitors all three regulated output
voltages and can monitor current from the input supply
as well. Additionally, the MAX1889 enters thermal shut-
down when its overtemperature threshold is reached.
The MAX1889 undervoltage lockout is set at 2.5V (max)
to allow the input supply to droop under pulsed load
conditions while avoiding any unexpected behavior
when its input voltage dips momentarily. Also, the built-
in soft-start and cycle-by-cycle current limiting prevent
input surge currents during power-up.
The MAX1889 is available in a 16-pin thin QFN pack-
age with a maximum thickness of 0.8mm for ultra-thin
LCD panel design.
Applications

Notebook Computer Displays
LCD Monitors
Car Navigation Displays
Features
High-Performance Step-Up Regulator
Fast Transient Response
Current-Mode Control Architecture
Built-In High-Efficiency N-Channel Power
MOSFET
Current-Limit Comparator
>85% Efficiency
Selectable Switching Frequency
(500kHz/1MHz)
Internal Soft-Start
Positive Linear-Regulator ControllerNegative Linear-Regulator ControllerTriple-Level Protection Against Smoke or Fire
Input Switch Replaces Input Fuse
Output Overload Detection with Timer Latch
Thermal Shutdown
2.7V to 5.5V Input Operating RangeUltra-Small External Components 1µA Shutdown Current (max)1mA Quiescent Current (max)Ultra-Thin 16-Pin QFN Package
(0.8mm Maximum Thickness)
MAX1889
Triple-Output TFT LCD Power Supply
with Fault Protection
Ordering Information
141378GA
OCPOCN
TGND
FREQ
FBP
PGND
GND
REF
FBN
DRVNDRVP
SHDN
TOP VIEW
MAX1889
THIN QFN(5mm x 5mm)
Pin Configuration

19-2485; Rev 1; 10/02
PARTTEMP RANGEPIN-PACKAGE

MAX1889ETE- 40°C to + 85° C 16 Thi n Q FN ( 5m m ✕ 5m m )
MAX1889EGE*- 40°C to + 85° C 16 QFN ( 5m m ✕ 5m m )
* Future product—Contact factory for availability.
MAX1889riple-Output TFT LCD Power Supply
with Fault Protection
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VIN= 3V, SHDN= IN, CREF= 0.22µF, PGND = GND, TA= 0°C to +85°C. Typical values are at TA= +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN, SHDN, OCN, OCP,
FB, FBP, FBN, FREQ to GND...............................-0.3V to +6V
PGND to GND.....................................................................±0.3V
LX to PGND............................................................-0.3V to +14V
DRVP to GND.........................................................-0.3V to +30V
REF, GATE, TGND to GND..........................-0.3V to (VIN+ 0.3V)
DRVN to GND.....................................(VIN- 28V) to (VIN+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
16-Pin QFN (derate 19.2mW/°C above +70°C).........1538mW
Operating Temperature Range
MAX1889EGE..................................................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

IN Supply RangeVIN2.75.5V
VIN rising2.552.72.85IN Undervoltage Lockout
(UVLO) ThresholdVUVLO350mV typical
hysteresisVIN falling2.22.352.5V
IN Quiescent CurrentIINVFB = VFBP = 1.5V, VFBN = 0V (Note 1)1.0mA
IN Shutdown CurrentV SHDN = 0, VIN = 5V0.11.0µA
REF Output VoltageVREF-2µA < IREF < 50µA1.2311.2501.269V
Thermal Shutdown160°C
MAIN STEP-UP REGULATOR

Main Output Voltage RangeVMAINVIN13V
VFREQ = VIN0.8511.15MHzOperating FrequencyfOSCVFREQ = 0V500kHz
Oscillator Maximum Duty Cycle808590%
FB Regulation VoltageVFBILX = 200mA, slope = 0 (Note 2)1.2291.2421.254V
FB Fault Trip LevelVFB falling0.951.01.05V
Load RegulationIMAIN = 0 to full load-1.6%
Line RegulationVIN = 2.7V to 5.5V0.2%/V
FB Input Bias CurrentIFBVFB = 1.5V-100+100nA
LX Switch On-ResistanceRLX(ON)250450mΩ
LX Leakage CurrentILXVLX = 13V0.0120µA
LX Current LimitILIM1.62.12.8A
LX RMS Current RatingNot tested1.4A
Soft-Start PeriodtSS4096 /
fOSCs
Soft-Start Step SizeVREF /32V
POSITIVE LINEAR-REGULATOR CONTROLLER

FBP Regulation VoltageVFBPIDRVP = 0.2mA1.2131.251.288V
FBP Fault Trip LevelVFBP falling0.961.01.04V
FBP Input Bias CurrentIFBPVFBP = 1.25V-50+50nA
FBP Effective TransconductanceVDRVP = 10V, IDRVP = 0.1mA to 2mA75mS
MAX1889
Triple-Output TFT LCD Power Supply
with Fault Protection
ELECTRICAL CHARACTERISTICS (continued)

(VIN= 3V, SHDN= IN, CREF= 0.22µF, PGND = GND, TA= 0°C to +85°C. Typical values are at TA= +25°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

FBP Line RegulationIDRVP = 0.2mA, VIN = 2.7V to 5.5V1mV
Bandwidth(Note 3)200kHz
DRVP Sink CurrentIDRVPVFBP = 1.1V, VDRVP = 10V5mA
DRVP Off-Leakage CurrentVFBP = 1.1V, VDRVP = 28V0.110µA
NEGATIVE LINEAR-REGULATOR CONTROLLER

FBN Regulation VoltageVFBNIDRVN = 0.2mA95125155mV
FBN Fault Trip LevelVFBN rising325400475mV
FBN Input Bias CurrentIFBNVFBN = 0V-50+50nA
FBN Effective TransconductanceVDRVN = -10V, IDRVN = 0.1mA to 2mA75mS
FBN Line RegulationIDRVN = 0.2mA, VIN = 2.7V to 5.5V1mV
Bandwidth(Note 2)200kHz
DRVN Sink CurrentIDRVNVFBN = 200mV, VDRVN = -10V5mA
DRVN Off-Leakage CurrentVFBP = -0.1V, VDRVN = -20V0.110µA
LOGIC SIGNAL (SHDN)

Input Low Voltage100mV typical hysteresis, VIN = 2.7V to 5.5V0.4V
Input High VoltageVIN = 2.7V to 5.5V1.6V
Input CurrentI SHDN0.011µA
LOGIC SIGNAL (FREQ)

Input Low Voltage0.15 x VIN typical hysteresis0.3 x
VINV
Input High Voltage0.7 x
VINV
Input CurrentIFREQ0.011µA
OVERCURRENT COMPARATOR

Input Offset Voltage-5+5mV
Input Bias CurrentIOCN,
IOCPVOCN = VOCP = VIN-50+50 nA
OCN, OCP Input
Common-Mode Range1.50.8 x
VINV
FAULT TIMER AND GATE DRIVER

VFREQ = 0V, 32768/fOSC64Fault Timer PeriodtFAULTVFREQ = VIN, 65536/fOSC64ms
GATE Output Sink Current
During SlewIGATEVGATE = 1.5V, during turn-on transition61218µA
GATE Output
Pulldown ResistanceVGATE < 0.5V200Ω
GATE Output Pullup Resistance200Ω
MAX1889riple-Output TFT LCD Power Supply
with Fault Protection
ELECTRICAL CHARACTERISTICS

(VIN= 3V, SHDN= IN, CREF= 0.22µF, PGND = GND, TA= -40°C to +85°C.) (Note 4)
PARAMETERSYMBOLCONDITIONSMINMAXUNITS

IN Supply RangeVIN2.75.5V
VIN rising2.552.85IN ULVO ThresholdVUVLOVIN falling2.22.5V
IN Quiescent CurrentIINVFB = VFBP = 1.5V, VFBN = 0V (Note 1)1.0mA
IN Shutdown CurrentV SHDN = 0, VIN = 5V1.0µA
REF Output VoltageVREF-2µA < IREF < 50µA1.2311.269V
MAIN STEP-UP REGULATOR

Main Output Voltage RangeVMAINVIN13V
Operating FrequencyfOSCVFREQ = VIN0.751.25MHz
Oscillator Maximum Duty Cycle7892%
FB Regulation VoltageVFBILX = 200mA, slope = 0 (Note 2)1.2151.260V
FB Fault Trip LevelVFB falling0.961.04V
Line RegulationVIN = 2.7V to 5.5V0.45%/V
FB Input Bias CurrentIFBVFB = 1.5V-100+100nA
LX Switch On-ResistanceRLX(ON)450mΩ
LX Current LimitILIM1.62.8A
POSITIVE LINEAR-REGULATOR CONTROLLER

FBP Regulation VoltageVFBPIDRVP = 0.2mA1.2131.288V
FBP Fault Trip LevelVFBP falling0.961.04V
FBP Input Bias CurrentIFBPVFBP = 1.25V-50+50nA
FBP Effective TransconductanceVDRVP = 10V, IDRVP = 0.1mA to 2mA60mS
Bandwidth(Note 2)200kHz
DRVP Sink CurrentIDRVPVFBP = 1.1V, VDRVP = 10V5mA
NEGATIVE LINEAR-REGULATOR CONTROLLER

FBN Regulation VoltageVFBNIDRVN = 0.2mA95155mV
FBN Fault Trip LevelVFBN rising325475mV
FBN Input Bias CurrentIFBNVFBN = 0V-50+50nA
FBN Effective TransconductanceVDRVN = -10V, IDRVN = 0.1mA to 2mA60mS
Bandwidth(Note 2)200kHz
DRVN Sink CurrentIDRVNVFBN = 200mV, VDRVN = -10V5mA
LOGIC SIGNAL (SHDN)

Input Low Voltage100mV typical hysteresis0.4V
Input High Voltage1.6V
Input CurrentISHDN1µA
MAX1889
Triple-Output TFT LCD Power Supply
with Fault Protection
ELECTRICAL CHARACTERISTICS (continued)

(VIN= 3V, SHDN= IN, CREF= 0.22µF, PGND = GND, TA= -40°C to +85°C.) (Note 4)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
LOGIC SIGNAL (FREQ)

Input Low Voltage0.15 x VIN typical hysteresis0.3 x VINV
Input High Voltage0.7 x VINV
Input CurrentIFREQ1µA
OVERCURRENT COMPARATOR

Input Offset Voltage-5+5mV
Input Bias CurrentIOCN,
IOCPVOCN = VOCP = VIN-50+50 nA
OCN, OCP Input
Common-Mode Range1.50.8 x
VINV
FAULT TIMER AND GATE DRIVER

GATE Output Sink CurrentIGATEVGATE = 1.5V, during turn-on transition618µA
GATE Output
Pulldown ResistanceVGATE < 0.5V200Ω
GATE Output Pullup Resistance200Ω
Note 1:
Quiescent current does not include switching losses.
Note 2:
FB regulation voltage is tested with no slope compensation ramp. Slope compensation needs to be included when selecting
resisitors for setting the output voltage (see Main Step-Up Regulatorand Output Voltage Selection sections).
Note 3:
Guaranteed by design. Not production tested.
Note 4:
Specifications to -40°C are guaranteed by design, not production tested.
Typical Operating Characteristics

(Circuit of Figure 1, VIN= +3.3V, VMAIN= +9V, VPL= +20V, VNL= -7V, SHDN= FREQ = IN, PGND = GND, TA= +25°C, unless
otherwise noted.)100010010
STEP-UP REGULATOR EFFICENCY
vs. LOAD CURRENT (VMAIN = 9V)

MAX1889 toc01
LOAD CURRENT (mA)
EFFICIENCY (%)C
A: VIN = 2.7V
B: VIN = 3.3V
C: VIN = 5.5V101001000
STEP-UP REGULATOR OUTPUT VOLTAGE
vs. LOAD CURRENT (VMAIN = 9V)

MAX1889 toc02
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
VIN = 2.7V
VIN = 3.3V
VIN = 5.5V
STEP-UP REGULATOR EFFICIENCY
vs. LOAD CURRENT (VMAIN = 13V)
MAX1889 toc03
LOAD CURRENT (mA)
EFFICIENCY (%)70
A: VIN = 2.7V
B: VIN = 3.3V
C: VIN = 5.5VB
MAX1889riple-Output TFT LCD Power Supply
with Fault Protection
Typical Operating Characteristics (continued)

(Circuit of Figure 1, VIN= +3.3V, VMAIN= +9V, VPL= +20V, VNL= -7V, SHDN= FREQ = IN, PGND = GND, TA= +25°C, unless
otherwise noted.)101001000
STEP-UP REGULATOR OUTPUT VOLTAGE
vs. LOAD CURRENT (VMAIN = 13V)

MAX1889 toc04
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
VIN = 2.7V
VIN = 3.3V
VIN = 5.5V
STEP-UP REGULATOR SWITCHING
FREQUENCY vs. INPUT VOLTAGE
MAX1889 toc05
INPUT VOLTAGE (V)
FREQUENCY (kHz)
VIN = 3.3V
VMAIN = 9V
IMAIN = 200mA
10μs/div
STEP-UP REGULATOR LOAD-TRANSIENT
RESPONSE (0 TO 200mA)

MAX1889 toc06
500mA
8.9V
200mA
A: INDUCTOR CURRENT, 500mA/div
B: VMAIN = 9V, 100mV/div, AC-COUPLED
C: IMAIN = 0 TO 200mA, 200mA/div
10μs/div
STEP-UP REGULATOR LOAD-TRANSIENT
RESPONSE (0 TO 1A, 2μs PULSE)

MAX1889 toc07
8.9V
A: INDUCTOR CURRENT, 1A/div
B: VMAIN = 9V, 100mV/div, AC-COUPLED
C: IMAIN = 0 TO 1A, 1A/div
8.8V
1ms/div
STEP-UP REGULATOR SOFT-START
(10mA LOAD) FROM
SLOW-RISING INPUT SUPPLY

MAX1889 toc08
A: VIN, 5V/div
B: VGATE, 5V/div
C: VC2, 5V/div
D: VMAIN = 9V, 5V/div
10V
1ms/div
STEP-UP REGULATOR SOFT-START
(200mA LOAD) FROM
SLOW-RISING INPUT SUPPLY

MAX1889 toc09
A: VIN, 5V/div
B: VGATE, 5V/div
C: VC2, 5V/div
D: VMAIN = 9V, 5V/div
10V
MAX1889
Triple-Output TFT LCD Power Supply
with Fault Protection
Typical Operating Characteristics (continued)

(Circuit of Figure 1, VIN= +3.3V, VMAIN= +9V, VPL= +20V, VNL= -7V, SHDN= FREQ = IN, PGND = GND, TA= +25°C, unless
otherwise noted.)
2ms/div
POWER-UP SEQUENCE FROM
SLOW-RISING INPUT SUPPLY

20V
MAX1889 toc10
10V
-10V
A: VIN, 5V/div
B: VMAIN = 9V, 5V/div
C: VPL = 20V, 10V/div
D: VNL = -7V, 10V/div
1ms/div
STEP-UP REGULATOR SOFT-START
(10mA LOAD) USING SHDN CONTROL

MAX1889 toc11
A: VSHDN, 5V/div
B: VGATE, 5V/div
C: VC2, 5V/div
D: VMAIN = 9V, 5V/div
10V
1ms/div
STEP-UP REGULATOR SOFT-START
(200mA LOAD) USING SHDN CONTROL

MAX1889 toc12
A: VSHDN, 5V/div
B: VGATE, 5V/div
C: VC2, 5V/div
D: VMAIN = 9V, 5V/div
10V
2ms/div
POWER-UP SEQUENCE
USING SHDN CONTROL

20V
MAX1889 toc13
10V
-10V
A: VSHDN, 5V/div
B: VMAIN = 9V, 5V/div
C: VPL = 20V, 10V/div
D: VNL = -7V, 10V/div
1μs/div
STEP-UP REGULATOR NORMAL OPERATION
(200mA LOAD)

9.05V
MAX1889 toc14
10V
500mA
A: VLX, 5V/div
B: VMAIN = 9V, 50mV/div, AC-COUPLED
C: INDUCTOR CURRENT, 500mA/div
POSITIVE CHARGE-PUMP
OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1889 toc15
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
VIN = 3.3V
IMAIN = 200mA
MAX1889riple-Output TFT LCD Power Supply
with Fault Protection
Typical Operating Characteristics (continued)

(Circuit of Figure 1, VIN= +3.3V, VMAIN= +9V, VPL= +20V, VNL= -7V, SHDN= FREQ = IN, PGND = GND, TA= +25°C, unless
otherwise noted.)
POSITIVE CHARGE-PUMP INCREMENTAL
EFFICIENCY vs. LOAD CURRENT
MAX1889 toc16
LOAD CURRENT (mA)
EFFICIENCY (%)70
EFF = (VOUT ✕ IOUT) /
(PIN(LOAD) - PIN(NOLOAD))
NEGATIVE CHARGE-PUMP
OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1889 toc17
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
VIN = 3.3V
IMAIN = 200mA
NEGATIVE CHARGE-PUMP INCREMENTAL
EFFICIENCY vs. LOAD CURRENT
MAX1889 toc18
LOAD CURRENT (mA)
EFFICIENCY (%)70
EFF = (VOUT ✕ IOUT) /
(PIN(LOAD) - PIN(NOLOAD))
POSITIVE LINEAR-REGULATOR
LOAD REGULATION
MAX1889 toc19
LOAD CURRENT (mA)
OUTPUT VOLTAGE VARIATION (%)
2ms/div
POSITIVE LINEAR-REGULATOR
LOAD-TRANSIENT RESPONSE

19.95V
MAX1889 toc20
10mA
A: VPL = 20V, 50mV/div, AC-COUPLED
B: IPL = 0 TO 10mA, 10mA/div
20V
NEGATIVE LINEAR-REGULATOR
LOAD REGULATION
MAX1889 toc21
LOAD CURRENT (mA)
OUTPUT VOLTAGE VARIATION (%)
-0.08
MAX1889
Triple-Output TFT LCD Power Supply
with Fault Protection
Typical Operating Characteristics (continued)

(Circuit of Figure 1, VIN= +3.3V, VMAIN= +9V, VPL= +20V, VNL= -7V, SHDN= FREQ = IN, PGND = GND, TA= +25°C, unless
otherwise noted.)
400μs/div
NEGATIVE LINEAR-REGULATOR
LOAD-TRANSIENT RESPONSE

MAX1889 toc22
-10mA
A: VNL = -7V, 50mV/div, AC-COUPLED
B: INL = 0 TO -10mA, 10mA/div
-6.95V
-7V
20ms/div
OVERCURRENT PROTECTION RESPONSE
TO OVERLOAD DURING STARTUP

10V
MAX1889 toc23
-10V
A: VGATE, 5V/div
B: VMAIN, 5V/div; IMAIN = 1.5A
C: VPL, 10V/div; IPL = 10mA
D: VNL, 10V/div; INL = 10mA
REFERENCE VOLTAGE vs. LOAD CURRENT
MAX1889 toc25
LOAD CURRENT (μA)
REFERENCE VOLTAGE (V)
LX CURRENT LIMIT vs. INPUT VOLTAGE
MAX1889 toc26
INPUT VOLTAGE (V)
CURRENT LIMIT (A)
20ms/div
OVERCURRENT PROTECTION RESPONSE
TO OVERLOAD DURING NORMAL OPERATION

10V
MAX1889 toc24
-10V
A: VGATE, 5V/div
B: VMAIN = 9V, 5V/div; IMAIN = 200mA TO 1.5A
C: VPL = 20V, 10V/div; IPL = 10mA
D: VNL = -7V, 10V/div; INL = 10mA
20V
MAX1889riple-Output TFT LCD Power Supply
with Fault Protection
Pin Description
PINNAMEFUNCTION
SHDN
Active-Low Shutdown Control Input. Pull SHDN below the 0.4V logic-low level to turn off all sections
of the device and pull the GATE pin high. Pull SHDN above the 1.6V logic-high level to enable the
device. Do not leave SHDN floating.PGNDPower Ground. PGND is the source of the N-channel power MOSFET. Connect PGND to the analog
ground (GND) at the device’s pins.GNDAnalog Ground. Connect GND to the power ground (PGND) at the device’s pins.REFInternal Reference Bypass Terminal. Connect a 0.22µF ceramic capacitor from REF to the analog
ground (GND). External load capability is at least 50µA.
5FB
Main Step-Up Regulator Feedback Input. FB regulates to 1.25V nominal. Connect FB to the center of
a resistive voltage-divider between the main output (VMAIN) and the analog ground (GND) to set the
main step-up regulator output voltage. Place the resistive voltage-divider close to the pin.FBN
Negative Linear-Regulator Feedback Input. FBN regulates to 125mV nominal. Connect FBN to the
center of a resistive voltage-divider between the negative output (VNEG) and the REF to set the
negative linear-regulator output voltage. Place the resistive voltage-divider close to the pin.DRVN
Negative Linear-Regulator Base Drive. Open drain of an internal P-channel MOSFET. Connect DRVN
to the base of the external linear-regulator NPN pass transistor (see Pass Transistor Selection
section).DRVP
Positive Linear-Regulator Base Drive. Open drain of an internal N-channel MOSFET. Connect DRVP
to the base of the external linear-regulator PNP pass transistor (see Pass Transistor Selection
section).FBP
Positive Linear-Regulator Feedback Input. FBP regulates to 1.25V nominal. Connect FBP to the
center of a resistive voltage-divider between the positive output (VPOS) and the analog ground (GND)
to set the positive linear-regulator output voltage. Place the resistive voltage-divider close to the pin.FREQ
Frequency Select Input. Pull FREQ above logic-high level (0.7 × VIN) to set the frequency to 1MHz
and pull FREQ below logic-low level (0.3 × VIN) to set the frequency to 500kHz. Do not leave FREQ
floating.LXSwitching Node. Drain of the internal N-channel power MOSFET for the main step-up regulator.TGNDInternal connection. Connect this pin to ground.OCN
Overcurrent Comparator Inverting Input. OCN connects to the center tap of a resistive voltage-
divider connected to the drain of the input protection P-channel MOSFET (see the Input Overcurrent
Protection section). If unused, connect OCN to REF.OCP
Overcurrent Comparator Noninverting Input. OCP is connected to the center tap of a resistive
voltage-divider that sets the input overcurrent threshold (see the Input Overcurrent Protection
section). If unused, connect OCP to GND.GATEGate Driver Output to the External P-Channel MOSFET (see the Input Overcurrent Protection section).
If unused, leave GATE open.IN
Supply Input. The supply voltage powers all the control circuitry. The input voltage range is from 2.7V
to 5.5V. Bypass with a 0.1µF ceramic capacitor between IN and GND, as close to the pins as
possible.
MAX1889
Triple-Output TFT LCD Power Supply
with Fault Protection

MAX1889
VIN
2.7V TO 5.5VP1
4.7μH
3.3μF
6.3V
3.3μF
6.3V
4.7μF
10V
4.7μF
10V
4.7μF
10V
10Ω
51.1kΩ
1MΩ
R5
1MΩ
VMAIN
0.47μF
150kΩ
75kΩ
12.1kΩ
REF
0.22μF
0.1μF
0.15μF
C10
1μF
3kΩ
150kΩ
R10
24.3kΩ
R14
221kΩ
VNL
-7V
REF
VMAIN
C11
0.1μF
C12
0.1μFD3D4
C13
0.15μF
C15
1μF
C14
0.1μF
R11
3kΩ
R12
301kΩ
R13
20kΩ
VPL
+20V
OPTIONAL
ANALOG GROUND
(GND)
POWER GROUND
(PGND)
OPTIONAL
EXTERNAL LOGIC SIGNAL
(ENABLE = LOW)
EXTERNAL LOGIC SIGNAL
(ENABLE = LOW)
GATE
OCP
FREQ
DRVN
FBN
SHDN11
OCNLXFBTGNDREFGNDPGNDDRVPFBP
C22
1000pF
R20
51kΩ
C20
470pF
C21
1000pF
C16
0.01μF
C17
220pF
R18
10kΩ
R17
1MΩ
C23
100pF
R15
43.2kΩ
R16
150kΩ
R19
15kΩ
C24
2200pF
C19
1000pF
Figure 1. Standard Application Circuit
MAX1889riple-Output TFT LCD Power Supply
with Fault Protection

MAX1889
REFERENCE
1.25V
REF
REF
REFOK
SHDNFREQIN
2.70V
2.35V
UVLO
COMPARATOR
SEQUENCE
AND FAULT
DETECTOR
THERMAL
SHUTDOWN
ONPONMN
GATE
DRIVERENGATE
OCN
OCP
PGND
DRVP
FBP
DRVN
FBN
VIN
OVERCURRENT
COMPARATOR
OSCILLATOR
OSCSLOPE_COMP
MAIN STEP-UP
WITH SOFT-START
SSDONE
FAULTM
VPL
VMAIN
VNL
ANALOG
GAIN BLOCK
ANALOG
GAIN BLOCK
FAULT
COMPARATOR
FAULT
COMPARATOR
0.125V
0.35V
REF
Figure 2. MAX1889 System Functional Diagram
MAX1889
Triple-Output TFT LCD Power Supply
with Fault Protection
Standard Application Circuit

The standard application circuit (Figure 1) of the
MAX1889 generates +9V, +20V, and -7V outputs for
TFT LCD displays. The input voltage is from 2.7V to
5.5V. Table 1 lists the recommended component
options and Table 2 lists the component suppliers.
Detailed Description

The MAX1889 contains a high-performance, step-up
switching regulator, two low-cost linear-regulator con-
trollers, and multiple levels of protection circuitry. Figure
2 shows the system functional diagram of the device.
The output voltage of the main step-up converter (VMAIN)
can be set from VINto 13V with an external resistive volt-
age-divider. The high switching frequency (500kH/1MHz)
of the main step-up converter and current-mode control
provide fast transient response and allow the use of low-
profile inductors and ceramic capacitors. The internal
power MOSFET minimizes the external component count
while achieving high efficiency by incorporating a loss-
less current-sensing technology.
The switching node (LX) can generate both positive
and negative voltage supplies by driving charge-pump
stages of capacitors and diodes. The user can use as
many charge-pump stages as needed to generate sup-
ply voltages of more than +30V and -15V. The positive
and negative linear-regulator controllers postregulate
the charge-pump supply voltages and allow users to
program power-up sequencing as well.
The unique input switch control of the MAX1889 senses
the current drawn from the input power supply by moni-
toring the voltage drop across the input P-channel
MOSFET and latches off if an overcurrent condition
lasts for more than the fault timer period. In addition, all
three outputs are monitored for fault conditions that last
longer than the fault latch timer. If the junction tempera-
ture of the IC exceeds +160°C, the device goes into a
latched shutdown state.
Main Step-Up Regulator

The main step-up regulator switches at 1MHz (or 500kHz)
and employs a current-mode control architecture to
maximize loop bandwidth to provide fast-transient
response to pulsed loads found in source drivers for TFT
LCD panels. Also, the high switching frequency allows
the use of low-profile inductors and capacitors to
minimize the thickness of LCD panel designs. The
integrated high-efficiency MOSFET and the IC’s built-in
soft-start function reduce the number of external com-
ponents required while controlling inrush current.
DESIGNATIONDESCRIPTION

C2, C33.3µF, 6.3V X5R ceramic capacitors (0805)
Taiyo Yuden JMK212BJ335MG
C4, C5, C64.7µF, 10V X7R ceramic capacitors (1210)
Taiyo Yuden LMK352BJ475MF1.0A, 30V Schottky diode (S-flat)
Toshiba CRS02
D2, D3, D4
200mA, 25V dual-series Schottky diodes
(SOT23)
Fairchild BAT54S250mA, 75V switching diode (SOT23)
Central Semiconductor CMPD9146.8µH, 1.3A inductor
Coilcraft LPO2506IB-682
2.4A, 20V P-channel MOSFET
(3-pin SuperSOT)
Fairchild FDN304P200mA, 40V NPN bipolar transistor (SOT23)
Fairchild MMBT3904200mA, 40V PNP bipolar transistor (SOT23)
Fairchild MMBT3906
Table 1. Component List
SUPPLIERPHONEFAXWEBSITE

Coilcraft847-639-6400847-639-1469www.coilcraft.com
Fairchild408-822-2000408-822-2102www.fairchildsemi.com
Taiyo Yuden800-348-2496847-925-0899www.t-yuden.com
Toshiba949-455-2000949-859-3963www.toshiba.com
Table 2. Component Suppliers
MAX1889riple-Output TFT LCD Power Supply
with Fault Protection

Depending on the input-to-output voltage ratio, the reg-
ulator controls the output voltage and the power deliv-
ered to the output by modulating the duty cycle (D) of
the power MOSFET in each switching cycle. The duty
cycle of the MOSFET is approximated by:
On the rising edge of the internal clock, the controller
sets a flip-flop, which turns on the N-channel MOSFET
(Figure 3). The input voltage is applied across the
inductor. The inductor current ramps up linearly, storing
energy in a magnetic field. Once the sum of the feed-
back voltage error-amplifier output, slope-compensa-
tion, and current-feedback signals trip the multi-input
PWM comparator, the MOSFET turns off, and the flip-
flop resets. Since the inductor current is continuous, a
transverse potential develops across the inductor that
turns on the diode (D1). The voltage across the inductor
becomes the difference between the output voltage and
the input voltage. This discharge condition forces the
current through the inductor to ramp back down, trans-
ferring the energy to the output capacitor and the load.
The MOSFET remains off for the rest of the clock cycle. VV
MAININ
MAIN≈-
ILIM
CURRENT
SENSE
OSC
ILIM
COMPARATOR
RESET DOMINANT
SSDONE
SOFT-START
REFOUT
SSOK
REFIN
CLK
ONMN
REF
SLOPE_COMP
PGND
FAULT M
MAX1889
Figure 3. Main Step-Up Regulator Functional Diagram
MAX1889
Triple-Output TFT LCD Power Supply
with Fault Protection
Positive Linear-Regulator Controller

The positive linear regulator provides the positive high
voltage for the TFT LCD gate drivers. The high voltage
can be produced using a charge-pump circuit as shown
in Figure 1. Use as many stages as necessary to obtain
the required output voltage (see the Selecting the
Number of Charge-Pump Stagessection). The positive
linear-regulator controller is an analog gain block with an
open-drain N-channel output. It drives an external PNP
pass transistor with a 3kΩbase-to-emitter resistor to
post-regulate the charge-pump output (Figure 1). The
regulator controller is designed to be stable with an out-
put capacitor of 0.1µF or more.
To enable the regulator using an external control signal,
apply the logic-control input in series with a signal
diode (Figure 1). Additional delay can be added with
external circuitry.
Note that the voltage rating of the DRVP output is 28V.
If higher voltages are present, an external cascode
NPN transistor should be used with the emitter con-
nected to DRVP, the base to VMAIN, and the collector to
the base of the PNP.
Negative Linear-Regulator Controller

The negative linear regulator provides the negative volt-
age required to supply gate drivers in TFT LCD panels.
The negative voltage can be produced using a charge
pump circuit as shown in Figure 1. Use as many stages
as necessary to obtain the required output voltage (see
the Selecting the Number of Charge-Pump Stagessec-
tion). The negative linear-regulator controller is an ana-
log gain block with an open-drain P-channel output. It
drives an external NPN pass transistor with a 3kΩbase-
to-emitter resistor to postregulate the charge-pump out-
put (Figure 1). The regulator controller is designed to
be stable with an output capacitor of 0.1µF or more.
The negative linear regulator is enabled as soon as the
main step-up regulator is enabled. To enable the regula-
tor using an external control signal, apply the logic-control
input through an open-drain output or an N-channel MOS-
FET (Figure 1). Additional delay can be added with exter-
nal circuitry (see the Applications Informationsection).
Note that the voltage rating of the DRVN output is
VIN- 28V. If higher voltages are present, an external
cascode PNP transistor should be used with the emitter
connected to DRVN, the base to GND, and the collec-
tor to the base of the NPN.
Undervoltage Lockout (UVLO)

The UVLO comparator of the MAX1889 compares the
input voltage at the IN pin with the UVLO threshold (2.7V
rising, 2.35V falling, typ) to ensure that the input voltage is
high enough for reliable operation. The 350mV (typ) hys-
teresis prevents supply transients from causing a restart.
Once the input voltage exceeds the UVLO threshold, the
controller enables the reference block. Once the refer-
ence is above 1.05V, an internal 12µA current source
pulls the GATE pin low and turns on an external P-chan-
nel MOSFET switch (P1, Figure 1) that connects the input
supply to the regulator. When the input voltage falls below
the UVLO threshold, the controller sets the fault latch and
pulls GATE high with an internal 100Ωswitch to turn off
P1 quickly (Figure 4).
Reference Voltage (REF)

The reference output is nominally 1.25V, and can
source at least 50µA (see the Typical Operating
Characteristics). Bypass REF with a 0.22µF ceramic
capacitor connected between REF and GND.
Oscillator Frequency (FREQ)

The internal oscillator frequency is pin programmable.
Connect FREQ to ground for 500kHz operation and to VIN
for 1MHz operation. Note that the soft-start period scales
with the oscillator frequency (see the Soft-Startsection).
Shutdown (SHDN)

A logic-low signal on the SHDNpin disables all device
functions including the reference. When shut down, the
supply current drops to 0.1µA (typ) to maximize battery
life. The output capacitance, feedback resistors, and load
current determine the rate at which each output voltage
decays. A logic-high signal on the SHDNpin activates the
MAX1889 (see the Power-Up Sequencingsection). Do not
leave the pin floating. If unused, connect SHDNto IN.
Toggling SHDNor cycling IN clears the fault latch.
0.625V
12μA
GATE
CIN
Figure 4. External Input P-Channel MOSFET Switch Control
MAX1889riple-Output TFT LCD Power Supply
with Fault Protection
Power-Up Sequencing and
Inrush Current Control

Once SHDNis high, the MAX1889 enables the UVLO
circuitry and compares the input voltage with the UVLO
rising threshold (2.7V, typ). If the input voltage exceeds
the UVLO rising threshold, the reference is enabled.
When the reference voltage ramps up above 1.05V
(typ), the MAX1889 enables the oscillator and turns on
the external P-channel MOSFET P1 (Figure 1) by
pulling GATE low. GATE is pulled down with a 12µA
current source. Add a capacitor from the gate of P1 to
its drain to slow down the turn-on rate of the MOSFET,
and reduce inrush current. Once GATE reaches around
0.6V, an internal N-channel MOSFET turns on and pulls
GATE to ground in order to maximize the enhancement
of the external P-channel MOSFET. As P1 fully turns on,
the main step-up regulator powers up with soft-start
(see the Soft-Startsection). The negative linear regula-
tor is enabled at the same time as the main step-up
regulator. The positive linear regulator is enabled after
the soft-start routine is completed. The fault detection
timer begins after the main step-up regulator has fin-
ished its soft-start period.
Soft-Start

The soft-start of the main step-up regulator (Figure 3) is
achieved by ramping up the reference voltage of the
multi-input PWM comparator in 4096 oscillator clock
cycles. The 4096 clock cycles correspond to 4.096ms
for 1MHz operation and 8.192ms for 500kHz operation.
The reference of the PWM comparator comes from a
5-bit DAC that generates 32 steps when the reference
ramps up from 0V to its final value. This soft-start
method allows a gradual increase of the output voltage
to reduce the input surge current (see the startup
waveforms in the Typical Operating Characteristics).
The average input current is given as:
where VMAINis the main step-up regulator output volt-
age, VINis the input voltage, COUTis the main step-up
regulator output capacitor, ηis the efficiency of the
step-up regulator, and tSSis the soft-start period
(4.096ms for 1MHz operation and 8.192ms for 500kHz
operation).
Input Overcurrent Protection

The high-side overcurrent comparator of the MAX1889
provides input overcurrent protection when it is used
together with the external P-channel MOSFET switch P1
(Figure 1). Connect resistive voltage-dividers from the
source and drain of P1 to GND to set the overcurrent
threshold. The center taps of the dividers are connected
to the overcurrent comparator inputs (OCN and OCP)
See the Setting the Input Overcurrent Thresholdsection
for information on calculating resistor values.An overcur-
rent event activates the fault-protection circuitry.
Fault Protection

Once the soft-start routine is completed, if the output of
the main regulator or either linear regulator is below its
respective fault-detection threshold, or the input overcur-
rent comparator pulls high, the MAX1889 activates the
fault timer. If the fault condition still exists after the 64ms
fault-timer duration, the MAX1889 sets the fault latch,
which shuts down all the outputs except the reference,
which remains active. After removing the fault condition,
toggle SHDN(below 0.4V) or cycle the input voltage
(below 2.2V) to clear the fault latch and reactivate the
device.
Thermal Shutdown

The thermal shutdown feature limits total power dissipa-
tion in the MAX1889. When the junction temperature
(TJ) exceeds +160°C, a thermal sensor sets the fault
latch (Figure 2), which shuts down all the outputs
except the reference, allowing the device to cool down.
Once the device cools down by 15°C, toggle SHDN
(below 0.4V) or cycle the input voltage (below 2.2V) to
clear the fault latch and reactivate the device.
Design Procedure
Main Step-Up Regulator
Output Voltage Selection

Adjust the output voltage by connecting a resistive volt-
age-divider from the output (VMAIN) to GND with the
center tap connected to FB (Figure 1). Select R7 in the
10kΩto 50kΩrange. Calculate R6 with the following
equations:
where
For example, at VIN= 3V, VMAIN= 9V, D ≈0.66, and VFB
= 1.229V.
VMAINcan range from VINto 13V.VVMAINFB671=[](/)-VCINAVGMAINOUTSS=×VDmVandDVVMAININ
MAIN=−×≈−124220.()
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