MAX17082GTL+ ,Dual-Phase, Quick-PWM Controllers for IMVP-6+/IMVP-6.5 CPU Core Power SuppliesApplications TOP VIEWIMVP-6+/IMVP-6.5 Core Supply30 29 28 27 26 25 24 23 22 21Multiphase CPU Core S ..
MAX17082GTL+T ,Dual-Phase, Quick-PWM Controllers for IMVP-6+/IMVP-6.5 CPU Core Power SuppliesMAX17021/MAX17082/MAX1748219-4372; Rev 2; 7/09Dual-Phase, Quick-PWM Controllers forIMVP-6+/IMVP-6.5 ..
MAX1708EEE ,High-Frequency / High-Power / Low-Noise / Step-Up DC-DC ConverterApplications Ordering InformationRouters, Servers, Workstations, Card RacksPART TEMP. RANGE PIN-PAC ..
MAX1708EEE+ ,High-Frequency, High-Power, Low-Noise, Step-Up DC-DC ConverterELECTRICAL CHARACTERISTICS(V = V = 3.6V, ONA = ONB = FB = GND, T = 0°C to +85°C, unless otherwise n ..
MAX1708EEE+T ,High-Frequency, High-Power, Low-Noise, Step-Up DC-DC ConverterApplications Ordering InformationRouters, Servers, Workstations, Card RacksPART TEMP. RANGE PIN-PAC ..
MAX1709ESE ,4A / Low-Noise / High-Frequency / Step-Up DC-DC Converter
MAX4528CUA+ ,Low-Voltage, Phase-Reversal Analog Switchapplications such as chopper amplifiers. Itoperates from a +2.7V to +12V single supply or from♦ Rai ..
MAX4528ESA+ ,Low-Voltage, Phase-Reversal Analog SwitchApplications _______________Ordering InformationChopper-Stabilized AmplifiersPART TEMP. RANGE PIN-P ..
MAX4528ESA+T ,Low-Voltage, Phase-Reversal Analog SwitchELECTRICAL CHARACTERISTICS: ±5V Dual Supplies (continued)(V+ = 5V, V- = -5V, V = 2.4V, V = 0.8V, T ..
MAX4529CSA ,Low-Voltage / Bidirectional RF/Video SwitchFeaturesThe MAX4529 is a low-voltage T-switch designed for' High 50Ω Off Isolation: -80dB at 10MHzs ..
MAX4529ESA ,Low-Voltage / Bidirectional RF/Video SwitchApplicationsMAX4529CPA 0°C to +70°C 8 Plastic DIP —RF SwitchingMAX4529CSA 0°C to +70°C 8 Narrow SO ..
MAX4529ESA+ ,Low-Voltage, Bidirectional RF Video SwitchApplicationsMAX4529CPA 0°C to +70°C 8 Plastic DIP —RF SwitchingMAX4529CSA 0°C to +70°C 8 Narrow SO ..
MAX17021GTL+-MAX17021GTL+T-MAX17082GTL+-MAX17082GTL+T
Dual-Phase, Quick-PWM Controllers for IMVP-6+/IMVP-6.5 CPU Core Power Supplies
General DescriptionThe MAX17021/MAX17082/MAX17482 are 2/1-phase-
interleaved Quick-PWM™ step-down VID power-supply
controllers for notebook CPUs. True out-of-phase oper-
ation reduces input ripple current requirements and
output- voltage ripple, while easing component selec-
tion and layout difficulties. The Quick-PWM control pro-
vides instantaneous response to fast load-current
steps. Active voltage positioning reduces power dissi-
pation and bulk output capacitance requirements and
allows ideal positioning compensation for tantalum,
polymer, or ceramic bulk output capacitors.
A slew-rate controller allows controlled transitions between
VID codes, controlled soft-start and shutdown, and con-
trolled exit from suspend. A thermistor-based temperature
sensor provides a programmable thermal-fault output
(VRHOT). A current monitor output (IMON) provides an
analog current output proportional to the power consumed
by the CPU (MAX17082/MAX17482 only). Output under-
voltage, overvoltage(MAX17021/MAX17082 only), and
thermal protection shut the controller down when any of
these faults are detected. A voltage-regulator power-OK
(PWRGD) output indicates the output is in regulation.
Additionally, the MAX17021/MAX17082/MAX17482 fea-
ture true differential current sense and a phase-good
(PHASEGD) output that indicates a phase imbalance
fault condition.
The MAX17021 supports the IMVP-6+ specification
while the MAX17082/MAX17482 support the IMVP-6.5
requirements. The MAX17021/MAX17082/MAX17482
are available in a 5mm x 5mm, 40-pin TQFN package.
ApplicationsIMVP-6+/IMVP-6.5 Core Supply
Multiphase CPU Core Supply
Voltage-Positioned, Step-Down Converters
Notebook/Desktop Computers
Blade Servers
FeaturesSingle-/Dual-Phase, Quick-PWM ControllersMAX17021 IMVP-6+ (Montevina)MAX17082/MAX17482 IMVP-6.5 (Calpella)±0.5% VOUTAccuracy Over Line, Load, andTemperature7-Bit 0 to 1.50V VID ControlDynamic Phase Selection Optimizes Active/Sleep
EfficiencyTransient Phase Overlap Reduces Output
CapacitanceIntegrated Boost SwitchesActive Voltage Positioning with Adjustable GainProgrammable 200kHz to 800kHz SwitchingFrequencyAccurate Current Balance and Current LimitAdjustable Slew-Rate ControlPower-Good, Clock Enable, and Thermal-Fault
OutputsPhase Current Imbalance Fault OutputDrives Large Synchronous Rectifier MOSFETs4V to 26V Battery Input-Voltage RangeUndervoltage and Thermal-Fault ProtectionOvervoltage Protection (MAX17021/MAX17082)Soft-Startup and Soft-Shutdown
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power SuppliesBST1LX1DL1V
DH2LX2BST2VRHOTDL2DH1
N.C. (IMON)
ILIM
TIME
CCI
FBAC
GNDSTHRM
PGDIN
SHDN
TON
V3P3
PWRGD
PHASEGD
DPRSLPVR
PSI
CSP2
CSN2
CSP1
DPRSTP (SLOW)
CSN1
CLKEN
MAX17021
(MAX17082)
MAX17482
THIN QFNTOP VIEW
() DESIGNATES MAX17082/MAX17482 PIN NAME.
*EXPOSED PAD. CONNECTED TO GND.45672829302624232210
*EP
Pin Configuration
Ordering Information19-4372; Rev 2; 7/09
EVALUATION KIT
AVAILABLE+Denotes a lead-free(Pb)/RoHS-compliant package.
*EP = Exposed pad.
PARTTEMP RANGEPIN-PACKAGE
MAX17021GTL+ -40°C to +105°C 40 TQFN-EP*
MAX17082GTL+ -40°C to +105°C 40 TQFN-EP*
MAX17482GTL+ -40°C to +105°C 40 TQFN-EP*
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN1= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND; TA
= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC, VDD, V3P3 to GND...........................................-0.3V to +6V
D0–D6 to GND..........................................................-0.3V to +6V
PGDIN, DPRSLPVR, PSIto GND..............................-0.3V to +6V
DPRSTP(MAX17021) to GND..................................-0.3V to +6V
SLOW(MAX17082/MAX17482) to GND...................-0.3V to +6V
CSP1, CSP2, CSN1, CSN2 to GND..........................-0.3V to +6V
THRM, ILIM, PHASEGD to GND...............................-0.3V to +6V
PWRGD, VRHOTto GND.........................................-0.3V to +6V
CLKENto GND...........................................-0.3V to V3P3 + 0.3V
FB, FBAC to GND.........................................-0.3V to VCC + 0.3V
TIME, CCI to GND.........................................-0.3V to VCC + 0.3V
IMON to GND (MAX17021/MAX17082)........-0.3V to VCC+ 0.3V
GNDS to GND.......................................................-0.3V to +0.3V
SHDNto GND (Note 1)...........................................-0.3V to +16V
TON to GND...........................................................-0.3V to +30V
DL1, DL2 to GND..........................................-0.3V to VDD + 0.3V
BST1, BST2 to GND...............................................-0.3V to +36V
BST1, BST2 to VDD.................................................-0.3V to +30V
LX1 to BST1..............................................................-6V to +0.3V
LX2 to BST2..............................................................-6V to +0.3V
DH1 to LX1..............................................(-0.3V to VBST1)+ 0.3V
DH2 to LX2..............................................(-0.3V to VBST2)+ 0.3V
Continuous Power Dissipation
40-Pin 5mm x 5mm TQFN Up to +70°C.....................1778mW
(derate above +70°C)............................................22.2mW/°C
Operating Temperature Range.........................-40°C to +105°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +165°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
PWM CONTROLLER VCC, VDD 4.5 5.5 Input-Voltage Range V3P33.0 3.6 V
DAC codes from 0.8125V
to 1.5000V -0.5 +0.5 %
DAC codes from 0.3750V
to 0.8000V -7 +7 DC Output-Voltage
Accuracy VOUT
Measured at FB
with respect to
GNDS;
includes load-
regulation error
(Note 2) DAC codes from 0 to
0.3625V -20 +20
mV
MAX17021 IMVP-6+ 1.194 1.200 1.206 Boot Voltage VBOOT MAX17082/MAX17482 IMVP-6.5 1.094 1.100 1.106 V
Line Regulation Error VCC = 4.5V to 5.5V, VIN = 4.5V to 26V 0.1 %
FB Input Bias Current TA = +25°C -0.1 +0.1 μA
GNDS Input Range -200 +200 mV
GNDS Gain AGNDS VOUT/VGNDS 0.97 1.00 1.03 V/V
GNDS Input Bias Current IGNDS TA = +25°C-0.5 +0.5 μA
TIME Regulation Voltage VTIME RTIME = 71.5k1.985 2.000 2.015 V
Note 1:SHDNmight be forced to 12V for the purpose of debugging prototype boards using the no-fault test mode, which disables
fault protection and overlapping operation.
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN1= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND; TA
= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSRTIME = 71.5k (12.5mV/μs nominal) -10 +10
RTIME = 35.7k (25mV/μs nominal) to 178k
(5mV/μs nominal) -15 +15
Soft-start and soft-shutdown:
RTIME = 35.7k (3.125mV/μs nominal) to 178k
(0.625mV/μs nominal)
-25 +25
Slow:
IMVP-6.5 (MAX17082/MAX17482): VSLOW = 0V,
1/2 of nominal slew rate, RTIME = 71.5k
(6.25mV/μs nominal);
IMVP-6+ (MAX17021): VDPRSTP = VDPRSLPVR = 5V,
1/4 of nominal slew rate, RTIME = 71.5k
(3.125mV/μs nominal)
-15 +15
TIME Slew-Rate Accuracy
Slow:
IMVP-6.5 (MAX17082/MAX17482): VSLOW = 0V,
1/2 of nominal slew rate, RTIME = 35.7k
(12.5mV/μs nominal) to 178k (2.5mV/μs
nominal);
IMVP-6+ (MAX17021): VDPRSTP = VDPRSLPVR = 5V
1/4 of nominal slew rate, RTIME = 35.7k
(6.25mV/μs nominal) to 178k (1.25mV/μs
nominal)
-15 +15
RTON = 96.75k (600kHz per phase),
167ns nominal -15 +15
RTON = 200k (300kHz per phase),
333ns nominal -10 +10 On-TimetON
Measured
at DH_
(Note 3)
RTON = 303.25k (200kHz per phase),
500ns nominal -15 +15
Minimum Off-Time tOFF(MIN) Measured at DH_ (Note 3) 300 350 ns
TON Shutdown Input
Current IRTON,SDN SHDN = GND, VIN = 26V, VCC = VDD = 0V or 5V,
TA = +25°C 0.01 0.1 μA
BIAS CURRENTSQuiescent Supply Current
(VCC)ICC Measured at VCC, VDPRSLPVR = 5V, FB forced
above the regulation point 2.5 5 mA
Quiescent Supply Current
(VDD)IDD Measured at VDD, VDPRSLPVR = 0V, FB forced
above the regulation point, TA = +25°C 0.02 1 μA
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN1= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND; TA
= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSQuiescent Supply Current
(V3P3) I3P3 Measured at V3P3, FB forced within the CLKEN
power-good window 2 4 μA
Shutdown Supply Current
(VCC)ICC,SDN Measured at VCC,SHDN = GND, TA = +25°C 0.01 1 μA
Shutdown Supply Current
(VDD)IDD,SDN Measured at VDD,SHDN = GND, TA = +25°C 0.01 1 μA
Shutdown Supply Current
(V3P3) I3P3,SDN Measured at V3P3, SHDN = GND, TA = +25°C 0.01 1 μA
FAULT PROTECTIONSkip mode after output reaches the regulation
voltage or PWM mode; measured at FB with
respect to the voltage target set by the VID code;
see Table 4.
250 300 350 mV
IMVP-6.5
(MAX17082) 1.45 1.50 1.55 Soft-start, soft-shutdown, skip
mode, and output have not
reached the regulation
voltage; measured at FB
IMVP-6+
(MAX17021) 1.75 1.80 1.85
Output Overvoltage-
Protection Threshold
(MAX17021/MAX17082 Only)
VOVP
Minimum OVP threshold; measured at FB 0.8
Output Overvoltage-
Propagation Delay
(MAX17021/MAX17082 Only)
tOVP FB forced 25mV above trip threshold 10 μs
Output Undervoltage-
Protection Threshold VUVP Measured at FB with respect to the voltage target
set by the VID code; see Table 4 -450 -400 -350 mV
Output Undervoltage-
Propagation Delay tUVP FB forced 25mV below trip threshold 10 μs
CLKEN Startup Delay and
Boot Time Period tBOOTMeasured from the time when FB reaches the
boot target voltage (Note 2) 20 60 100 μs
PWRGD Startup Delay Measured at startup from the time when CLKEN
goes low 3 6.5 10 ms
Lower threshold,
falling edge
(undervoltage)
-350 -300 -250
CLKEN and PWRGD
Threshold
Measured at FB with respect
to the voltage target set by
the VID code; see Table 4,
20mV hysteresis (typ) Upper threshold,
rising edge
(overvoltage)
+150 +200 +250
mV
CLKEN and PWRGD Delay FB forced 25mV outside the PWRGD trip
thresholds 10 μs
PHASEGD Delay V(CCI,FB) forced 25mV outside trip thresholds 10 μs
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN1= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND; TA
= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSCLKEN, PWRGD, and
PHASEGD Transition
Blanking Time
(VID Transitions)
tBLANK Measured from the time when FB reaches the
target voltage (Note 2) 20 μs
PHASEGD Transition
Blanking Time (Phase 2
Enable Transitions)
Number of DH2 pulses for which PHASEGD is
blanked after phase 2 is enabled 32 Pulses
CLKEN Output Low Voltage Low state, ISINK = 3mA 0.4 V
CLKEN Output High
Voltage High state, ISOURCE = 3mA V3P3 -
0.4 V
PWRGD, PHASEGD Output
Low Voltage Low state, ISINK = 3mA 0.4 V
PWRGD, PHASEGD
Leakage Current
High-impedance state, PWRGD, PHASEGD forced
to 5V, TA = +25°C 1 μA
CSN1 Pulldown Resistance
in Shutdown
SHDN = 0, measured after soft-shutdown
completed (DL_ = low) 10
VCC Undervoltage Lockout
(UVLO) Threshold VUVLO(VCC) Rising edge, 65mV typical hysteresis,
controller disabled below this level 4.05 4.27 4.48 V
THERMAL PROTECTIONVRHOT Trip Threshold Measured at THRM as a percentage of VCC,
falling edge, typical hysteresis = 75mV 29 30 31 %
VRHOT Delay tVRHOTTHRM forced 25mV below the VRHOT trip
threshold, falling edge 10 μs
VRHOT Output
On-Resistance RON(VRHOT)Low state 2 10
VRHOT Leakage Current High-impedance state, VRHOT forced to 5V,
TA = +25°C 1 μA
THRM Input Leakage ITHRM VTHRM = 0 to 5V, TA = +25°C -0.1 +0.1 μA
Thermal-Shutdown Threshold TSHDN Typical hysteresis = 15°C 160 °C
VALLEY CURRENT LIMIT, DROOP, AND CURRENT BALANCEVTIME - VILIM = 100mV 7 10 13
VTIME - VILIM = 500mV 45 50 55 Current-Limit Threshold
Voltage (Positive) VLIMITVCSP_ - VCSN_
ILIM = VCC 20 22.5 25
mV
Current-Limit Threshold
Voltage (Negative)
Accuracy
VLIMIT(NEG) VCSP_ - VCSN_, nominally -125% of VLIMIT-4 +4 mV
Current-Limit Threshold
Voltage (Zero Crossing) VZERO VGND - VLX_, DPRSLPVR = 5V 1 mV
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN1= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND; TA
= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSCSP_, CSN_ Common-
Mode Input Range 0 2 V
Phase 2 Disable Threshold Measured at CSP2 3 VCC -
VCC -
0.4 V
CSP_, CSN_ Input Current ICSP_, ICSN_ TA = +25°C -0.2 +0.2 μA
ILIM Input Current IILIMTA = +25°C -0.1 +0.1 μA
TA = +25oC -0.5 +0.5
Droop Amplifier Offset
(1/N) x (VCSP_ - VCSN_) at
IFBAC = 0;
indicates summation over
all phases from 1 to N, N = 2 TA = 0oC to +85oC -0.75 +0.75
mV/
phase
Droop Amplifier
Transconductance Gm(FBAC)
IFBAC/[ (VCSP_ - VCSN_)];
indicates summation over all phases from 1 to
N, N = 2, VFBAC = VCSN- = 0.45V to 2V
590 600 608 μS
Current-Balance Amplifier
Offset (VCSP1 - VCSN1) - (VCSP2 - VCSN2) at ICCI = 0 -1.0 +1.0 mV
Current-Balance Amplifier
Transconductance Gm(CCI) ICCI/[(VCSP1 - VCSN1) - (VCSP2 - VCSN2)] 200 μS
CURRENT MONITOR (MAX17082/MAX17482 Only) Current-Monitor Output
Current at Full Load
Condition
IIMONVCSP1 - VCSN1 = VCSP2 - VCSN2 = 20mV,
VCSN_ = 0.45V to 2.0V 93.12 96 98.88 μA
Current-Monitor
Transconductance Gm(IMON)
IIMON/[ (VCSP_ - VCSN_)];
indicates summation over all phases from 1 to
N, N = 2, CSN_ = 0.45V to 2V
2.2 2.4 2.6 mS
IMON Clamp Voltage VIMON,max ISINK = 10mA 1.05 1.10 1.15 V
IMON Pulldown Resistance
in Shutdown
SHDN = 0, measured after soft-shutdown
completed (DL_ = low) 10
GATE DRIVERSHigh state (pullup) 0.9 2.5 DH_ Gate Driver
On-Resistance RON(DH_) BST_ - LX_ forced to 5V Low state (pulldown) 0.7 2.0
High state (pullup) 0.7 2.0 DL_ Gate Driver
On-Resistance RON(DL_)
Low state (pulldown) 0.25 0.7
DH_ Gate Driver Source
Current IDH_(SOURCE) DH_ forced to 2.5V, BST_ - LX_ forced to 5V 2.2 A
DH_ Gate Driver Sink
Current IDH_(SINK) DH_ forced to 2.5V, BST_ - LX_ forced to 5V 2.7 A
DL_ Gate Driver Source
Current IDL_(SOURCE) DL_ forced to 2.5V 2.7 A
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN1= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND; TA
= 0°C to +85°C, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSDL_ Gate Driver Sink
Current IDL_(SINK) DL_ forced to 2.5V 8 A
Internal BST_ Switch
On-Resistance RON(BST_) 10 20
LOGIC AND I/OLogic Input High Voltage VIHSHDN, PGDIN
MAX17021: DPRSLPVR 2.3 V
Logic Input Low Voltage VIL SHDN, PGDIN
MAX17021: DPRSLPVR 1.0 V
SHDN No-Fault Level To enable no-fault mode 11 13 V
Low-Voltage Logic Input
High Voltage VIHLV
PSI, D0–D6;
MAX17082/MAX17482: DPRSLPVR, SLOW,
MAX17021: DPRSTP
0.67 V
Low-Voltage Logic Input
Low Voltage VILLV
PSI, D0–D6;
MAX17082/MAX17482: DPRSLPVR, SLOW,
MAX17021: DPRSTP0.33 V
Logic Input Current TA = +25°C, SHDN, DPRSLPVR, PGDIN, PSI,
DPRSTP,SLOW, D0–D6 = 0 or 5V -1 +1 μA
ELECTRICAL CHARACTERISTICS(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3= 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN2= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND;
TA= -40°C to +105°C, unless otherwise noted.) (Note 4)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
PWM CONTROLLERVCC, VDD 4.5 5.5 Input-Voltage Range
V3P33.0 3.6
DAC codes from
0.8125V to 1.5000V -0.75 +0.75 %
DAC codes from
0.3750V to 0.8000V -10 +10 DC Output-Voltage
Accuracy VOUT
Measured at FB with
respect to GNDS;
includes load-
regulation error (Note 2) DAC codes from 0 to
0.3625V -25 +25
mV
MAX17021: IMVP-6+ 1.19 1.21 Boot Voltage VBOOT MAX17082/MAX17482: IMVP-6.5 1.09 1.11 V
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3= 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN2= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND;
TA= -40°C to +105°C, unless otherwise noted.) (Note 4)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS GNDS Input Range -200 +200 mV
GNDS Gain AGNDS VOUT/VGNDS 0.97 1.03 V/V
TIME Regulation Voltage VTIME RTIME = 71.5k1.985 2.015 V
RTIME = 71.5k (12.5mV/μs nominal) -10 +10
RTIME = 35.7k (25mV/μs nominal) to 178k
(5mV/μs nominal) -15 +15
Soft-start and soft-shutdown:
RTIME = 35.7k (3.125mV/μs nominal) to 178k
(0.625mV/μs nominal)
-25 +25
Slow:
IMVP-6.5 (MAX17082/MAX17482): VSLOW = 0V,
1/2 of nominal slew rate, RTIME = 71.5k
(6.25mV/μs nominal);
IMVP-6+ (MAX17021): VDPRSTP = VDPRSLPVR = 5V,
1/4 of nominal slew rate, RTIME = 71.5k
(3.125mV/μs nominal)
-15 +15 TIME Slew-Rate Accuracy
Slow:
IMVP-6.5 (MAX17082/MAX17482): VSLOW = 0V,
1/2 of nominal slew rate, RTIME = 35.7k
(12.5mV/μs nominal) to 178k (2.5mV/μs nominal);
IMVP-6+ (MAX17021): VDPRSTP = VDPRSLPVR = 5V,
1/4 of nominal slew rate, RTIME = 35.7k
(6.25mV/μs nominal) to 178k (1.25mV/μs nominal)
-17 +17
RTON = 96.75k (600kHz per phase),
167ns nominal -15 +15
RTON = 200k (300kHz per phase),
333ns nominal -15 +15 On-TimetON
Measured
at DH_
(Note 3)
RTON = 303.25k (200kHz per phase),
500ns nominal -15 +15
Minimum Off-Time tOFF(MIN) Measured at DH_ (Note 3) 350 ns
BIAS CURRENTSQuiescent Supply Current
(VCC)ICC Measured at VCC, VDPRSLPVR = 5V, FB forced
above the regulation point 5 mA
Quiescent Supply Current
(V3P3) I3P3 Measured at V3P3, FB forced within the CLKEN
power-good window 4 μA
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN2= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND; TA
= -40°C to +105°C, unless otherwise noted.) (Note 4)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
FAULT PROTECTIONSkip mode after output reaches the regulation
voltage or PWM mode, measured at FB with
respect to the voltage target set by the VID code
(see Table 4)
250 350 mV
IMVP-6.5
(MAX17082) 1.45 1.55
Output Overvoltage-
Protection Threshold
(MAX17021/MAX7082
Only)
VOVP
Soft-start, soft-shutdown, skip
mode, and output have not
reached the regulation voltage,
measured at FB
IMVP-6+
(MAX17021) 1.75 1.85
Output Undervoltage-
Protection Threshold VUVP Measured at FB with respect to the voltage target
set by the VID code (see Table 4) -450 -350 mV
CLKEN Startup Delay and
Boot Time Period tBOOTMeasured from the time when FB reaches the
boot target voltage (Note 3) 20 100 μs
PWRGD Startup Delay Measured at startup from the time when CLKEN
goes low 3 10 ms
Lower
threshold,
falling edge
(undervoltage)
-350 -250
CLKEN and PWRGD
Threshold
Measured at FB with respect to
the voltage target set by the VID
code (see Table 4), 20mV
hysteresis (typ) Upper
threshold,
rising edge
(overvoltage)
+150 +250
mV
CLKEN Output Low Voltage Low state, ISINK = 3mA 0.4 V
CLKEN Output High
Voltage High state, ISOURCE = 3mA V3P3 -
0.4 V
PWRGD, PHASEGD Output
Low Voltage Low state, ISINK = 3mA 0.4 V
VCC Undervoltage-Lockout
Threshold (UVLO) VUVLO(VCC) Rising edge, 65mV typical hysteresis, controller
disabled below this level 4.0 4.5 V
THERMAL PROTECTIONVRHOT Trip Threshold Measured at THRM as a percentage of VCC,
falling edge, typical hysteresis = 75mV 28 32 %
VRHOT Output
On-Resistance RON(VRHOT)Low state 10
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
Note 2:When pulse skipping, the output rises by approximately 1.5% when transitioning from continuous conduction to no load.
Note 3:On-time and minimum off-time specifications are measured from 50% to 50% at the DH_ and DL_ pins, with LX_ forced to
GND, BST_ forced to 5V, and a 500pF capacitor from DH_ to LX_ to simulate external MOSFET gate capacitance. Actual in-
circuit times might be different due to MOSFET switching speeds.
Note 4:Specifications to TA= -40°C and +105°C are guaranteed by design and are not production tested.
ELECTRICAL CHARACTERISTICS (continued)(Circuit of Figure 1, VIN= 10V, VCC= VDD= VSHDN= VPGDIN= VPSI= VILIM= 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1
= VCSN1= VCSP2= VCSN2= 1.0000V, FB = FBAC, RFBAC= 3.57kΩfrom FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482:
VSLOW= 5V; MAX17021: DPRSTP= GND; TA
= -40°C to +105°C, unless otherwise noted.) (Note 4)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
VALLEY CURRENT LIMIT, DROOP, AND CURRENT BALANCEVTIME - VILIM = 100mV 7 13
VTIME - VILIM = 500mV 40 60 Current-Limit Threshold
Voltage (Positive) VLIMITVCSP_ - VCSN_
ILIM = VCC 19 26
mV
CSP_, CSN_ Common-Mode
Input Range 0 2 V
Droop Amplifier
Transconductance Gm(FBAC)
IFBAC/[(VCSP_ - VCSN_)],
indicates summation over all phases from 1 to
N, N = 2, VFBAC = VCSN- = 0.45V to 2V
585 610 μS
Current-Balance Amplifier
Offset (VCSP1 - VCSN1) - (VCSP2 - VCSN2) at ICCI = 0 -1.25 +1.25 mV
CURRENT MONITOR (MAX17082/MAX17482 Only) Current-Monitor
Transconductance Gm(IMON)
IIMON/[(VCSP_ - VCSN_)],
indicates summation over all phases from 1 to
N, N = 2, VCSN_ = 0.45V to 2V
2.2 2.6 mS
IMON Clamp Voltage VIMON,max ISINK = 10mA 1.05 1.15 V
GATE DRIVERSHigh state (pullup) 2.5 DH_ Gate Driver
On-Resistance RON(DH_) BST_ - LX_ forced to 5V Low state (pulldown) 2.0
High state (pullup) 2.0 DL_ Gate Driver
On-Resistance RON(DL_) Low state (pulldown) 0.7
LOGIC AND I/O Logic Input High Voltage VIHSHDN, PGDIN:
MAX17021: DPRSLPVR 2.3 V
Logic Input Low Voltage VIL SHDN, PGDIN:
MAX17021: DPRSLPVR 1.0 V
Low-Voltage Logic Input
High Voltage VIHLV
PSI, D0–D6:
MAX17082/MAX17482: DPRSLPVR, SLOW
MAX17021: DPRSTP
0.67 V
Low-Voltage Logic Input
Low Voltage VILLV
PSI, D0–D6:
MAX17082/MAX17482: DPRSLPVR, SLOW
MAX17021: DPRSTP0.33 V
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
OUTPUT VOLTAGE vs. LOAD CURRENT
(VOUT(HFM) = 1.075V)MAX17021 toc01
LOAD CURRENT (A)
OUTPUT VOLTAGE (V)302010
EFFICIENCY vs. LOAD CURRENT
(VOUT(HFM) = 1.075V)
MAX17021 toc02
LOAD CURRENT (A)
EFFICIENCY (%)
12V
20V
OUTPUT VOLTAGE vs. LOAD CURRENT
(VOUT(LFM) = 0.875V)MAX17021 toc03
LOAD CURRENT (A)
OUTPUT VOLTAGE (V)155
PWM MODE
SKIP MODE
EFFICIENCY vs. LOAD CURRENT
(VOUT(LFM) = 0.875V)MAX17021 toc04
LOAD CURRENT (A)
EFFICIENCY (%)
12V
20V
SKIP MODE
PWM MODE
OUTPUT VOLTAGE vs. LOAD CURRENT
(VOUT(C4) = 0.4V)MAX17021 toc05
LOAD CURRENT (A)
OUTPUT VOLTAGE (V)321
EFFICIENCY vs. LOAD CURRENT
(VOUT(C4) = 0.4V)
MAX17021 toc06
LOAD CURRENT (A)
EFFICIENCY (%)
12V
20V
DPRSLPVR = VCC
SWITCHING FREQUENCY
vs. LOAD CURRENTMAX17021 toc07
LOAD CURRENT (A)
SWITCHING FREQUENCY (kHz)401020
VOUT(LFM) = 0.875V
VOUT(HFM) = 1.075V
DPRSLPVR = VCC
DPRSLPVR = GND
NO-LOAD SUPPLY CURRENT vs. INPUT VOLTAGE
(VOUT(HFM) = 1.075V)MAX17021 toc08
INPUT VOLTAGE (V)
NO-LOAD SUPPLY CURRENT (mA)2118912
IIN
ICC + IDD
DPRSLPVR = GND
NO-LOAD SUPPLY CURRENT vs. INPUT VOLTAGE
AT SKIP MODE (VOUT(HFM) = 1.075V)MAX17021 toc09
INPUT VOLTAGE AT SKIP MODE (V)
NO-LOAD SUPPLY CURRENT (mA)2118912
IIN
ICC + IDD
DPRSLPVR = VCC
Typical Operating Characteristics(Circuit of Figure 1. VIN= 12V, VCC= VDD= 5V, SHDN= VCC, D0–D6 set for 1.075V, TA= +25°C, unless otherwise specified.)
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
0.8125V OUTPUT-VOLTAGE DISTRIBUTIONMAX17021 toc10
OUTPUT VOLTAGE (V)
SAMPLE PERCENTAGE (%)
+85°C
+25°C
SAMPLE SIZE = 100
Gm(FB) TRANSCONDUCTANCE DISTRIBUTIONMAX17021 toc11
TRANSCONDUCTANCE (µs)
SAMPLE PERCENTAGE (%)
+85°C
+25°C
SAMPLE SIZE = 100
CURRENT BALANCE vs. LOAD CURRENTMAX17021 toc12
LOAD CURRENT (A)
CSP_ -
CSN_
(mV)
CSPN1
- V
CSPN2
(mV)453515202530
VOUT = 1.075V
MAX17021 toc13
200µs/div
A. SHDN, 10V/div
B. CLKEN, 10V/div
C. VOUT, 500mV/div
D. ILX1, 10A/div
E. ILX2, 10A/div
IOUT = 15A
1.075V
SOFT-START WAVEFORM (UP TO CLKEN)MAX17021 toc14
1ms/div
A. SHDN, 10V/div
B. PWRGD, 10V/div
C. PHASEGD, 10V/div
D. CLKEN, 10V/div
E. VOUT, 1V/div
F. ILX1, 10A/div
G. ILX2, 10A/div
IOUT = 15A
1.075V
SOFT-START WAVEFORM (UP TO PWRGD)MAX17021 toc15
100µs/div
A. SHDN, 10V/div
B. CLKEN, 10V/div
C. PWRGD, 10V/div
D. DL_, 10V/div
E. VOUT, 500mV/div
F. ILX1, 10A/div
G. ILX2, 10A/div
1.075V
SHUTDOWN WAVEFORM
Typical Operating Characteristics (continued)(Circuit of Figure 1. VIN= 12V, VCC= VDD= 5V, SHDN= VCC, D0–D6 set for 1.075V, TA= +25°C, unless otherwise specified.)
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power SuppliesMAX17021 toc16
20μs/div
A. IOUT = 10A TO 50A
B. VOUT, 50mV/div
C. ILX1, 10A/div
D. ILX2, 10A/div
50A
1.075V
10A
25A
LOAD TRANSIENT RESPONSE (HFM MODE)MAX17021 toc17
20µs/div
A. IOUT = 5A TO 20A
B. VOUT, 50mV/div
C. INDUCTOR CURRENT,
10A/div
20A
0.875V
20A
LOAD-TRANSIENT RESPONSE (LFM MODE)MAX17021 toc18
20µs/div
A. VID3, 5V/div
B. VOUT, 50mV/div
C. ILX1, 10A/div
D. ILX2, 10A/div
1.075V
0.975V
VID CODE CHANGE (SLOW = GND)MAX17021 toc19
20µs/div
A. VID3, 5V/div
B. VOUT, 50mV/div
C. ILX1, 10A/div
D. ILX2, 10A/div
1.075V
0.975V
VID CODE CHANGE (SLOW = VDD)MAX17021 toc20
20µs/div
A. D0, 5V/div
B. VOUT, 20mV/div
IOUT = 10A
C. ILX1, 10A/div
D. ILX2, 10A/div
1.075V
1.0625V
DYNAMIC VID CODE CHANGE
(D0 = 12.5mV)MAX17021 toc21
100μs/div
A. VOUT, 500mV/div
C. DL_, 10V/div
1.075V
30A
OUTPUT UNDERVOLTAGE FAULTVIMON vs. LOAD CURRENTMAX17021 toc22
VCSPN1 + VCSPN2 (mV)
IMON40501020
VOUT = 1.075V
DPRSLPVR = VCC
DPRSLPVR = GND
Typical Operating Characteristics (continued)(Circuit of Figure 1. VIN= 12V, VCC= VDD= 5V, SHDN= VCC, D0–D6 set for 1.075V, TA= +25°C, unless otherwise specified.)
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
Pin Description
PINNAMEFUNCTION PGDIN
System Power-Good Logic Input. PGDIN indicates the power status of other system rails and is used for
power-supply sequencing. After power-up to the boot voltage, the output voltage remains at VBOOT,CLKEN
remains high, and PWRGD remains low as long as the PGDIN stays low. When PGDIN is pulled high, the
output transitions to selected VID voltage, and CLKEN is pulled low. If the system pulls PGDIN low during
normal operation, the MAX17021/MAX17082/MAX17482 immediately drive CLKEN high, pull PWRGD low,
and slew the output to the boot voltage (using two-phase pulse-skipping mode). The controller remains at
the boot voltage until PGDIN goes high again, SHDN is toggled, or the VCC input power supply is cycled. THRM
Input of Internal Comparator. Connect the output of a resistor- and thermistor-divider (between VCC and
GND) to THRM. Select the components such that the voltage at THRM falls below 1.5V (30% of VCC) at
the desired high temperature.
IMON
(MAX17082/
MAX17482
only)
Current-Monitor Output. The MAX17082/MAX17482 IMON output source a current that is directly
proportional to the current-sense voltage as defined by:
IIMON = Gm(IMON) x (VCSP_ - VCSN_)
where Gm(IMON) = 2.4mS (typ).
The IMON current is unidirectional (sources current out of IMON only) for positive current-sense values.
For negative current-sense voltages, the IMON current is zero.
Connect an external resistor between IMON and VSS_SENSE to create the desired IMON gain based on
the following equation:
RIMON = 0.999V/(IMAX x RSENSE x Gm(IMON))
where IMAX is defined in the Current Monitor section of the Intel IMVP-6.5 specification and based on
discrete increments (20A, 30A, 40A, etc.), RSENSE is the typical effective value of the current-sense
element (sense resistor or inductor DCR) that is used to provide the current-sense voltage, and
Gm(IMON) is the typical transconductance amplifier gain as defined in the Electrical Characteristics
table.
The IMON voltage is internally clamped to a maximum of 1.1V (typ).
The transconductance amplifier and voltage clamp are internally compensated, so IMON cannot directly
drive large capacitance values. To filter the IMON signal, use an RC filter as shown in Figure 2.
IMON is pulled to ground when MAX17082/MAX17482 are in shutdown.
Typical Operating Characteristics (continued)(Circuit of Figure 1. VIN= 12V, VCC= VDD= 5V, SHDN= VCC, D0–D6 set for 1.075V, TA= +25°C, unless otherwise specified.)
MAX17021 toc23
100μs/div
A. VOUT, 500mV/div
B. DL_, 5V/div
C. PWRGD, 5V/div
0.875V
OUTPUT OVERVOLTAGE WAVEFORMMAX17021 toc24
40μs/div
A. 5V BIAS SUPPLY, 5V/div
B. VOUT, 500mV/div
C. PWRGD, 5V/div
D. DL_, 5V/div
E. ILX1, 10A/div
IOUT = 10A
0.875V
10A
BIAS SUPPLY REMOVAL
(UVLO RESPONSE)
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
Pin Description (continued)
PINNAMEFUNCTION ILIM
Valley Current-Limit Adjustment Input. The valley current-limit threshold voltage at CSP_ to CSN_
equals precisely 1/10 of the differential TIME to ILIM voltage over a 0.1V to 0.5V range (10mV to 50mV
current-sense range). The negative current-limit threshold is nominally -125% of the corresponding
valley current-limit threshold. Connect ILIM directly to VCC to set the default current-limit threshold
setting of 22.5mV (typ) nominal. TIME
Slew-Rate Adjustment Pin. TIME regulates to 2.0V and the load current determines the slew rate of the
internal error-amplifier target. The sum of the resistance between TIME and GND (RTIME) determines the
nominal slew-rate:
SLEW RATE = (12.5mV/μs) x (71.5k/RTIME)
The guaranteed RTIME range is between 35.7k and 178k. This “nominal” slew rate applies to VID
transitions and to the transition from boot mode to VID. If the VID DAC inputs are clocked, the slew rate for
all other VID transitions is set by the rate at which they are clocked, up to a maximum slew rate equal to
the nominal slew rate defined above.
The startup and shutdown slew rates are always 1/8 of nominal slew rate in order to minimize surge
currents.
MAX17021: If both DPRSLPVR and DPRSTP are pulled high, then the slew rate is reduced to 1/4 of nominal.
MAX17082/MAX17482: If SLOW is low, then the slew rate is reduced to 1/2 of nominal. VCCController Analog Bias Supply Voltage. Connect to a 4.5V to 5.5V source. Bypass to GND with 1μF minimum. CCICurrent-Balance Compensation. Connect a 470pF capacitor between CCI and the positive side of the
feedback remote sense. CCI is internally forced low in shutdown. FB
Remote Feedback-Sense Input. Normally shorted to FBAC and connected to the VCC_SENSE pin of the
CPU socket through the load-line gain resistor (see the FBAC pin description). FB internally connects
to the error amplifier and integrator. FBAC
Voltage-Positioning Transconductance Amplifier Output. Connect a resistor RFB between FBAC and the
positive side of the feedback remote sense to set the DC steady-state droop based on the voltage-
positioning gain requirement:
RFB = RDROOP/(RSENSE x Gm(FBAC))
where RDROOP is the desired voltage-positioning slope and Gm(FBAC) = 600μS (typ). RSENSE is the
value of the current-sense resistors that are used to provide the (CSP_, CSN_) current-sense voltages. If
lossless sensing is used, RSENSE = RL. In this case, consider making RFB a resistor network that
includes an NTC thermistor to minimize the temperature dependence of the voltage-positioning slope.
FBAC is high impedance in shutdown. GNDS
Remote Ground-Sense Input. Normally connected to the VSS_SENSE pin of the CPU socket. GNDS
internally connects to a transconductance amplifier that fine tunes the output voltage—compensating
for voltage drops from the regulator ground to the load ground. CSN2
Negative Current-Sense Input for Phase 2. Connect CSN2 to the negative terminal of the inductor
current-sensing resistor or directly to the negative terminal of the inductor if the lossless DCR sensing
method is used (see Figure4). CSP2
Positive Current-Sense Input for Phase 2. Connect CSP2 to the positive terminal of the inductor current-
sensing resistor or directly to the positive terminal of the filtering capacitor used when the lossless
DCR sensing method is used (see Figure 4). Short CSP2 to VCC for dedicated one-phase operation.
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
Pin Description (continued)
PINNAMEFUNCTION SHDN
Shutdown Control Input. This input cannot withstand the battery voltage. Connect to VCC for normal
operation. Connect to ground to put the IC into its 1μA max shutdown state. During startup, the output
voltage is ramped up to the boot voltage slowly at a slew rate that is 1/8 the slew rate set by the TIME
resistor. During the transition from normal operation to shutdown, the output voltage is ramped down at
the same slow slew rate. Forcing SHDN to 11V~13V disables both overvoltage-protection and
undervoltage-protection circuits, clears the fault latch, disables transient phase overlap, and disables
the BST_ charging switches. Do not connect SHDN to > 13V.
14 DPRSLPVR
Pulse-Skipping Control Input. This 1.0V logic input signal indicates power usage and sets the operating
mode of MAX17021/MAX17082/MAX17482. When DPRSLPVR is forced high, the controller immediately
enters the automatic pulse-skipping mode. The controller returns to forced-PWM mode when DPRSLPVR is
forced low and the output is in regulation. The PWRGD upper threshold is blanked during any downward
output-voltage transition that occurs when the controller is in pulse-skipping mode, and stays blanked until
the transition-related PWRGD blanking period is complete and the output reaches regulation. The output
overvoltage fault threshold is changed from a tracking [VID + 300mV] threshold to a fixed-default
transitional OVP threshold during the period for which the PWRGD upper threshold is blanked.
The MAX17082 is in two-phase pulse-skipping mode during startup and while in boot mode, but is in
forced-PWM mode during the transition from boot mode to VID mode plus 20μs, and during soft-
shutdown, irrespective of the DRPSLPVR logic level.
DPRSLPVR and PSI together determine the operating mode and the number of active phases as shown
in the following truth table:
DPRSLPVR PSI MODE AND PHASES 1 0 Very low current (one-phase pulse skipping) 1 1 Low current (approx 3A) (one-phase pulse skipping) 0 0 Intermediate power potential (one-phase PWM) 0 1 Max power potential ( two- or one-phase PWM as configured at CSP2) PSIPower-State Indicator Input. DPRSLPVR and PSI together determine the operating mode and the number
of active phases as shown in the truth table included under the PSI pin description above. TON
Switching Frequency Setting Input. An external resistor between the input power source and TON sets
the switching period (TSW = 1/fSW) per phase according to the following equation:
TSW = 16.3pF x (RTON + 6.5k)
TON becomes high impedance in shutdown to reduce the input quiescent current. If the TON current is
less than 10μA, the MAX17021/MAX17082/MAX17482 disable the controller, set the TON open fault
latch, and pull DL_ and DH_ low. V3P3 3.3V CLKEN Input Supply. V3P3 input supplies the CLKEN CMOS push-pull logic output. Connect to
the system’s standard 3.3V supply voltage before SHDN is pulled high for proper IMVP-6.5 operation.CLKEN
Clock Enable Push-Pull Logic Output. This inverted logic output indicates when the output voltage
sensed at FB is in regulation. During soft-start, shutdown, and when the FB is out of regulation, the
MAX17021/MAX17082/MAX17482 pull CLKEN up to V3P3. During VID transitions, the controller forces
CLKEN low. Except during the power-up sequence, CLKEN is the inverse of PWRGD. See the Startup
Timing Diagram (Figure 10). When in pulse-skipping mode (DPRSLPVR high), the upper CLKEN threshold
is disabled. PWRGD
Open-Drain Power-Good Output. After output-voltage transitions, except during power-up and power-
down; if FB is in regulation then PWRGD is high impedance.
During startup, PWRGD is held low and continues to be low while the part is in boot mode and until
5ms (typ) after CLKEN goes low.
PWRGD is forced low in shutdown.
PWRGD is forced high impedance whenever the slew-rate controller is active (output-voltage transitions).
When in pulse-skipping mode (DPRSLPVR high), the upper PWRGD threshold comparator is blanked
during downward transitions.
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
Pin Description (continued)
PINNAMEFUNCTION PHASEGD
Phase-Good Current-Balance Open-Drain Output. Used to signal the system that one of the two
phases either has a fault condition or is not matched with the other. Detection is done by identifying
the need for a large on-time difference between phases in order to achieve or move towards current
balance. PHASEGD is low in shutdown.
PHASEGD is forced high impedance whenever the slew-rate controller is active (output-voltage
transitions).
PHASEGD is forced high impedance while in one-phase operation (DPRSLPVR = high or PSI = low). BST2
Boost Flying-Capacitor Connection for Phase 2. BST2 provides the upper supply rail for the DH2 high-
side gate driver. An internal switch between VDD and BST2 charges the flying capacitor while the low-
side MOSFET is on (DL2 pulled high and LX2 pulled to ground). LX2 Inductor Connection for Phase 2. LX2 is the internal lower supply rail for the DH2 high-side gate driver.
Also used as an input to the controller’s zero-crossing comparator for phase 2. DH2 High-Side Gate-Driver Output for Phase 2. DH2 swings from LX2 to BST2. The controller pulls DH2 low
in shutdown. DL2
Low-Side Gate-Driver Output for Phase 2. DL2 swings from GND to VDD. DL2 is forced low in skip mode
after detecting an inductor current zero crossing. DL2 is forced low during one-phase operation (PSI =
GND or CSP2 = VCC). VRHOTOpen-Drain Output of Internal Comparator. VRHOT is pulled low when the voltage at THRM goes below
1.5V (30% of VCC). VRHOT is high impedance in shutdown. VDD
Driver Supply Voltage Input. VDD is the supply voltage used to internally power the low-side gate
drivers and refresh the BST_ flying capacitors during the off-times. Connect VDD to the 4.5V to 5.5V
system supply voltage. Bypass VDD to the system power ground with a 1μF each or greater ceramic
capacitor. DL1
Low-Side Gate-Driver Output for Phase 1. DL1 swings from GND to VDD. DL1 is forced high when an output
overvoltage fault is detected, overriding any negative current-limit condition that might be present. DL1 is
forced low after soft-shutdown or in skip mode after detecting an inductor current zero crossing. DH1 High-Side Gate-Driver Output for Phase 1. DH1 swings from LX1 to BST1. The controller pulls DH1 low
in shutdown. LX1 Inductor Connection for Phase 1. LX1 is the internal lower supply rail for the DH1 high-side gate driver.
Also used as an input to the controller’s zero-crossing comparator for phase 1. BST1
Boost Flying-Capacitor Connection for Phase 1. BST1 provides the upper supply rail for the DH1 high-
side gate driver. An internal switch between VDD and BST1 charges the flying capacitor while the low-
side MOSFET is on (DL1 is pulled high and LX1 is pulled to ground).
DPRSTP
(MAX17021)
IMVP-6+ Slew-Rate Select Input. This 1.0V logic input signal from the IMVP-6+ system is usually the
logical complement of the DPRSLPVR signal. However, the IMVP-6+ specification supports a special
slow C4 exit condition that allows both DPRSTP and DPRSLPVR to be pulled high simultaneously.
When this occurs, the voltage-transition slew rate reduces to 1/4 the nominal (RTIME-based) slew rate
for the duration of this logic condition. The slew rate returns to normal when either DPRSLPVR or
DPRSTP is pulled low:
DPRSLPVR DPRSTP
SLEW RATE 0 0 Nominal slew rate 0 1 Nominal slew rate 1 0 Nominal slew rate 1 1 Slew rate reduced to 1/4 of nominal
SLOW
(MAX17082/
MAX17482)
IMVP-6.5 Slew-Rate Select Input. This 1.0V logic input signal selects between the nominal and “slow”
(half of nominal rate) slew rates. When SLOW is forced high, the selected nominal slew rate is set by
the TIME resistance as defined above. When SLOW is forced low, the slew rate is reduced to half the
nominal slew rate.
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
Pin Description (continued)
PINNAMEFUNCTION 32–38 D0–D6
Low-Voltage VID DAC Code Input. The D0–D6 inputs do not have internal pullups. These 1.0V logic
inputs are designed to interface directly with the CPU. The output voltage is set by the VID code
indicated by the logic-level voltages on D0–D6 (see Table 4). CSP1
Positive Current-Sense Input for Phase 1. Connect CSP1 to the positive terminal of the inductor current-
sensing resistor or directly to the positive terminal of the filtering capacitor used when the lossless
DCR sensing method is used (see Figure 4). CSN1
Negative Current-Sense Input for Phase 1. Connect CSN1 to the negative terminal of the inductor
current-sensing resistor or directly to the negative terminal of the inductor if the lossless DCR sensing
method is used (see Figure 4).
Under VCC UVLO conditions and after soft-shutdown is completed, CSN1 is internally pulled to GND
through a 10 FET to discharge the output.
— EP
Exposed Pad.Internally connected to GND. Connect to the ground plane through a thermally
enhanced via. For the MAX17021/MAX17082/MAX17482, the exposed pad is the only GND
connection and must be properly soldered.
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power SuppliesMAX17021
1.0μFC2
1.0μF
5V BIAS
INPUT
AGND
0.22μF
0.22μF
0.22μF
R19
10Ω
R11
1.50kΩ
12.1kΩ
59.0kΩ
NTC1
10kΩ
B = 3380
R12
20kΩVCC
RTON
200kΩ16TON30BST1
CIN
NHI
SHDN13
DPRSTP31
DPRSLPVR14
PSI15
PGDIN1
VALLEY CURRENT LIMIT SET TO ILIM
VLIMIT = 0.2V x R1/(R1 + R2)
SLEW RATE SET BY TIME BIAS CURRENT
dV/dt = 12.5mV/μs x 71.5kΩ/(R1 + R2)
SWITCHING FREQUENCY (fSW = 1/TSW):
TSW = 16.3pF x (RTON + 6.5kΩ)32333435363738VDD
PWR
PWR
PWR
INPUT
7V TO 24V
CORE
OUTPUT
ON OFF (VRON)
V3P317
PHASEGD20
3.3V
1.1V
VCC
VID INPUTS28DH1LX1
0.22μF
R1321BST2
NLO
NHIDL1
DCR THERMAL
COMPENSATIONLX2
R10
1.21kΩ
PWR
PWR
NLODL2DH2
R15
1.50kΩ
R16
20kΩ
NTC2
10kΩ
B = 3380
R14
1.21kΩ
R22
25Ω
R23
25ΩCSN1
0.22μF
C10
1000pFCSP1
AGND
AGND
AGNDPWR
AGND
OPEN7CCICSP2
C11
0.22μFCSN2
AGND
C12
OPEN
COUT
PWR
COUT
PWR
ILIM4
TIME5
13kΩ
THRM2
10kΩ
1.9kΩR3
56Ω
PWRGD19
VRHOT25
CLKEN18
RFB
4.32kΩ
LOAD-LINE ADJUSTMENT:
RFB = RDROOP/(RSENSE x 600μs)
R20
10Ω
R21
10Ω
N.C.3
NTC3
100kΩ
B = 4250
GND (EP)8
FBAC9
GNDS10
AGND
C13
1000pF
REMOTE-SENSE FILTERS
AGND
C14
1000pF
VCC_SENSE
VSS_SENSE
REMOTE-SENSE
INPUTS
CATCH RESISTORS
REQUIRED WHEN CPU NOT
POPULATED
Figure 1. Standard 2-Phase IMVP-6+ Application Circuit
DESIGN
PARAMETERSIMVP-6+ SVIMVP-6+ LV
IMVP-6.5
AUBURNDALE SV
CORE
IMVP-6.5
AUBURNDALE LV
CORE
CIRCUITFIGURE 1FIGURE 1FIGURE 2FIGURE 2Input-Voltage Range 7V to 20V 7V to 20V 7V to 20V 7V to 20V
Maximum Load Current
(TDC Current)
44A
(34A)
23A
(19A)
50A
(37A)
28A
(19A)
Transient Load Current 35A
(10A/μs)
18A
(10A/μs)
35A
(10A/μs)
23A
(10A/μs)
Load Line -2.1mV/A -4mV/A -1.9mV/A -3mV/A
COMPONENTS TON Resistance (RTON) 200k (fSW = 300kHz) 200k (fSW = 300kHz) 200k (fSW = 300kHz) 200k (fSW = 300kHz)
Inductance (L)
NEC/TOKIN
MPC1055LR36 0.36μH,
32A, 0.8m
NEC/TOKIN
MPC1055LR36 0.36μH,
32A, 0.8m
NEC/TOKIN
MPC1055LR36 0.36μH,
32A, 0.8m
NEC/TOKIN
MPC1055LR36 0.36μH,
32A, 0.8m
High-Side MOSFET (NH)Siliconix 1x Si4386DY
7.8m/9.5m (typ/max)
Siliconix 1x Si4386DY
7.8m/9.5m (typ/max)
Siliconix 1x Si4386DY
7.8m/9.5m (typ/max)
Siliconix 1x Si4386DY
7.8m/9.5m (typ/max)
Low-Side MOSFET (NL)Siliconix 2x Si4642DY
3.9m/4.7m (typ/max)
Siliconix 2x Si4642DY
3.9m/4.7m (typ/max)
Siliconix 2x Si4642DY
3.9m/4.7m (typ/max)
Siliconix 2x Si4642DY
3.9m/4.7m (typ/max)
Output Capacitors
(COUT)
4x 330μF, 6m, 2.5V
Panasonic
EEFSX0D0D331XR
28x 10μF, 6V ceramic
(0805)
3x 330μF, 6m, 2.5V
Panasonic
EEFSX0D0D331XR
28x 10μF, 6V ceramic
(0805)
4x 330μF, 6m, 2.5V
Panasonic
EEFSX0D0D331XR
28x 10μF, 6V ceramic
(0805)
3x 330μF, 6m, 2.5V
Panasonic
EEFSX0D0D331XR
28x 10μF, 6V ceramic
(0805)
Input Capacitors (CIN)4x 10μF, 25V ceramic
(1210)
4x 10μF, 25V ceramic
(1210)
4x 10μF, 25V ceramic
(1210)
4x 10μF, 25V ceramic
(1210)
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
Table 1. Component Selection for Standard Applications
Detailed DescriptionTable 1 lists the component selection for standard
applications. Table 2 lists component suppliers for the
MAX17021/MAX17082/MAX17482/MAX17482.
Free-Running, Constant-On-Time PWM
Controller with Input Feed-ForwardThe Quick-PWM control architecture is a pseudo-fixed-
frequency, constant-on-time, current-mode regulator
with voltage feed-forward (Figure 3). This architecture
relies on the output filter capacitor’s ESR to act as the
current-sense resistor, so the output ripple voltage pro-
vides the PWM ramp signal. The control algorithm is
simple: the high-side switch on-time is determined sole-
ly by a one-shot whose period is inversely proportional
to input voltage, and directly proportional to output volt-
age or the difference between the main and secondary
inductor currents (see the On-Time One-Shotsection).
Another one-shot sets a minimum off-time. The on-time
one-shot triggers when the error comparator goes low,
the inductor current of the selected phase is below the
valley current-limit threshold, and the minimum off-time
one-shot times out. The controller maintains 180°out-of-
phase operation by alternately triggering the main and
secondary phases after the error comparator drops
below the output-voltage set point.
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
DESIGN
PARAMETERSIMVP-6+ SVIMVP-6+ LV
IMVP-6.5
AUBURNDALE SV
CORE
IMVP-6.5
AUBURNDALE LV
CORE TIME-ILIM Resistance
(R1) 10k 10k 10k 10k
ILIM-GND Resistance
(R2) 59k 59k 59k 59k
FB Resistance (RFB) 4.32k 8.45k 4.02k 6.34k
IMON Resistance N/A N/A 9.09k 18.2k
LX_-CSP_ Resistance 1.21k 1.21k 1.21k 1.21k
CSP_-CSN_ Series
Resistance (R6) 1.50k 1.50k 1.50k 1.50k
Parallel NTC
Resistance 20k 20k 20k 20k
DCR Sense NTC (NTC1) 10k NTC B = 3380
TDK NTCG163JH103F
10k NTC B = 3380
TDK NTCG163JH103F
10k NTC B = 3380
TDK NTCG163JH103F
10k NTC B = 3380
TDK NTCG163JH103F
DCR Sense
Capacitance (CSENSE)
2x 0.22μF, 6V ceramic
(0805)
2x 0.22μF, 6V ceramic
(0805)
2x 0.22μF, 6V ceramic
(0805)
2x 0.22μF, 6V ceramic
(0805)
Table 1. Component Selection for Standard Applications (continued)
SUPPLIERWEBSITEAVX Corp.www.avxcorp.com
BI Technologieswww.bitechnologies.com
Central
Semiconductor Corp.www.centralsemi.com
Fairchild
Semiconductorwww.fairchildsemi.com
International Rectifierwww.irf.com
KEMET Corpwww.kemet.com
NEC/TOKIN Corp.www.nec-tokin.com
Panasonic Corp.www.panasonic.com
Table 2. Component Suppliers
SUPPLIERWEBSITEPulse Engineeringwww.pulseeng.com
Renesas Technology
Corp.www.renesas.com
SANYO Electric Co,
Ltd.www.sanyodevice.com
Siliconix (Vishay)www.vishay.com
Sumidawww.sumida.com
Taiyo Yudenwww.t-yuden.com
TDK Corp.www.component.tdk.com
TOKO America, Inc.www.tokoam.com
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power SuppliesMAX17082
MAX17482
1.0μFC2
1.0μF
5V BIAS
INPUT
AGNDAGND
0.22μF
0.22μF
0.22μF
R11
1.50kΩ
12.1kΩ
59.0kΩ
NTC1
10kΩ
B = 3380
R12
20kΩVCC
RTON
200kΩ16TON30BST1
CIN
NHI
SHDN13
DPRSLPVR14
SLOW31
PSI15
PGDIN1
VALLEY CURRENT LIMIT SET TO ILIM
VLIMIT = 0.2V x R1/(R1 + R2)
SLEW RATE SET BY TIME BIAS CURRENT
dV/dt = 12.5mV/μs x 71.5kΩ/(R1 + R2)
SWITCHING FREQUENCY (fSW = 1/TSW):
TSW = 16.3pF x (RTON + 6.5kΩ)32333435363738VDD
PWR
PWR
PWR
INPUT
7V TO 24V
CORE
OUTPUT
ON OFF (VRON)
V3P317
PHASEGD20
3.3V
1.1V
VCC
VSS_SENSE
VID INPUTS28DH1LX1
0.22μF
C15
0.022μF
R1321BST2
NLO
NHIDL1
DCR THERMAL
COMPENSATIONLX2
R10
1.21kΩ
PWR
PWR
NLODL2DH2
R15
1.50kΩ
R16
20kΩ
NTC2
10kΩ
B = 3380
R14
1.21kΩ
R22
25Ω
R23
25ΩCSN1
0.22μF
C10
1000pFCSP1
AGND
AGND
AGND
OPEN7CCICSP2
C11
0.22μFCSN2
AGND
C12
OPEN
COUT
PWR
COUT
PWR
ILIM4
TIME5
13kΩ
THRM2
10kΩ
1.9kΩR3
56Ω
PWRGD19
VRHOT25
CLKEN18
4.7kΩRFB
4.02kΩ
LOAD-LINE ADJUSTMENT:
RFB = RDROOP/(RSENSE x 600μs)
R20
10Ω
R21
10Ω
9.09kΩ
IMON3
NTC3
100kΩ
B = 4250
GND (EP)
AGNDPWR8
FBAC9
GNDS10
AGND
C13
1000pF
REMOTE-SENSE FILTERS
AGND
C14
1000pF
VCC_SENSE
VSS_SENSE
REMOTE-SENSE
INPUTS
CATCH RESISTORS
REQUIRED WHEN CPU NOT
POPULATED
R19
10Ω
Figure 2. Standard 2-Phase IMVP-6.5 (Calpella) Application Circuit
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power SuppliesTRIGQ
ONE-SHOT
GND
DL1
BST1
DH1
LX1
TON
CSP1
CSN1
MINIMUM
OFF-TIMEILIM
GND
PWRGD
5ms
STARTUP
DELAY
TARGET
- 300mV
TARGET
+ 200mV
REF
(2.0V)
10x
10x
SHDN
TRIGQ
ONE-SHOT
PHASE 1
ON-TIME
CSP2
CSN2TRIG
EN2
ONE-SHOT
PHASE 2
ON-TIME
MODE/PHASE/
SLEW-RATE
CONTROL
DPRSTP(SLOW)PGDINDD
CSP2
CSN2
CSN1
CSP1
CCI
BLANK
BST2
DH2
LX2
DL2
GND
LX1
1mV
SKIP
MAIN PHASE
DRIVERS
PSIDPRSLPVR
EN2SLEWSKIP
Gm(CCI)
200kΩ
CSP_
CSN_Gm(FB)
D0–D6CSP_
CSN_Gm(IMON)
VRHOT
THRM
0.3 x VCC
GNDS
PHASEGD
CURRENT-
BALANCE
FAULT
GND
60μs
STARTUP
DELAYm(CCI)
DACR-TO-I
CONVERTERPGDIN
FAULT
ARGET
SLEW
5ms
STARTUP
DELAY
BLANK
SECONDARY
PHASE DRIVERS
MAX17021
(MAX17082/MAX17482)
IMONFBAC
CLKEN
(MAX17082/
MAX17482)
V3P3
TIME
VCC
Figure 3. Functional Diagram
MAX17021/MAX17082/MAX17482
Dual-Phase, Quick-PWM Controllers for
IMVP-6+/IMVP-6.5 CPU Core Power Supplies
Dual 180°Out-of-Phase OperationThe two phases in the MAX17021/MAX17082/
MAX17482 operate 180°out-of-phase to minimize input
and output filtering requirements, reduce electromagnetic
interference (EMI), and improve efficiency. This effectively
lowers component count—reducing cost, board space,
and component power requirements—making the
MAX17021/MAX17082/MAX17482 ideal for high-power,
cost-sensitive applications.
Typically, switching regulators provide power using
only one phase instead of dividing the power among
several phases. In these applications, the input capaci-
tors must support high instantaneous current require-
ments. The high RMS ripple current can lower
efficiency due to I2R power loss associated with the
input capacitor’s effective series resistance (ESR).
Therefore, the system typically requires several low-
ESR input capacitors in parallel to minimize input-volt-
age ripple, to reduce ESR-related power losses, and to
meet the necessary RMS ripple current rating.
With the MAX17021/MAX17082/MAX17482, the con-
troller shares the current between two phases that
operate 180°out-of-phase, so the high-side MOSFETs
never turn on simultaneously during normal operation.
The instantaneous input current of either phase is effec-
tively halved, resulting in reduced input-voltage ripple,
ESR power loss, and RMS ripple current (see the Input
Capacitor Selectionsection). Therefore, the same per-
formance can be achieved with fewer or less-expensive
input capacitors.
+5V Bias Supply (VCCand VDD)The Quick-PWM controller requires an external +5V
bias supply in addition to the battery. Typically, this
+5V bias supply is the notebook’s 95% efficient +5V
system supply. Keeping the bias supply external to the
IC improves efficiency and eliminates the cost associat-
ed with the +5V linear regulator that would otherwise be
needed to supply the PWM circuit and gate drivers. If
stand-alone capability is needed, the +5V bias supply
can be generated with an external linear regulator.
The +5V bias supply must provide VCC(PWM con-
troller) and VDD(gate-drive power), so the maximum
current drawn is:
IBIAS= ICC+ fSW(QG(LOW)+ QG(HIGH))
where ICCis provided in the Electrical Characteristics
table, fSWis the switching frequency, and QG(LOW)and
QG(HIGH)are the MOSFET data sheet’s total gate-
charge specification limits at VGS= 5V.
VINand VDDcan be tied together if the input power
source is a fixed +4.5V to +5.5V supply. If the +5V bias
enable signal (SHDNgoing from low to high) must be
delayed until the battery voltage is present to ensure
startup.
Switching Frequency (TON)Connect a resistor (RTON) between TON and VINto set
the switching period TSW= 1/fSW, per phase:
TSW= 16.3pF x (RTON+ 6.5kΩ)
A 96.75kΩto 303.25kΩcorresponds to switching peri-
ods of 167ns (600kHz) to 500ns (200kHz), respectively.
High-frequency (600kHz) operation optimizes the appli-
cation for the smallest component size, trading off effi-
ciency due to higher switching losses. This might be
acceptable in ultra-portable devices where the load
currents are lower and the controller is powered from a
lower voltage supply. Low-frequency (200kHz) opera-
tion offers the best overall efficiency at the expense of
component size and board space.
TON Open-Circuit ProtectionThe TON input includes open-circuit protection to avoid
long, uncontrolled on-times that could result in an over-
voltage condition on the output. The MAX17021/
MAX17082/MAX17482detect an open-circuit fault if the
TON current drops below 10μA for any reason—the
TON resistor (RTON) is unpopulated, a high resistance
value is used, the input voltage is low, etc. Under these
conditions, the MAX17021/MAX17082/MAX17482 stop
switching (DH_ and DL_ pulled low) and immediately
set the fault latch. Toggle SHDNor cycle the VCC
power supply below 0.5V to clear the fault latch and
reactivate the controller.
On-Time One-ShotThe core of each phase contains a fast, low-jitter,
adjustable one-shot that sets the high-side MOSFETs
on-time. The one-shot for the main phase varies the on-
time in response to the input and feedback voltages.
The main high-side switch on-time is inversely propor-
tional to the input voltage as measured by the TON
input, and proportional to the feedback voltage (VFB):
where the switching period (TSW= 1/fSW) is set by the
resistor at the TON pin, and 0.075V is an approximation
to accommodate the expected drop across the low-
side MOSFET switch.
The one-shot for the secondary phase varies the on-
time in response to the input voltage and the difference
between the main and secondary inductor currents.
Two identical transconductance amplifiers integrate theTVVONMAINFB()=+()0075
