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MAX1664CUPMAXIMN/a1avaiActive-Matrix Liquid Crystal Display AMLCD Supply


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MAX1664CUP
Active-Matrix Liquid Crystal Display AMLCD Supply
________________General Description
The MAX1664 integrates power-supply and backplane
drive circuitry for active-matrix thin-film-transistor (TFT) liq-
uid crystal displays. Included are a single-output, pulse-
width-modulation boost converter (0.25Ωswitch), a
dual-output (positive and negative) gate-driver supply
using one inductor, an LCD backplane driver, and a sim-
ple phase-locked loop to synchronize all three outputs.
High switching frequency (1MHz nominal) and phase-
locked operation allow the use of small, minimum-
height external components while maintaining low
output noise. A +2.8V to +5.5V input voltage range
allows operation with any logic supply. Output voltages
are adjustable to +5.5V (DC-DC 1) and to +28V and
-10V (DC-DC 2). The negative output voltage can be
adjusted to -20V with additional components. Also
included are a logic-level shutdown and a “Ready” out-
put (RDY) that signals when all three outputs are in reg-
ulation.
The boost-converter operating frequency can be set at
16,24,or 32 times the backplaneclock. This flexibility
allows a high DC-DC converter frequency to be used
with LCD backplane clock rates ranging from 20kHz to
72kHz. The MAX1664 is supplied in a 1.1mm-high
TSSOP package.
________________________Applications

LCD Modules
LCD Panels
____________________________Features
Integrates All Active Circuitry for Three DC-DC
Converters
Ultra-Small External Components
(ceramic capacitors, 2µH to 5µH inductors)
DC-DC Converters Phase-Locked to Backplane
Frequency for Lowest Noise
Low Operating Voltage (down to +2.8V)Adjustable Output Voltage from VINto +5.5VLoad Currents Up to 500mAAdjustable TFT Gate Driver Output:
Positive, VINto +28V
Negative, 0 to -10V (-20V with added
components)
Includes 0.35ΩBackplane Driver1µA Shutdown CurrentPower-Ready Output Signal
MAX1664
Typical Operating Circuit
___________________Pin Configuration

19-1356; Rev 0; 4/98
Active-Matrix Liquid Crystal Display
(AMLCD)Supply
MAX1664
Active-Matrix Liquid Crystal Display
(AMLCD)Supply
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VIN= VINP= 3.3V, SHDN= IN, VBPVDD= 4V, VBPVSS= -1V, PGND1 = PGND2 = FPLL = GND, fBPCLK= 30kHz, TA= 0°C to +70°C,
unless otherwise noted. Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
RDY, IN, BPVDDto GND...........................................-0.3V to +6V
FB2-, PGND1, PGND2 to GND ..........................................±0.3V
LX1 to PGND1..........................................................-0.3V to +6V
BPVSSto GND.......................................................-3.3V to +0.3V
BPVDD to BPVSS......................................................-0.3V to +6V
BPDRV to BPVSS..................................-0.3V to (VBPVDD+ 0.3V)
LX2P to INP............................................................-15V to +0.3V
LX2N to PGND2......................................................-0.3V to +30V
SHDN, INP, FB1, FB2+, REF, PLLC,
BPCLK, FPLL to GND................................-0.3V to (VIN+0.3V)
RDY Sink Current................................................................20mA
LX2P, LX2N Peak Switch Currents.................................±750mA
Continuous Power Dissipation (TA= +70°C)
20-Pin TSSOP (derate 7mW/°C above+70°C)..............559mW
Operating Temperature Range...............................0°C to +70°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +160°C
Lead Temperature (soldering, 10sec).............................+300°C
MAX1664
Active-Matrix Liquid Crystal Display
(AMLCD)Supply
ELECTRICAL CHARACTERISTICS (continued)

(VIN= VINP= 3.3V, SHDN= IN, VBPVDD= 4V, VBPVSS= -1V, PGND1 = PGND2 = FPLL = GND, fBPCLK= 30kHz, TA= 0°C to +70°C,
unless otherwise noted. Typical values are at TA= +25°C.)
Note 1:
DC-DC 1 operates at one-half of the VCOfrequency (fC / 2).
MAX1664
Active-Matrix Liquid Crystal Display
(AMLCD)Supply
__________________________________________Typical Operating Characteristics

(fBPCLK= 22.5kHz, FPLL = GND, L1 = 3.3µH, L2 = 4.7µH, TA= +25°C, unless otherwise noted.)
MAX1664
Active-Matrix Liquid Crystal Display
(AMLCD)Supplyypical Operating Characteristics (continued)

(fBPCLK= 22.5kHz, FPLL = GND, L1 = 3.3µH, L2 = 4.7µH, TA= +25°C, unless otherwise noted.)
MAX1664
Active-Matrix Liquid Crystal Display
(AMLCD)Supplyypical Operating Characteristics (continued)

(fBPCLK= 22.5kHz, FPLL = GND, L1 = 3.3µH, L2 = 4.7µH, TA
MAX1664
Active-Matrix Liquid Crystal Display
(AMLCD)Supply
______________________________________________________________Pin Description
MAX1664
Active-Matrix Liquid Crystal Display
(AMLCD)Supply
_______________Detailed Description

The MAX1664 combines power supply and backplane
drive circuitry for active matrix thin-film-transistor (TFT)
liquid crystal displays (LCD) into one IC. Included are a
pulse-width-modulation (PWM) boost converter, a dual-
output (positive and negative) converter using one
inductor, an LCD backplane driver, and a phase-
locked loop (PLL) to synchronize all three outputs to the
backplane clock.
A high switching frequency (1MHz nominal) and phase-
locked operation allow the use of small, minimum-
height external components while maintaining low
output noise. Output voltages are adjustable to +5.5V
(DC-DC 1) and to +28V and -10V (DC-DC 2). The nega-
tive output voltage can be set to as low as -20V with
additional components.
The frequency ratio between the DC-DC 1 converter
and the backplane clock can be set to 16, 24, or 32.
This flexibility allows high DC-DC converter frequencies
to be used with LCD backplane clock rates ranging
from 20kHz to 72kHz.
Start-Up

At start-up, both converters remain disabled until VREF
reaches 90% of its nominal value. VOUT1is activated
first. Once VOUT1is regulated, VOUT2- is enabled.
VOUT2+is held at 0 until VOUT2-is within 90% of its reg-
ulation target. All three outputs power up in a similar
order when power is applied or when coming out of
shutdown. See the Out-of-Shutdown Sequence photo in
the Typical Operating Characteristicssection.
DC-DC 1 Boost Converter

DC-DC 1 uses a current-mode boost PWM architecture
to produce a positive regulated voltage, adjustable
from 3V to 5.5V (but not less than VIN). This converter
uses an internal N-channel MOSFET with a maximum
on-resistance of 0.5Ω. Cycle-by-cycle peak current lim-
iting protects the switch under fault conditions. Upon
start-up, DC-DC 1 is the first converter to be enabled.
Figure 1. Functional Diagram
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