MAX1632EAI+T ,Multi Output, Low-Noise Power Supply Controllers for Notebook Computersfeatures.INPUT____
MAX1633EAI ,Multi-Output / Low-Noise Power-Supply Controllers for Notebook ComputersELECTRICAL CHARACTERISTICS(V+ = 15V, both PWMs on, SYNC = VL, VL load = 0mA, REF load = 0mA, SKIP = ..
MAX1634CAI ,Multi-Output / Low-Noise Power-Supply Controllers for Notebook ComputersGeneral Description ________
MAX1634EAI ,Multi-Output / Low-Noise Power-Supply Controllers for Notebook ComputersELECTRICAL CHARACTERISTICS(V+ = 15V, both PWMs on, SYNC = VL, VL load = 0mA, REF load = 0mA, SKIP = ..
MAX1634EAI ,Multi-Output / Low-Noise Power-Supply Controllers for Notebook Computersfeatures.+5V (RTC) +12V____
MAX1634EAI ,Multi-Output / Low-Noise Power-Supply Controllers for Notebook ComputersGeneral Description ________
MAX4377FAUA+T ,Single/Dual/Quad High-Side Current-Sense Amplifiers with Internal GainApplicationsTOP VIEW+Notebook Computers Portable/Battery-PoweredOUT1 5 RS-SystemsCurrent-Limited Po ..
MAX4377HAUA ,Single/Dual/Quad High-Side Current-Sense Amplifiers with Internal GainMAX4376/MAX4377/MAX437819-1781; Rev 2; 10/00Single/Dual/Quad High-Side Current-SenseAmplifiers with ..
MAX4377HAUA+ ,Single/Dual/Quad High-Side Current-Sense Amplifiers with Internal GainELECTRICAL CHARACTERISTICS(V = 0 to 28V, V = (V - V ) = 0V, V = +3.0V to +28V, R = ∞, T = T to T un ..
MAX4377TASA+ ,Single/Dual/Quad High-Side Current-Sense Amplifiers with Internal GainFeaturesThe MAX4376/MAX4377/MAX4378 single, dual, and ♦ Low-Cost, Single/Dual/Quad, High-Side Curre ..
MAX4377TASA+T ,Single/Dual/Quad High-Side Current-Sense Amplifiers with Internal GainApplicationsTOP VIEW+Notebook Computers Portable/Battery-PoweredOUT1 5 RS-SystemsCurrent-Limited Po ..
MAX4377TAUA ,Single/Dual/Quad High-Side Current-Sense Amplifiers with Internal GainELECTRICAL CHARACTERISTICS(V = 0 to 28V, V = (V - V ) = 0, V = +3.0V to +28V, R = ∞, T = T to T unl ..
MAX1631EAI+T-MAX1632EAI+-MAX1632EAI+T-MAX1634EAI+-MAX1634EAI-T
Multi Output, Low-Noise Power Supply Controllers for Notebook Computers
________________General DescriptionThe MAX1630–MAX1635 are buck-topology, step-down,
switch-mode, power-supply controllers that generate
logic-supply voltages in battery-powered systems. These
high-performance, dual/triple-output devices include on-
board power-up sequencing, power-good signaling with
delay, digital soft-start, secondary winding control, low-
dropout circuitry, internal frequency-compensation net-
works, and automatic bootstrapping.
Up to 96% efficiency is achieved through synchronous
rectification and Maxim’s proprietary Idle Mode™ control
scheme. Efficiency is greater than 80% over a 1000:1
load-current range, which extends battery life in system-
suspend or standby mode. Excellent dynamic response
corrects output load transients caused by the latest
dynamic-clock CPUs within five 300kHz clock cycles.
Strong 1A on-board gate drivers ensure fast external
N-channel MOSFET switching.
These devices feature a logic-controlled and synchroniz-
able, fixed-frequency, pulse-width-modulation (PWM)
operating mode. This reduces noise and RF interference
in sensitive mobile communications and pen-entry appli-
cations. Asserting the SKIPpin enables fixed-frequency
mode, for lowest noise under all load conditions.
The MAX1630–MAX1635 include two PWM regulators,
adjustable from 2.5V to 5.5V with fixed 5.0V and 3.3V
modes. All these devices include secondary feedback
regulation, and the MAX1630/MAX1632/MAX1633/
MAX1635 each contain 12V/120mA linear regulators. The
MAX1631/MAX1634 include a secondary feedback input
(SECFB), plus a control pin (STEER) that selects which
PWM (3.3V or 5V) receives the secondary feedback sig-
nal. SECFB provides a method for adjusting the sec-
ondary winding voltage regulation point with an external
resistor divider, and is intended to aid in creating auxiliary
voltages other than fixed 12V.
The MAX1630/MAX1631/MAX1632 contain internal out-
put overvoltage and undervoltage protection features.
________________________ApplicationsNotebook and Subnotebook Computers
PDAs and Mobile Communicators
Desktop CPU Local DC-DC Converters
____________________________Features96% Efficiency +4.2V to +30V Input Range 2.5V to 5.5V Dual Adjustable OutputsSelectable 3.3V and 5V Fixed or Adjustable
Outputs (Dual Mode™)12V Linear Regulator Adjustable Secondary Feedback
(MAX1631/MAX1634)5V/50mA Linear Regulator OutputPrecision 2.5V Reference OutputProgrammable Power-Up SequencingPower-Good (RESET) OutputOutput Overvoltage Protection(MAX1630/MAX1631/MAX1632)Output Undervoltage Shutdown (MAX1630/MAX1631/MAX1632)200kHz/300kHz Low-Noise, Fixed-Frequency
OperationLow-Dropout, 99% Duty-Factor Operation 2.5mW Typical Quiescent Power (+12V input, bothSMPSs on)4µA Typical Shutdown Current28-Pin SSOP Package
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersLINEAR
12V
LINEAR
POWER-UP
SEQUENCE
POWER-
GOOD
3.3V
SMPS
SMPS
RESETON/OFF
+5V (RTC)
+3.3V
INPUT
+5V
+12V
________________Functional Diagram19-0480; Rev 4; 8/05
EVALUATION KIT
AVAILABLE
_______________Ordering Information
Ordering Information continued at end of data sheet.
Pin Configurations and Selector Guide appear at end of data
sheet. Idle Mode and Dual Mode are trademarks of Maxim Integrated
Products.
+ Denotes lead-free package.
PARTTEMP RANGEPIN-PACKAGE
MAX1630CAI0°C to +70°C28 SSOP
MAX1630CAI+0°C to +70°C28 SSOP
MAX1630EAI+-40°C to +85°C28 SSOP
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(V+ = 15V, both PWMs on, SYNC = VL, VL load = 0mA, REF load = 0mA, SKIP= 0V, TA= TMINto TMAX, unless otherwise noted.
Typical values are at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V+ to GND..............................................................-0.3V to +36V
PGND to GND.....................................................................±0.3V
VL to GND................................................................-0.3V to +6V
BST3, BST5 to GND...............................................-0.3V to +36V
LX3 to BST3..............................................................-6V to +0.3V
LX5 to BST5..............................................................-6V to +0.3V
REF, SYNC, SEQ, STEER, SKIP, TIME/ON5,
SECFB, RESETto GND............................................-0.3V to +6V
VDDto GND............................................................-0.3V to +20V
RUN/ON3, SHDNto GND.............................-0.3V to (V+ + 0.3V)
12OUT to GND...........................................-0.3V to (VDD+ 0.3V)
DL3, DL5 to PGND........................................-0.3V to (VL + 0.3V)
DH3 to LX3...............................................-0.3V to (BST3 + 0.3V)
DH5 to LX5...............................................-0.3V to (BST5 + 0.3V)
VL, REF Short to GND................................................Momentary
12OUT Short to GND..................................................Continuous
REF Current...........................................................+5mA to -1mA
VL Current.........................................................................+50mA
12OUT Current...............................................................+200mA
VDDShunt Current............................................................+15mA
Operating Temperature Ranges
MAX163_CAI.......................................................0°C to +70°C
MAX163_EAI....................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +160°C
Continuous Power Dissipation (TA= +70°C)
SSOP (derate 9.52mW/°C above +70°C)....................762mW
Lead Temperature (soldering, 10s).................................+300°C
CONDITIONS4.230.0Input Voltage Range
UNITSMINTYPMAXPARAMETEREither SMPS
V+ = 4.2V to 30V, CSH3–CSL3 = 0V,
CSL3 tied to FB3REF5.52.422.52.583V Output Voltage in
Adjustable Mode
Output Voltage Adjust Range
Either SMPS, 5.2V < V+ < 30V%/V0.03
Either SMPS, 0V < CSH_–CSL_ < 80mV
Line Regulation
Dual Mode comparator-20.51.1Adjustable-Mode Threshold Voltage
Load Regulation
SYNC = VL
From enable to 95% full current limit with respect to
fOSC(Note 1)
Clk512
SKIP= 0V, not tested
Soft-Start Ramp Time102540Idle Mode Threshold
SYNC = 0VkHz170200230Oscillator Frequency
V+ = 4.2V to 30V, 0mV < CSH3–CSL3 < 80mV,
FB3 = 0VV3.203.393.473V Output Voltage in Fixed Mode
V+ = 4.2V to 30V, CSH5–CSL5 = 0V,
CSL5 tied to FB5V2.422.52.585V Output Voltage in
Adjustable Mode
V+ = 5.2V to 30V, 0mV < CSH–CSL5 < 80mV,
FB5 = 0VV4.855.135.255V Output Voltage in Fixed Mode
SYNC = VL9798
SYNC = 0V (Note 2)%9899Maximum Duty Factor
CSH3–CSL3 or CSH5–CSL580100120
SKIP= VL or VDD<13V or SECFB < 2.44VmV-50-100-150Current-Limit Threshold
MAIN SMPS CONTROLLERS
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued)(V+ = 15V, both PWMs on, SYNC = VL, VL load = 0mA, REF load = 0mA, SKIP= 0V, TA= TMINto TMAX, unless otherwise noted.
Typical values are at TA= +25°C.)
V+ = VL = 0V,
CSL3 = CSH3 = CSL5 = CSH5 = 5.5VµA0.0110
Not tested
Current-Sense Input Leakage Current
Not tested
Rising edge, hysteresis = 1% (Note 3)
VDD< 13V or SECFB < 2.44V18201
Falling edge (MAX1631/MAX1634)
DL Pulse Width
Falling edge (Note 3)
VDDShunt Threshold2.442.601314
CONDITIONSVDDRegulation Threshold
SECFB Regulation Threshold
VDD= 20V (Note 3)
VDD= 5V, off mode (Notes 3, 4)µA30VDDLeakage Current10VDDShunt Sink Current200200SYNC Input High Pulse Width
SYNC Input Low Pulse Width
13V < VDD< 18V, 0mA < ILOAD< 120mAV11.6512.112.5012OUT Output Voltage
UNITSMINTYPMAXPARAMETERNot testedns200SYNC Rise/Fall Time
kHz240350SYNC Input Frequency Range
VDD= 18V, run mode, no 12OUT load
12OUT forced to 11V, VDD= 13V5010015012OUT Current Limit
Quiescent VDDCurrent
Rising edge of CSL5, hysteresis = 1%
Falling edge, hysteresis = 1%4.24.54.73.53.63.7VL Undervoltage Lockout
Fault Threshold
VL Switchover Threshold
SHDN= V+, RUN/ON3 = TIME/ON5 = 0V,
5.3V < V+ < 30V, 0mA < ILOAD< 50mAV4.75.1VL Output Voltage
Falling edgeV1.82.410REF Sink Current
REF Fault Lockout Voltage
V+ = 4V to 24V, SHDN= 0V
V+ = 4.2V to 5.5V, both SMPSs off,
includes current into SHDN41050200V+ Standby Supply Current
in Dropout
V+ Shutdown Supply Current
V+ = 5.5V to 30V, both SMPSs off,
includes current into SHDN
VL switched over to CSL5, 5V SMPS on3060550V+ Operating Supply Current
V+ Standby Supply Current
0µA < ILOAD< 50µA
No external load (Note 5)
12.52.452.52.55REF Output Voltage
2.54Both SMPSs enabled, FB3 = FB5 = 0V,
CSL3 = CSH3 = 3.5V,
CSL5 = CSH5 = 5.3V1.54Quiescent Power Consumption
(Note 3)
MAX1631/
MAX1634
0mA < ILOAD< 5mAmV100.0REF Load Regulation
FLYBACK CONTROLLER
12V LINEAR REGULATOR (Note 3)
INTERNAL REGULATOR AND REFERENCE
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
Note 1:Each of the four digital soft-start levels is tested for functionality; the steps are typically in 20mV increments.
Note 2:High duty-factor operation supports low input-to-output differential voltages, and is achieved at a lowered operating
frequency (see Overload and Dropout Operationsection).
Note 3:MAX1630/MAX1632/MAX1633/MAX1635 only.
Note 4:Off mode for the 12V linear regulator occurs when the SMPS that has flyback feedback (VDD) steered to it is disabled. In
situations where the main outputs are being held up by external keep-alive supplies, turning off the 12OUT regulator pre-
vents a leakage path from the output-referred flyback winding, through the rectifier, and into VDD.
Note 5:Since the reference uses VL as its supply, the reference’s V+ line-regulation error is insignificant.
ELECTRICAL CHARACTERISTICS (continued)(V+ = 15V, both PWMs on, SYNC = VL, VL load = 0mA, REF load = 0mA, SKIP= 0V, TA= TMINto TMAX, unless otherwise noted.
Typical values are at TA= +25°C.)
Typical hysteresis = +10°C
From each SMPS enabled, with respect to fOSC150
Clk500061447000
With respect to unloaded output voltage
Output Undervoltage Lockout Time
Thermal Shutdown Threshold
With respect to fOSC
Falling edge, CSL_ driven 2%
below RESETtrip threshold
Clk27,00032,00037,0001.5
With respect to unloaded output voltage,
falling edge; typical hysteresis = 1%
RESETPropagation Delay
RESETDelay Time-7-5.5-4
CONDITIONSRESETTrip Threshold
RESET, ISINK= 4mA
RUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC, SEQ; VPIN= 0V or 3.3V0.4±1Input Leakage Current
Logic Output Low Voltage
CSL_ driven 2% above overvoltage trip thresholdµs
FB3, FB5; SECFB = 2.6V
1.5Overvoltage-Fault Propagation Delay150
With respect to unloaded output voltage%607080
Feedback Input Leakage Current
Output Undervoltage Threshold4710Overvoltage Trip Threshold
RUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC
RUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC2.40.6Logic Input Low Voltage
Logic Input High Voltage
UNITSMINTYPMAXPARAMETERHigh or low
DL3, DH3, DL5, DH5; forced to 2V1.571Gate Driver Sink/Source Current
Gate Driver On-Resistance
RESET= 3.5VmA1Logic Output High Current
TIME/ON5 = 0V, SEQ = 0V or VL
SEQ = 0V or VL2.533.52.42.6TIME/ON5 Input Trip Level
TIME/ON5 Source Current
TIME/ON5; RUN/ON3 = 0V, SEQ = 0V or VLΩ1580TIME/ON5 On-Resistance
FAULT DETECTION (MAX1630/MAX1631/MAX1632)
INPUTS AND OUTPUTS
RESET
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersEFFICIENCY vs. 5V OUTPUT CURRENT
MAX1630/35-01
5V OUTPUT CURRENT (A)
EFFICIENCY (%)70
ON5 = 5V
ON3 = 0V
f = 300kHz
MAX1631/MAX1634
V+ = 6V
V+ = 15V
EFFICIENCY vs. 3.3V OUTPUT CURRENT
MAX1630/35-02
3.3V OUTPUT CURRENT (A)
EFFICIENCY (%)70
ON3 = ON5 = 5V
f = 300kHz
MAX1631/MAX1634
V+ = 6V
V+ = 15V
MAX1632/MAX1635
MAXIMUM 15V VDD OUTPUT
CURRENT vs. SUPPLY VOLTAGE
MAX 1630/35-03
SUPPLY VOLTAGE (V)
MAXIMUM OUTPUT CURRENT (mA)
VDD > 13V
5V REGULATING
5V LOAD = 0A
5V LOAD = 3A
MAX1630/MAX1633
MAXIMUM 15V VDD OUTPUT
CURRENT vs. SUPPLY VOLTAGE
MAX 1630/35-04
SUPPLY VOLTAGE (V)
MAXIMUM OUTPUT CURRENT (mA)
VDD > 13V
3.3V REGULATING
3.3V LOAD = 0A
3.3V LOAD = 3A
10,000
STANDBY INPUT CURRENT
vs. INPUT VOLTAGE
MAX1630/35-07
INPUT VOLTAGE (V)
INPUT CURRENT (
ON3 = ON5 = 0V
NO LOAD
PWM MODE INPUT CURRENT
vs. INPUT VOLTAGE
MAX1630/35-05
INPUT VOLTAGE (V)
INPUT CURRENT (mA)
ON3 = ON5 = 5V
SKIP = VL
NO LOAD
IDLE MODE INPUT CURRENT
vs. INPUT VOLTAGE
MAX1630/35-06
INPUT VOLTAGE (V)
INPUT CURRENT (mA)
ON3 = ON5 = 5V
SKIP = 0V
NO LOAD
SHUTDOWN INPUT CURRENT
vs. INPUT VOLTAGE
MAX1630/35-08
INPUT VOLTAGE (V)
INPUT CURRENT (
SHDN = 0V
MINIMUM VIN TO VOUT DIFFERENTIAL
vs. 5V OUTPUT CURRENT
MAX1630/35-09
5V OUTPUT CURRENT (A)
MIN V
TO V
OUT
DIFFERENTIAL (mV)
5V, 3A CIRCUIT
VOUT > 4.8V
f = 300kHz
__________________________________________Typical Operating Characteristics(Circuit of Figure 1, 3A Table 1 components, TA = +25°C, unless otherwise noted.)
__________________________________________________________________________Pin Description
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
____________________________________Typical Operating Characteristics (continued)(Circuit of Figure 1, 3A Table 1 components, TA = +25°C, unless otherwise noted.)
SWITCHING FREQUENCY
vs. LOAD CURRENT
MAX1630/35-10
LOAD CURRENT (mA)
SWITCHING FREQUENCY (kHz)
+5V, VIN = 15V
+3.3V, VIN = 15V
+3.3V, VIN = 6V
+5V, VIN = 6V
VL REGULATOR OUTPUT VOLTAGE
vs. OUTPUT CURRENT
MAX 1630/35-11
OUTPUT CURRENT (mA)
VL OUTPUT VOLTAGE (V)
VIN = 15V
ON3 = ON5 = 0V
REF OUTPUT VOLTAGE
vs. OUTPUT CURRENT
MAX 1630/35-12
OUTPUT CURRENT (mA)
REF OUTPUT VOLTAGE (V)
VIN = 15V
ON3 = ON5 = 0V
2ms/div
START-UP WAVEFORMSRUN
5V/div
3.3V OUTPUT
2V/div
TIME
5V/div
5V OUTPUT
5V/div
SEQ = VL, 0.015μF CAPACITOR ON-TIME
MAX1630/35-13
Feedback Input for the 3.3V SMPS; regulates at FB3 = REF (approx. 2.5V) in adjustable mode. FB3 is a
Dual Mode input that also selects the 3.3V fixed output voltage setting when tied to GND. Connect FB3
to a resistor divider for adjustable-output mode.
FB33
12V/120mA Linear Regulator Output. Input supply comes from VDD. Bypass 12OUT to GND with
1µF minimum.
12OUT
(MAX1630/
32/33/35)
Current-Sense Input. Also serves as the feedback input in fixed-output mode.CSL32
FUNCTIONNAMEPINLogic-Control Input for secondary feedback. Selects the PWM that uses a transformer and secondary
feedback signal (SECFB):
STEER = GND: 3.3V SMPS uses transformer
STEER = VL: 5V SMPS uses transformer
STEER
(MAX1631/
MAX1634)
Current-Sense Input for the 3.3V SMPS. Current-limit level is 100mV referred to CSL3.CSH31
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
_________________________________________________Pin Description (continued)
PINFUNCTIONNAMEDual-Purpose Timing Capacitor Pin and ON/OFFControl Input. See Power-Up Sequencingand
ON/OFFControls section.TIME/ON57
Oscillator Synchronization and Frequency Select. Tie to VL for 300kHz operation; tie to GND for 200kHz
operation. Can be driven at 240kHz to 350kHz for external synchronization.SYNC6
Active-Low Timed Reset Output. RESETswings GND to VL. Goes high after a fixed 32,000 clock-cycle
delay following power-up.RESET11
Logic-Control Input that disables Idle Mode when high. Connect to GND for normal use.SKIP10
2.5V Reference Voltage Output. Bypass to GND with 1µF minimum.REF9
Low-Noise Analog Ground and Feedback Reference PointGND8
Feedback Input for the 5V SMPS; regulates at FB5 = REF (approx. 2.5V) in adjustable mode. FB5 is a
Dual Mode input that also selects the 5V fixed output voltage setting when tied to GND. Connect FB5 to
a resistor divider for adjustable-output mode.
FB512
Gate-Drive Output for the 5V, high-side N-channel switch. DH5 is a floating driver output that swings
from LX5 to BST5, riding on the LX5 switching node voltage.DH516
Pin-Strap Input that selects the SMPS power-up sequence:
SEQ = GND: 5V before 3.3V, RESEToutput determined by both outputs
SEQ = REF: Separate ON3/ON5 controls, RESEToutput determined by 3.3V output
SEQ = VL: 3.3V before 5V, RESEToutput determined by both outputs
SEQ15
Power GroundPGND20
Gate-Drive Output for the low-side synchronous-rectifier MOSFET. Swings 0V to VL.DL519
Boost capacitor connection for high-side gate drive (0.1µF)BST518
Switching Node (inductor) Connection. Can swing 2V below ground without hazard.LX517
Current-Sense Input for the 5V SMPS. Current-limit level is 100mV referred to CSL5.CSH514
Current-Sense Input for the 5V SMPS. Also serves as the feedback input in fixed-output mode, and as
the bootstrap supply input when the voltage on CSL5/VL is > 4.5V.CSL513
Shutdown Control Input, active low. Logic threshold is set at approximately 1V. For automatic start-up,
connect SHDNto V+ through a 220kΩresistor and bypass SHDNto GND with a 0.01µF capacitor.SHDN23
Battery Voltage Input, +4.2V to +30V. Bypass V+ to PGND close to the IC with a 0.22µF capacitor.
Connects to a linear regulator that powers VL.V+22
5V Internal Linear-Regulator Output. VL is also the supply voltage rail for the chip. After the 5V SMPS
output has reached +4.5V (typical), VL automatically switches to the output voltage via CSL5 for boot-
strapping. Bypass to GND with 4.7µF. VL supplies up to 25mA for external loads.21
Supply Voltage Input for the 12OUT Linear Regulator. Also connects to an internal resistor divider for
secondary winding feedback, and to an 18V overvoltage shunt regulator clamp.
VDD
(MAX1630/
32/33/35)
Secondary Winding Feedback Input. Normally connected to a resistor divider from an auxiliary output.
SECFB regulates at VSECFB= 2.5V (see Secondary Feedback Regulation Loopsection). Tie to VL if not
used.
SECFB
(MAX1631/
MAX1634)
Boost Capacitor Connection for high-side gate drive (0.1µF) BST325
Gate-Drive Output for the low-side synchronous-rectifier MOSFET. Swings 0V to VL.DL324
ON/OFFControl Input. See Power-Up Sequencing and ON/OFFControls section.RUN/ON328
Gate-Drive Output for the 3.3V, high-side N-channel switch. DH3 is a floating driver output that swings
from LX3 to BST3, riding on the LX3 switching node voltage.DH327
Switching Node (inductor) Connection. Can swing 2V below ground without hazard.LX326
_______Standard Application CircuitThe basic MAX1631/MAX1634 dual-output 3.3V/5V
buck converter (Figure 1) is easily adapted to meet a
wide range of applications with inputs up to 28V by
substituting components from Table 1. These circuits
represent a good set of tradeoffs between cost, size,
and efficiency, while staying within the worst-case
specification limits for stress-related parameters, such
as capacitor ripple current. Don’t change the frequency
of these circuits without first recalculating component
values (particularly inductance value at maximum bat-
tery voltage). Adding a Schottky rectifier across each
synchronous rectifier improves the efficiency of these
circuits by approximately 1%, but this rectifier is other-
wise not needed because the MOSFETs required for
these circuits typically incorporate a high-speed silicon
diode from drain to source. Use a Schottky rectifier
rated at a DC current equal to at least one-third of the
load current.
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersMAX1631
MAX1634SHDNVLSECFB
INPUTON/OFF
GND
REFSEQ
1μF
+2.5V ALWAYS ON
*1A SCHOTTKY DIODE REQUIRED
FOR THE MAX1631 (SEE OUTPUT
OVERVOLTAGE PROTECTION SECTION).
+5V ALWAYS ON
5V ON/OFF
3.3V ON/OFF
0.1μF0.1μFR2+3.3V OUTPUT*
4.7μF
0.1μF
4.7μF
0.1μF10Ω
0.1μF
0.1μF
DL3
CSH3
CSL3
FB3
RESETRESET OUTPUT
SKIP
STEERR1+5V OUTPUTDL5
LX5
DH5
BST5BST3
SYNC
DH3
LX3
PGND
CSL5
CSH5
RUN/ON3
TIME/ON5
FB5
Figure 1. Standard 3.3V/5V Application Circuit (MAX1631/MAX1634)
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersInput Range
Application
Table 1. Component Selection for Standard 3.3V/5V Application
Table 2. Component Suppliers4.75V to 18V
PDA
4.75V to 28V
Notebook
4.75V to 24V
Workstation
Frequency300kHz
1/2 IR IRF7301;
1/2 Siliconix Si9925DQ; or
1/2 Motorola MMDF3N03HD or
MMDF4N01HD (10V max)
300kHz
IR IRF7403 or IRF7401 (18V
max); Siliconix Si4412DY; or
Motorola MMSF5N03HD or
MMSF5N02HD (18V max)
200kHz
IR IRF7413 or
Siliconix Si4410DYQ1, Q3 High-Side
MOSFETs
Q2, Q4 Low-Side
MOSFETs
1/2 IR IRF7301;
1/2 Siliconix Si9925DQ; or
1/2 Motorola MMDF3N03HD or
MMDF4N01HD (10V max)
10µF, 30V Sanyo OS-CON;
22µF, 35V AVX TPS; or
Sprague 594D
IR IRF7403 or IRF7401 (18V
max); Siliconix Si4412DY; or
Motorola MMSF5N03HD or
MMSF5N02HD (18V max)
2 x 10µF, 30V Sanyo OS-CON;
2 x 22µF, 35V AVX TPS; or
Sprague 594D
IR IRF7413 or
Siliconix Si4410DY
3 x 10µF, 30V Sanyo OS-CON;
4 x 22µF, 35V AVX TPS; or
Sprague 595D
C1, C2 Output Capacitors220µF, 10V AVX TPS or
Sprague 595D
0.033ΩIRC LR2010-01-R033 or
Dale WSL2010-R033-F
2 x 220µF, 10V AVX TPS or
Sprague 595D
0.02ΩIRC LR2010-01-R020 or
Dale WSL2010-R020-F
4 x 220µF, 10V AVX TPS or
Sprague 595D
0.012ΩDale WSL2512-R012-FR1, R2 Resistors
C3 Input Capacitor
15µH, 2.4A Ferrite
Coilcraft DO3316P-153 or
Sumida CDRH125-150
10µH, 4A Ferrite
Coilcraft DO3316P-103 or
Sumida CDRH125-100
4.7µH, 5.5A Ferrite
Coilcraft DO3316-472 or
5.2µH, 6.5A Ferrite Sumida
CDRH127-5R2MC
L1, L2 Inductors
AVX(1) 803-626-3123
(1) 516-435-1824
FACTORY FAX
(COUNTRY CODE)(803) 946-0690
(516) 435-1110
USA PHONECoilcraft(1) 847-639-1469(847) 639-6400
Central
Semiconductor
COMPANYCoiltronics(1) 561-241-9339
(1) 605-665-1627
(561) 241-7876
(605) 668-4131
International
Rectifier (IR)(1) 310-322-3332(310) 322-3331
Dale
IRC(1) 512-992-3377
(1) 714-960-6492
(512) 992-7900
(714) 969-2491Matsuo
Motorola(1) 602-994-6430
(81) 3-3494-7414
FACTORY FAX
(COUNTRY CODE)(602) 303-5454
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USA PHONESiliconix(1) 408-970-3950
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(408) 988-8000
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(603) 224-1961
Sumida(81) 3-3607-5144(847) 956-0666
Sprague
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(847) 390-4373
(702) 831-0140Transpower
Technologies
NIEC
COMPANYMurata-Erie(1) 814-238-0490(814) 237-1431
*Distributor
LOAD CURRENTCOMPONENT
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersLPF
60kHz
REF
1.75V
2.68V
2.388V
4.5V
REF
2.5V
REF
200kHz
300kHz
OSC
PWM
LOGIC
LINEAR
REG
BST3
DH3
LX3
DL3
+3.3V
ON/OFF
INPUT
+5V ALWAYS ON
CSL5
SHDNV+ SYNC
12V
LINEAR
REG
+12V
13V BST5 RAW +15V
DH5
DL5
VL
PGND
CSH5
CSL5
CSH3
CSL3
FB5
RESET
SEQ
2.6V
1V
0.6V 0.6V
VL
GND RUN/ON3
TIME/ON5
REF
LX5 +5V
12OUT
VDD
IN
SECFB
3.3V
PWM
LOGIC
REF
OUTPUTS
LPF
60kHz
TIMER
POWER-ON
SEQUENCE
LOGIC
FB3
MAX1632
OV/UV
FAULT
Figure 2. MAX1632 Block Diagram
_______________Detailed DescriptionThe MAX1630 is a dual, BiCMOS, switch-mode power-
supply controller designed primarily for buck-topology
regulators in battery-powered applications where high effi-
ciency and low quiescent supply current are critical. Light-
load efficiency is enhanced by automatic Idle Mode™
operation, a variable-frequency pulse-skipping mode that
reduces transition and gate-charge losses. Each step-
down, power-switching circuit consists of two N-channel
MOSFETs, a rectifier, and an LC output filter. The output
voltage is the average AC voltage at the switching node,
which is regulated by changing the duty cycle of the
MOSFET switches. The gate-drive signal to the N-channel
high-side MOSFET must exceed the battery voltage, and
is provided by a flying-capacitor boost circuit that uses a
100nF capacitor connected to BST_.
Devices in the MAX1630 family contain ten major circuit
blocks (Figure 2).
The two pulse-width modulation (PWM) controllers each
consist of a Dual Mode™ feedback network and multi-
plexer, a multi-input PWM comparator, high-side and
low-side gate drivers, and logic. MAX1630/MAX1631/
MAX1632 contain fault-protection circuits that monitor
the main PWM outputs for undervoltage and overvolt-
age. A power-on sequence block controls the power-
up timing of the main PWMs and determines whether
one or both of the outputs are monitored for undervolt-
age faults. The MAX1630/MAX1632/MAX1633/
MAX1635 include a secondary feedback network and
12V linear regulator to generate a 12V output from a
coupled-inductor flyback winding. The MAX1631/
MAX1634 have a secondary feedback input (SECFB)
instead, which allows a quasi-regulated, adjustable-
output, coupled-inductor flyback winding to be attached
to either the 3.3V or the 5V main inductor. Bias genera-
tor blocks include the 5V IC internal rail (VL) linear regu-
lator, 2.5V precision reference, and automatic bootstrap
switchover circuit. The PWMs share a common
200kHz/300kHz synchronizable oscillator.
These internal IC blocks aren’t powered directly from
the battery. Instead, the 5V VL linear regulator steps
down the battery voltage to supply both VL and the
gate drivers. The synchronous-switch gate drivers are
directly powered from VL, while the high-side switch
gate drivers are indirectly powered from VL via an
external diode-capacitor boost circuit. An automatic
bootstrap circuit turns off the +5V linear regulator and
powers the IC from the 5V PWM output voltage if the
output is above 4.5V.
PWM Controller BlockThe two PWM controllers are nearly identical. The only
differences are fixed output settings (3.3V vs. 5V), the
VL/CSL5 bootstrap switch connected to the +5V PWM,
and SECFB. The heart of each current-mode PWM con-
troller is a multi-input, open-loop comparator that sums
three signals: the output voltage error signal with
respect to the reference voltage, the current-sense sig-
nal, and the slope compensation ramp (Figure 3). The
PWM controller is a direct-summing type, lacking a tra-
ditional error amplifier and the phase shift associated
with it. This direct-summing configuration approaches
ideal cycle-by-cycle control over the output voltage.
When SKIP= low, Idle Mode circuitry automatically
optimizes efficiency throughout the load current range.
Idle Mode dramatically improves light-load efficiency
by reducing the effective frequency, which reduces
switching losses. It keeps the peak inductor current
above 25% of the full current limit in an active cycle,
allowing subsequent cycles to be skipped. Idle Mode
transitions seamlessly to fixed-frequency PWM opera-
tion as load current increases.
With SKIP= high, the controller always operates in
fixed-frequency PWM mode for lowest noise. Each
pulse from the oscillator sets the main PWM latch that
turns on the high-side switch for a period determined
by the duty factor (approximately VOUT/VIN). As the
high-side switch turns off, the synchronous rectifier
latch sets; 60ns later, the low-side switch turns on. The
low-side switch stays on until the beginning of the next
clock cycle.
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
Table 3. SKIP PWM Table LowLight
LOAD
CURRENTPulse-skipping, supply cur-
rent = 250µA at VIN= 12V,
discontinuous inductor
current
DESCRIPTIONLowHeavyConstant-frequency PWM,
continuous inductor current
SKIPIdle
MODEPWM
HighLightPWMConstant-frequency PWM,
continuous inductor current
PWMHighHeavyConstant-frequency PWM,
continuous inductor current
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersSHOOT-
THROUGH
CONTROL
30mVQ
LEVEL
SHIFT
1μs
SINGLE-SHOT
MAIN PWM
COMPARATOR
OSC
LEVEL
SHIFT
CURRENT
LIMIT
SYNCHRONOUS
RECTIFIER CONTROL
REF
SHDN
-100mV
CSH_
CSL_
FROM
FEEDBACK
DIVIDER
BST_
DH_
LX_
DL_
PGND
SLOPE COMP
SKIP
REF
SECFB
COUNTER
DAC
SOFT-START
Figure 3. PWM Controller Detailed Block Diagram
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook ComputersFigure 4. Main PWM Comparator Block Diagram
FB_
REF
CSH_
CSL_
SLOPE COMPENSATIONR2
TO PWM
LOGIC
OUTPUT DRIVER
UNCOMPENSATED
HIGH-SPEED
LEVEL TRANSLATOR
AND BUFFERI3VBIAS
In PWM mode, the controller operates as a fixed-
frequency current-mode controller where the duty ratio
is set by the input/output voltage ratio. The current-
mode feedback system regulates the peak inductor
current value as a function of the output-voltage error
signal. In continuous-conduction mode, the average
inductor current is nearly the same as the peak current,
so the circuit acts as a switch-mode transconductance
amplifier. This pushes the second output LC filter pole,
normally found in a duty-factor-controlled (voltage-
mode) PWM, to a higher frequency. To preserve inner-
loop stability and eliminate regenerative inductor
current “staircasing,” a slope compensation ramp is
summed into the main PWM comparator to make the
apparent duty factor less than 50%.
The MAX1630 family uses a relatively low loop gain,
allowing the use of lower-cost output capacitors. The
relative gains of the voltage-sense and current-sense
inputs are weighted by the values of current sources
that bias three differential input stages in the main PWM
comparator (Figure 4). The relative gain of the voltage
comparator to the current comparator is internally fixed
at K = 2:1. The low loop gain results in the 2% typical
load-regulation error. The low value of loop gain helps
reduce output filter capacitor size and cost by shifting
the unity-gain crossover frequency to a lower level.
The output filter capacitors (Figure 1, C1 and C2) set a
dominant pole in the feedback loop that must roll off the
loop gain to unity before encountering the zero intro-
duced by the output capacitor’s parasitic resistance
(ESR) (see Design Proceduresection). A 60kHz pole-
zero cancellation filter provides additional rolloff above
the unity-gain crossover. This internal 60kHz lowpass
compensation filter cancels the zero due to filter capaci-
tor ESR. The 60kHz filter is included in the loop in both
fixed-output and adjustable-output modes.
Synchronous Rectifier Driver (DL) Synchronous rectification reduces conduction losses in
the rectifier by shunting the normal Schottky catch diode
with a low-resistance MOSFET switch. Also, the synchro-
nous rectifier ensures proper start-up of the boost gate-
driver circuit. If the synchronous power MOSFETs are
omitted for cost or other reasons, replace them with a
small-signal MOSFET, such as a 2N7002.
If the circuit is operating in continuous-conduction
mode, the DL drive waveform is simply the complement
of the DH high-side drive waveform (with controlled
dead time to prevent cross-conduction or “shoot-
through”). In discontinuous (light-load) mode, the syn-
chronous switch is turned off as the inductor current
falls through zero. The synchronous rectifier works
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computersunder all operating conditions, including Idle Mode.
The SECFB signal further controls the synchronous
switch timing in order to improve multiple-output cross-
regulation (see Secondary Feedback Regulation Loop
section).
Internal VL and REF SuppliesAn internal regulator produces the +5V supply (VL) that
powers the PWM controller, logic, reference, and other
blocks within the IC. This 5V low-dropout linear regula-
tor supplies up to 25mA for external loads, with a
reserve of 25mA for supplying gate-drive power.
Bypass VL to GND with 4.7µF.
Important:Ensure that VL does not exceed 6V.
Measure VL with the main output fully loaded. If it is
pumped above 5.5V, either excessive boost diode
capacitance or excessive ripple at V+ is the probable
cause. Use only small-signal diodes for the boost cir-
cuit (10mA to 100mA Schottky or 1N4148 are pre-
ferred), and bypass V+ to PGND with 4.7µF directly at
the package pins.
The 2.5V reference (REF) is accurate to ±2% over tem-
perature, making REF useful as a precision system ref-
erence. Bypass REF to GND with 1µF minimum. REF
can supply up to 5mA for external loads. (Bypass REF
with a minimum 1µF/mA reference load current.)
However, if extremely accurate specifications for both
the main output voltages and REF are essential, avoid
loading REF more than 100µA. Loading REF reduces
the main output voltage slightly, because of the refer-
ence load-regulation error.
When the 5V main output voltage is above 4.5V, an
internal P-channel MOSFET switch connects CSL5 to
VL, while simultaneously shutting down the VL linear
regulator. This action bootstraps the IC, powering the
internal circuitry from the output voltage, rather than
through a linear regulator from the battery.
Bootstrapping reduces power dissipation due to gate
charge and quiescent losses by providing that power
from a 90%-efficient switch-mode source, rather than
from a much less efficient linear regulator.
Boost High-Side Gate-Drive Supply
(BST3 and BST5) Gate-drive voltage for the high-side N-channel switches
is generated by a flying-capacitor boost circuit
(Figure 2). The capacitor between BST_ and LX_ is
alternately charged from the VL supply and placed par-
allel to the high-side MOSFET’s gate-source terminals.
On start-up, the synchronous rectifier (low-side
MOSFET) forces LX_ to 0V and charges the boost
capacitors to 5V. On the second half-cycle, the SMPS
turns on the high-side MOSFET by closing an internal
switch between BST_ and DH_. This provides the nec-
essary enhancement voltage to turn on the high-side
switch, an action that “boosts” the 5V gate-drive signal
above the battery voltage.
Ringing at the high-side MOSFET gate (DH3 and DH5)
in discontinuous-conduction mode (light loads) is a nat-
ural operating condition. It is caused by residual ener-
gy in the tank circuit, formed by the inductor and stray
capacitance at the switching node, LX. The gate-drive
negative rail is referred to LX, so any ringing there is
directly coupled to the gate-drive output.
Current-Limiting and Current-Sense
Inputs (CSH and CSL)The current-limit circuit resets the main PWM latch and
turns off the high-side MOSFET switch whenever the
voltage difference between CSH and CSL exceeds
100mV. This limiting is effective for both current flow
directions, putting the threshold limit at ±100mV. The
tolerance on the positive current limit is ±20%, so the
external low-value sense resistor (R1) must be sized for
80mV/IPEAK, where IPEAKis the required peak inductor
current to support the full load current, while compo-
nents must be designed to withstand continuous cur-
rent stresses of 120mV/R1.
For breadboarding or for very-high-current applications,
it may be useful to wire the current-sense inputs with a
twisted pair, rather than PC traces. (This twisted pair
needn’t be anything special; two pieces of wire-wrap
wire twisted together are sufficient.) This reduces the
possible noise picked up at CSH_ and CSL_, which can
cause unstable switching and reduced output current.
The CSL5 input also serves as the IC’s bootstrap sup-
ply input. Whenever VCSL5> 4.5V, an internal switch
connects CSL5 to VL.
Oscillator Frequency and
Synchronization (SYNC)The SYNC input controls the oscillator frequency. Low
selects 200kHz; high selects 300kHz. SYNC can also
be used to synchronize with an external 5V CMOS or
TTL clock generator. SYNC has a guaranteed 240kHz
to 350kHz capture range. A high-to-low transition on
SYNC initiates a new cycle.
300kHz operation optimizes the application circuit for
component size and cost. 200kHz operation provides
increased efficiency, lower dropout, and improved
load-transient response at low input-output voltage dif-
ferences (see Low-Voltage Operationsection).
MAX1630–MAX1635
Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
Table 4. Operating Modes
SEQRUN/ON3DESCRIPTIONLowXAll circuit blocks turned off. Supply current = 4µA.
SHDN
TIME/ON5
MODEShutdown
LowStandbyLowHighRefBoth SMPSs off. Supply current = 30µA.
LowRunHigh
HighRunLowHighRef5V SMPS enabled/3.3V off
HighRef3.3V SMPS enabled/5V off
HighRunHigh
Timing capacitorStandbyLowHighGNDBoth SMPSs off. Supply current = 30µA.
Timing capacitorRunHigh
Timing capacitorStandbyLowHighVLBoth SMPSs off. Supply current = 30µA.
High
HighRefBoth SMPSs enabled
GNDBoth SMPSs enabled. 5V enabled before 3.3V.
Timing capacitorRunHighHighVLBoth SMPSs enabled. 3.3V enabled before 5V.
X = Don’t Care
Shutdown ModeHolding SHDNlow puts the IC into its 4µA shutdown
mode. SHDNis logic input with a threshold of about 1V
(the VTHof an internal N-channel MOSFET). For auto-
matic start-up, bypass SHDNto GND with a 0.01µF
capacitor and connect it to V+ through a 220kΩresistor.
Power-Up Sequencing
and ON/OFFControlsStart-up is controlled by RUN/ON3 and TIME/ON5 in
conjunction with SEQ. With SEQ tied to REF, the two
control inputs act as separate ON/OFFcontrols for
each supply. With SEQ tied to VL or GND, RUN/ON3
becomes the master ON/OFFcontrol input and
TIME/ON5 becomes a timing pin, with the delay
between the two supplies determined by an external
capacitor. The delay is approximately 800µs/nF. The
+3.3V supply powers-up first if SEQ is tied to VL, and
the +5V supply is first if SEQ is tied to GND. When driv-
ing TIME/ON5 as a control input with external logic,
always place a resistor (>1kΩ) in series with the input.
This prevents possible crowbar current due to the inter-
nal discharge pull-down transistor, which turns on in
standby mode and momentarily at the first power-up or
in shutdown mode.
RESETPower-Good Voltage MonitorThe power-good monitor generates a system RESETsig-
nal. At first power-up, RESETis held low until both the
3.3V and 5V SMPS outputs are in regulation. At this point,
an internal timer begins counting oscillator pulses, and
RESETcontinues to be held low until 32,000 cycles have
elapsed. After this timeout period (107ms at 300kHz or
160ms at 200kHz), RESETis actively pulled up to VL. If
SEQ is tied to REF (for separate ON3/ON5 controls), only
the 3.3V SMPS is monitored—the 5V SMPS is ignored.
Output Undervoltage Shutdown Protection
(MAX1630/MAX1631/MAX1632)The output undervoltage lockout circuit is similar to
foldback current limiting, but employs a timer rather
than a variable current limit. Each SMPS has an under-
voltage protection circuit that is activated 6144 clock
cycles after the SMPS is enabled. If either SMPS output
is under 70% of the nominal value, both SMPSs are
latched off and their outputs are clamped to ground by
the synchronous rectifier MOSFETs (see Output
Overvoltage Protection section). They won’t restart until
SHDNor RUN/ON3 is toggled, or until V+ power is
cycled below 1V. Note that undervoltage protection can
make prototype troubleshooting difficult, since you
have only 20ms or 30ms to figure out what might be
wrong with the circuit before both SMPSs are latched
off. In extreme cases, it may be useful to substitute the
MAX1633/MAX1634/MAX1635 into the prototype
breadboard until the prototype is working properly.
Output Overvoltage Protection
(MAX1630/MAX1631/MAX1632)Both SMPS outputs are monitored for overvoltage. If
either output is more than 7% above the nominal regu-
lation point, both low-side gate drivers (DL_) are
latched high until SHDNor RUN/ON3 is toggled, or until
V+ power is cycled below 1V. This action turns on the
synchronous rectifiers with 100% duty, in turn rapidly
discharging the output capacitors and forcing both
SMPS outputs to ground. The DL outputs are also kept
high whenever the corresponding SMPS is disabled,
and in shutdown if VL is sustained.
