MAX16036LLB31+ ,Low-Power Battery-Backup Circuits in Small µDFN Packagesfeatures.● Set-Top Boxes ● Intelligent Instrument+Denotes a lead(Pb)-free/RoHS-compliant package.T ..
MAX16036LLB46+ , Low-Power Battery Backup Circuits in Small μDFN Packages
MAX16036PLB26+T ,Low-Power Battery-Backup Circuits in Small µDFN PackagesElectrical Characteristics(V = 2.25V to 5.5V, V = 3V, RESET not asserted, T = -40°C to +85°C, for M ..
MAX1603EAI ,Dual-Channel CardBus and PCMCIA VCC/VPP Power-Switching NetworksApplicationsMAX157ACUA 0°C to +70°C 8 µMAX ±0.5Battery-Powered Systems InstrumentationMAX157BCUA 0° ..
MAX16047ETN+ ,12-/8-Channel EEPROM-Programmable System Managers with Nonvolatile Fault RegistersApplicationswatchdog input or output (WDI/WDO), or as a manualServersreset (MR).WorkstationsThe MAX ..
MAX1604EAI ,Dual-Channel CardBus and PCMCIA Power Switches with SMBus Serial InterfaceApplicationsVLMAX1601/MAX1604Desktop Computers Data Loggers VDDOVERCURRENTDECODESMBCLK AND SMBALER ..
MAX4292EUA ,Dual, ultra-small, single supply +1.8V to +5.5V or dual supples +-0.9V to +-2.75V, micropower, Rail-to-Rail I/O op amp.ApplicationsOrdering Information2-Cell Battery-Operated Systems PIN- TOPPART TEMP. RANGEPACKAGE MAR ..
MAX4292EUA-T ,Ultra-Small, +1.8V, µPower, Rail-to-Rail I/O Op AmpsApplications PIN- TOP 2-Cell Battery-Operated Systems PART TEMP RANGE PACKAGE MARKPortable Electron ..
MAX4294ESD ,Quad, ultra-small, single supply +1.8V to +5.5V or dual supples +-0.9V to +-2.75V, micropower, Rail-to-Rail I/O op amp.FeaturesThe MAX4291/MAX4292/MAX4294 family of micropow- Ultra-Low Voltage Operation—Guaranteed Dow ..
MAX4294ESD+T ,Ultra-Small, +1.8V, µPower, Rail-to-Rail I/O Op Ampsapplications.♦ Rail-to-Rail Input Common-Mode RangeThe MAX4291/MAX4292/MAX4294 have an input com-mo ..
MAX4294EUD+ ,Ultra-Small, +1.8V, µPower, Rail-to-Rail I/O Op AmpsELECTRICAL CHARACTERISTICS (continued)(V = 1.8V to 5.5V, V = V = 0, V = V /2, R = 100kΩ connected t ..
MAX4298EUB ,Ultra-High PSRR Stereo Drivers + Microphone Amp + 100mA Linear Regulator
MAX16036LLB31+-MAX16036PLB26+T
Low-Power Battery-Backup Circuits in Small µDFN Packages
General DescriptionThe MAX16033–MAX16040 supervisory circuits reduce
the complexity and number of components required for
power-supply monitoring and battery-control functions in microprocessor (μP) systems. The devices significantly
improve system reliability and accuracy compared to other ICs or discrete components. The MAX16033–MAX16040 provide μP reset, backup-battery switchover, power-fail warning, watchdog, and chip-enable gating features.
The MAX16033–MAX16040 operate from supply volt-ages up to 5.5V. The factory-set reset threshold volt-age ranges from 2.32V to 4.63V. The devices feature a manual-reset input (MAX16033/MAX16037), a watchdog timer input (MAX16034/MAX16038), a battery-on output (MAX16035/MAX16039), an auxiliary adjustable-reset input (MAX16036/MAX16040), and chip-enable gating (MAX16033–MAX16036). Each device includes a power-
fail comparator and offers an active-low push-pull reset or an active-low open-drain reset.
The MAX16033–MAX16040 are available in 2mm x 2mm, 8-pin or 10-pin μDFN packages and are fully specified from -40°C to +85°C.
Applications●Portable/Battery- Powered Equipment●POS Equipment●Critical μP/μC Power
Monitoring●Set-Top Boxes●Controllers●Computers●Fax Machines●Industrial Control●Real-Time Clocks●Intelligent Instrument
Features●Low 1.2V Operating Supply Voltage●Precision Monitoring of 5.0V, 3.3V, 3.0V, and 2.5V Power-Supply Voltages●Independent Power-Fail Comparator●Debounced Manual-Reset Input●Watchdog Timer, 1.6s Timeout●Battery-On Output Indicator●Auxiliary User-Adjustable RESETIN●Low 13μA Quiescent Supply Current●Two Available Output Structures: Active-Low Push-Pull Reset Active-Low Open-Drain Reset●Active-Low Reset Valid Down to 1.2V●Power-Supply Transient Immunity●140ms (min) Reset Timeout Period●Small 2mm x 2mm, 8-Pin and 10-Pin μDFN Paclages
Ordering Information continued on last page.
Pin Configurations and Typical Operating Circuit appear at
end of data sheet*These parts offer a choice of reset threshold voltages. From
the Reset Threshold Ranges table, insert the desired threshold
voltage code in the blank to complete the part number. See the
Selector Guide for a listing of device features.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
Note: Replace “_” with L for push-pull or P for open-drain RESET and PFO outputs.
PART*TEMP RANGEPIN-PACKAGE
MAX16033LLB_ _+T-40°C to +85°C10 µDFN
MAX16033PLB_ _+T-40°C to +85°C10 µDFN
MAX16034LLB_ _+T-40°C to +85°C10 µDFN
MAX16034PLB_ _+T-40°C to +85°C10 µDFN
PARTMRWATCHDOGBATTONRESETINCEIN/CEOUTPFI, PFOPIN-PACKAGEMAX16033_üüü10 µDFN-10
MAX16034_üüü10 µDFN-10
MAX16035_üüü10 µDFN-10
MAX16036_üüü10 µDFN-10
MAX16037_üü8 µDFN-8
MAX16038_üü8 µDFN-8
MAX16039_üü8 µDFN-8
MAX16040_üü8 µDFN-8
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
Ordering Information
Selector Guide
Terminal Voltages (with respect to GND)VCC, BATT, OUT.......................................................-0.3V to +6V
RESET (open drain), PFO (open drain) ....................-0.3V to +6V
RESET (push-pull), PFO (push-pull), BATTON, RESETIN, WDI
MR, CEIN, CEOUT, PFI...........................-0.3V to (VOUT + 0.3V)
Input Current VCC Peak.............................................................................1A VCC Continuous............................................................250mA BATT Peak....................................................................250mA BATT Continuous............................................................40mA GND................................................................................75mA
Output Current OUT..................................Short-Circuit Protected for up to 5s
RESET, BATTON............................................................20mAContinuous Power Dissipation (TA = +70°C) 8-Pin μDFN (derate 4.8mW/°C above +70°C)..........380.6mW 10-Pin μDFN (derate 5mW/°C above +70°C)...........402.8mWOperating Temperature Range ...........................-40°C to +85°CStorage Temperature Range .............................-65°C to +150°CLead Temperature (soldering, 10s) .................................+300°C
(VCC = 2.25V to 5.5V, VBATT = 3V, RESET not asserted, TA = -40°C to +85°C, for MAX16039PLA31+T, TA = -55°C to +85°C, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSOperating Voltage Range VCC, VBATTNo load (Note 2)05.5V
Supply Current ICCNo load, VCC > VTH
VCC = 2.8V1330VCC = 3.6V1635
VCC = 5.5V2250
Supply Current in Battery Backup Mode
VBATT = 2.8V, VCC = 0V,
excluding IOUT
TA = +25°C1
TA = -40°C to +85°C2
TA = -55°C (MAX16039PLA31+T only)
BATT Standby Current (Note 3)IBATT(VBATT + 0.2V) < VCC < 5.5V
TA = +25°C-0.1+0.02µA
TA = -40°C to +85°C-0.3+0.02
VCC to OUT On-ResistanceRON
VCC = 4.75V, VCC > VTH, IOUT = 150mA3.1VCC = 3.15V, VCC > VTH, IOUT = 65mA3.7
VCC = 2.5V, VCC > VTH, IOUT = 25mA4.6
Output Voltage in Battery Backup ModeVOUT
VBATT = 4.50V, VCC = 0V, IOUT = 20mAVBATT - 0.2VBATT = 3.15V, VCC = 0V, IOUT = 10mAVBATT - 0.15
VBATT = 2.5V, VCC = 0V, IOUT = 5mAVBATT - 0.15
Battery-Switchover Threshold VSWVCC - VBATT, VCC < VTH
VCC rising0mVVCC falling -40
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VCC = 2.25V to 5.5V, VBATT = 3V, RESET not asserted, TA = -40°C to +85°C, for MAX16039PLA31+T, TA = -55°C to +85°C, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
RESET OUTPUTReset ThresholdVTH
MAX160_ _ _L_464.504.634.75
MAX160_ _ _L_444.254.384.50
MAX160_ _ _L_313.003.083.15
MAX160_ _ _L_292.852.933.00
MAX160_ _ _L_262.552.632.70
MAX160_ _ _L_232.252.322.38
VCC Falling Reset DelayVCC falling at 10V/ms25µs
Reset Active Timeout PeriodtRP140280ms
RESET Output Low Voltage VOLRESET assertedISINK = 1.6mA, VCC ≥ 2.1V0.3VISINK = 100µA, VCC > 1.2V0.4
RESET Output High Voltage VOHMAX160_ _L only (push-pull), RESET not asserted, ISOURCE = 500µA, VCC > VTH(MAX)0.8 x VCCV
RESET Output Leakage
CurrentILKGMAX160_ _P only (open drain), not asserted1µA
POWER-FAIL COMPARATORPFI Input ThresholdVPFIVPFI falling1.1851.2351.285V
PFI Hysteresis1%
PFI Input CurrentVPFI = 0V or VCC-100+100nA
PFO Output Low VoltageVOLOutput assertedVCC > 2.1V, ISINK = 1.6mA0.3VVCC > 1.2V, ISINK = 100µA0.4
PFO Output High VoltageVOHMAX160_ _L only (push-pull), VCC > VTH(MAX), ISOURCE = 500µA, output not
asserted
0.8 x VCCV
PFO Leakage CurrentMAX160_ _P only (open drain), VPFO = 5.5V,
not asserted1µA
PFO Delay TimeVPFI + 100mV to VPFI - 100mV4µs
MANUAL RESET (MAX16033/MAX16037)MR Input VoltageVIL0.3 x VCCVVIH0.7 x VCC
Pullup Resistance to VCC20165kΩ
Minimum Pulse Width1µs
Glitch ImmunityVCC = 3.3V100ns
MR to Reset Delay120ns
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
Electrical Characteristics (continued)
(VCC = 2.25V to 5.5V, VBATT = 3V, RESET not asserted, TA = -40°C to +85°C, for MAX16039PLA31+T, TA = -55°C to +85°C, unless
otherwise noted. Typical values are at TA = +25°C.) (Note 1)
Note 1: All devices are 100% production tested at TA = +25°C. All overtemperature limits are guaranteed by design.
Note 2: VBATT can be 0V any time, or VCC can go down to 0V if VBATT is active (except at startup).
Note 3: Positive current flows into BATT.
Note 4: Guaranteed by design.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
WATCHDOG (MAX16034/MAX16038)Watchdog Timeout PeriodtWD1.001.652.25s
Minimum WDI Input Pulse WidthtWDI(Note 4)100ns
WDI Input VoltageVIL0.3 x VCCVVIH0.7 x VCC
WDI Input Current-1.0+1.0µA
BATTON (MAX16035/MAX16039)Output VoltageVOLISINK = 3.2mA, VBATT = 2.1V0.4V
Output Short-Circuit CurrentSink current, VCC = 5V60mA
Source current, VBATT > 2V1030120µA
RESETIN (MAX16036/MAX16040)RESETIN ThresholdVRTH1.1851.2351.285V
RESETIN Input Current0.0125nA
RESETIN to Reset Delay(VRTH + 100mV) to (VRTH - 100mV)1.5µs
CHIP-ENABLE GATING (MAX16033–MAX16036)CEIN Leakage CurrentRESET asserted±1µA
CEIN to CEOUT ResistanceRESET not asserted, VCC = VTH(MAX), VCEIN = VCC/2, ISINK = 10mA100Ω
CEOUT Short-Circuit CurrentRESET asserted, VCEOUT = 0V12.0mA
CEIN to CEOUT Propagation Delay (Note 4)50Ω source impedance driver,
CLOAD = 50pF
VCC = 4.75V1.57VCC = 3.15V29
CEOUT Output-Voltage HighVCC = 5V, VCC > VBATT, ISOURCE = 100µA 0.7 x VCCVVCC = 0V, VBATT > 2.2V, ISOURCE = 1µAVBATT - 0.1
RESET to CEOUT Delay1µs
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
Electrical Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
BATTERY SUPPLY CURRENT
(BACKUP MODE) vs. TEMPERATUREMAX16033 toc02
TEMPERATURE (°C)
BATTERY SUPPLY CURRENT (µA)3510-15
VBATT = 3V
VCC = 0V
BATT-TO-OUT ON-RESISTANCE
vs. TEMPERATUREMAX16033 toc03
TEMPERATURE (°C)
BATTERY-TO-OUT ON-RESISTANCE (3510-15
VCC = 0V
VBATT = 2V
VBATT = 3V
VBATT = 5V
VCC-TO-OUT ON-RESISTANCE
vs. TEMPERATUREMAX16033 toc04
TEMPERATURE (°C)
-TO-OUT ON-RESISTANCE (50-25-1052035
VCC = 2.5V
IOUT = 25mA
VCC = 4.5V
IOUT = 150mAVCC = 3V
IOUT = 65mA
RESET TIMEOUT PERIOD
vs. TEMPERATUREMAX16033 toc05
TEMPERATURE (°C)
RESET TIMEOUT PERIOD (ms)3510-15
VCC = 5V
VCC-TO-RESET PROPAGATION DELAY
vs. TEMPERATUREMAX16033 toc06
TEMPERATURE (°C)
-TO-RESET PROPAGATION DELAY (µs)40-20020
VCC FALLING
0.25V/ms
1V/ms
10V/ms
NORMALIZED RESET THRESHOLD
vs. TEMPERATUREMAX16033 toc07
NORMALIZED RESET THRESHOLD40200-20
SUPPLY CURRENT
vs. TEMPERATURE
MAX16033 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (µA)3510-15
VCC = 5V
MAXIMUM TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVEMAX16033 toc08
MAXIMUM TRANSIENT DURATION (µs)
30010,000
MAX160_ _-29
(VTH = 2.93V)
MAX160_ _-46
(VTH = 4.63V)
RESET OCCURS
ABOVE CURVE
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
BATTERY SUPPLY CURRENT
vs. SUPPLY VOLTAGEMAX16033 toc09
SUPPLY VOLTAGE (V)
BATTERY SUPPLY CURRENT (µA)
VBATT = 2.8V
VTH = 2.93V
VBATT = 2.5V
VBATT = 2.3V
RESETIN THRESHOLD
vs. TEMPERATUREMAX16033 toc10
TEMPERATURE (°C)
RESETIN THRESHOLD (V)35-1510
MAX16036/
MAX16040
RESETIN-TO-RESET PROPAGATION
DELAY vs. TEMPERATUREMAX16033 toc11
TEMPERATURE (°C)
RESETIN-TO-RESET PROPAGATION DELAY (µs)35-1510
MAX16036/
MAX16040
VOD = 50mV
CEIN PROPAGATION DELAY
vs. CEOUT LOAD CAPACITANCEMAX16033 toc12
CEOUT LOAD CAPACITANCE (pF)
IN PROPAGATION DELAY (ns)
VCC = 3V
VCC = 5V
CEIN TO CEOUT ON-RESISTANCE
vs. TEMPERATUREMAX16033 toc13
TEMPERATURE (°C)
IN TO
OUT ON-RESISTANCE (3510-15
VCC = 3V
VCC = 5V
WATCHDOG TIMEOUT PERIOD
vs. TEMPERATUREMAX16033 toc14
TEMPERATURE (°C)
WATCHDOG TIMEOUT PERIOD (s)3510-15
VCC = 5V
PFI-TO-PFO DELAY
vs. TEMPERATUREMAX16033 toc15
PFI-TO-
PFO
DELAY (s)3510-15
VOD = 30mV
FALLING EDGE
PFI THRESHOLD
vs. TEMPERATUREMAX16033 toc16
PFI THRESHOLD (V)35-1510
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
Typical Operating Characteristics (continued)
PIN
NAMEFUNCTIONMAX16033–
MAX16036
(10-pin µDFN)
MAX16037–
MAX16040
(8-pin µDFN)1RESET
Active-Low Reset Output. RESET remains low when VCC is below the reset threshold (VTH), the manual-reset input is low, or RESETIN is low. It asserts low in pulses when the internal watchdog times out. RESET remains low for the reset
timeout period (tRP) after VCC rises above the reset threshold, after the manual-reset input goes from low to high, after RESETIN goes high, or after the watchdog triggers a reset event. The MAX160_ _L is an active-low push-pull output, while the MAX160_ _P is an active-low open-drain output.—CEINChip-Enable Input. The input to the chip-enable gating circuit. Connect to GND or OUT if not used.2PFIPower-Fail Input. PFO goes low when VPFI falls below 1.235V.3GNDGround4
Manual-Reset Input (MAX16033/MAX16037). Driving MR low asserts RESET.
RESET remains asserted as long as MR is low and for the reset timeout period (tRP)
after MR transitions from low to high. Leave unconnected, or connect to VCC if not used. MR has an internal 20kΩ pullup to VCC.
WDI
Watchdog Input (MAX16034/MAX16038). If WDI remains high or low for longer than
the watchdog timeout period (tWD), the internal watchdog timer runs out and a reset
pulse is triggered for the reset timeout period (tRP). The internal watchdog clears
whenever RESET asserts or whenever WDI sees a rising or falling edge (Figure 2).
BATTONBattery-On Output (MAX16035/MAX16039). BATTON goes high during battery backup mode.
RESETINReset Input (MAX16036/MAX16040). When RESETIN falls below 1.235V, RESET asserts. RESET remains asserted as long as RESETIN is low and for at least tRP after RESETIN goes high.5PFOActive-Low Power-Fail Output. PFO goes low when VPFI falls below 1.235V. PFO stays low until VPFI goes above 1.235V. PFO also goes low when VCC falls below the reset threshold voltage.6VCCSupply Voltage, 1.2V to 5.5V7OUTOutput. OUT sources from VCC when RESET is not asserted and from the greater of VCC or BATT when VCC is below the reset threshold voltage.8BATT
Backup-Battery Input. When VCC falls below the reset threshold, OUT switches to BATT if VBATT is 40mV greater than VCC. When VCC rises above VBATT, OUT switches to VCC. The 40mV hysteresis prevents repeated switching if VCC falls slowly.—CEOUTChip-Enable Output. CEOUT goes low only when CEIN is low and reset is not asserted. When CEOUT is disconnected from CEIN, CEOUT is actively pulled up to OUT.
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
Pin Description
RESET
GENERATOR
WATCHDOG
TIMER
WATCHDOG
TRANSITION
DETECTOR
1.235V
CHIP-ENABLE
OUTPUT
CONTROL
OUT
CEOUT
PFO
RESET
BATTON (MAX16035/MAX16039 ONLY)
VCC
BATT
CEIN
(MAX16033–MAX16036 ONLY)
(MAX16033/MAX16037 ONLY)
WDI
(MAX16034/MAX16038 ONLY)
RESETIN
(MAX16036/MAX16040 ONLY)
PFIGND
MAX16033
MAX160401.235V1.235V
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
Pin Description (continued)
Detailed DescriptionThe Typical Operating Circuit shows a typical connec-tion for the MAX16033–MAX16040. OUT powers the static random-access memory (SRAM). If VCC is greater than the reset threshold (VTH), or if VCC is lower than VTH but higher than VBATT, VCC is connected to OUT. If VCC is lower than VTH and VCC is less than VBATT, BATT is connected to OUT. OUT supplies up to 200mA from VCC. In battery-backup mode, an internal MOSFET connects the backup battery to OUT. The on-resistance of the MOSFET is a function of the backup-battery volt-age and temperature and is shown in the BATT-to-OUT On-Resistance vs. Temperature graph in the Typical
Operating Characteristics.
Chip-Enable Signal Gating
(MAX16033–MAX16036 Only)The MAX16033–MAX16036 provide internal gating of
chip-enable (CE) signals to prevent erroneous data from being written to CMOS RAM in the event of a power fail-ure or brownout condition. During normal operation, the
CE gate is enabled and passes all CE transitions. When reset asserts, this path becomes disabled, preventing erroneous data from corrupting the CMOS RAM. The
MAX16033–MAX16036 provide a series transmission
gate from CEIN to CEOUT. A 2ns (typ) propagation delay
from CEIN to CEOUT allows these devices to be used with most μPs and high-speed DSPs.
When RESET is deasserted, CEIN is connected to
CEOUT through a low on-resistance transmission gate. If
CEIN is high when RESET is asserted, CEOUT remains
high regardless of any subsequent transitions on CEIN during the reset event.
If CEIN is low when RESET is asserted, CEOUT is held low for 1μs to allow completion of the read/write operation (Figure 1). After the 1μs delay expires, CEOUT goes high
and stays high regardless of any subsequent transitions
on CEIN during the reset event. When CEOUT is discon-
nected from CEIN, CEOUT is actively pulled up to OUT.
The propagation delay through the chip-enable circuitry
depends on both the source impedance of the drive to
CEIN and the capacitive loading at CEOUT. The chip-
enable propagation delay is specified from the 50% point
of CEIN to the 50% point of CEOUT, using a 50Ω driver and 50pF load capacitance. Minimize the capacitive load
at CEOUT and use a low output-impedance driver to minimize propagation delay.
In high-impedance mode, the leakage current at CEIN is ±1μA (max) over temperature. In low-impedance mode,
the impedance of CEIN appears as a 75Ω resistor in
series with the load at CEOUT.
VCC
VTH
tRDtRD
tRPtRP
CEIN
CEOUT
RESET
PFO
PFI > VPFI
RESET-TO-CEOUT DELAY *
* IF CEIN GOES HIGH BEFORE RESET ASSERTS,
CEOUT GOES HIGH WITHOUT DELAY AS CEIN GOES HIGH.
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
Backup-Battery SwitchoverTo preserve the contents of the RAM in a brownout or power failure, the MAX16033–MAX16040 automatically switch to back up the battery installed at BATT when the following two conditions are met:
1) VCC falls below the reset threshold voltage.
2) VCC is below VBATT.
Table 1 lists the status of the inputs and outputs in battery-backup mode. The devices do not power up if the only voltage source is VBATT. OUT only powers up from VCC at startup.
Manual-Reset Input
(MAX16033/MAX16037 Only)Many μP-based products require manual-reset capabil-ity, allowing the user or external logic circuitry to initiate a reset. For the MAX16033/MAX16037, a logic-low on
MR asserts RESET. RESET remains asserted while MR
is low and for a minimum of 140ms (tRP) after it returns
high. MR has an internal 20kΩ (min) pullup resistor to VCC. This input can be driven from TTL/CMOS logic outputs or with open-drain/collector outputs. Connect a
normally open momentary switch from MR to GND to cre-
ate a manual-reset function; external debounce circuitry is not required. When driving MR from long cables, or when using the device in a noisy environment, connect a 0.1μF capacitor from MR to GND to provide additional noise immunity.
Watchdog Input
(MAX16034/MAX16038 Only)The watchdog monitors μP activity through the watchdog input (WDI). RESET asserts when the μP fails to toggle WDI. Connect WDI to a bus line or μP I/O line. A change of state (high to low, low to high, or a minimum 100ns pulse) resets the watchdog timer. If WDI remains high or
low for longer than the watchdog timeout period (tWD), the
internal watchdog timer runs out and triggers a reset pulse
for the reset timeout period (tRP). The internal watchdog
timer clears whenever RESET is asserted or whenever WDI sees a rising or falling edge. If WDI remains in either a high or low state, a reset pulse periodically asserts after
every watchdog timeout period (tWD); see Figure 2.
Figure 2. MAX16034/MAX16038 Watchdog Timeout Period and
Reset Active Time
Table 1. Input and Output Status in
Battery-Backup Mode
PINSTATUSVCCDisconnected from OUT
OUTConnected to BATT
BATTConnected to OUT. Current drawn from the battery is less than 1µA (at VBATT = 2.8V,
excluding IOUT) when VCC = 0V.
RESETAsserted
BATTONHigh state
MR, RESETIN,
CEIN, and WDIInputs ignored
CEOUTConnected to OUT
PFOAsserted
tWD = WATCHDOG TIMEOUT PERIOD
tRP = RESET TIMEOUT PERIOD
WDI
RESET
tWDtWD
tRPtRP
MAX16033–MAX16040Low-Power Battery-BackupCircuits in Small μDFN Packages
