MAX1473EUI ,315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic RangeApplicationsMAX1473ETJ -40°C to +85°C 32 Thin QFNAutomotive Remote Keyless Entry Security SystemsGa ..
MAX1473EUI+ ,315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic RangeELECTRICAL CHARACTERISTICS (3.3V OPERATION)(Typical Application Circuit, V = 3.0V to 3.6V, no RF si ..
MAX1473EUI+T ,315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic RangeApplications+Denotes a lead(Pb)-free/RoHS-compliant package.Automotive Remote Keyless Entry Securit ..
MAX1473EUI+T ,315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic RangeELECTRICAL CHARACTERISTICS (5.0V OPERATION)(Typical Application Circuit, V = 4.5V to 5.5V, no RF si ..
MAX1473EUI-T ,315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic RangeApplications+Denotes a lead(Pb)-free/RoHS-compliant package.Automotive Remote Keyless Entry Securit ..
MAX1474AXT+ ,Miniature Electronically Trimmable CapacitorApplicationsOrdering InformationPost-Trim of Low-Cost Regenerative ReceiversPIN- TOPPART TEMP. RANG ..
MAX4053AEEE ,Low-Voltage / CMOS Analog Multiplexers/SwitchesFeaturesThe MAX4051/MAX4052/MAX4053 and MAX4051A/' Pin Compatible with Industry-Standard MAX4052A/M ..
MAX4053AEEE+ ,Low-Voltage, CMOS Analog Multiplexers/SwitchesMAX4051/A, MAX4052/A, MAX4053/A19-0463; Rev 2; 10/05Low-Voltage, CMOS AnalogMultiplexers/Switches
MAX4053AEPE ,Low-Voltage / CMOS Analog Multiplexers/SwitchesApplications' Low Distortion: < 0.04% (600Ω)Battery-Operated Equipment' Low Crosstalk: < -90dB (50Ω ..
MAX4053AESE ,Low-Voltage / CMOS Analog Multiplexers/SwitchesFeaturesThe MAX4051/MAX4052/MAX4053 and MAX4051A/' Pin Compatible with Industry-Standard MAX4052A/M ..
MAX4053AESE ,Low-Voltage / CMOS Analog Multiplexers/SwitchesApplications' Low Distortion: < 0.04% (600Ω)Battery-Operated Equipment' Low Crosstalk: < -90dB (50Ω ..
MAX4053AESE+ ,Low-Voltage, CMOS Analog Multiplexers/SwitchesGeneral Description ________
MAX1473EUI
315MHz/433MHz ASK Superheterodyne Receiver with Extended Dynamic Range
General DescriptionThe MAX1473 fully integrated low-power CMOS super-
heterodyne receiver is ideal for receiving amplitude-
shift-keyed (ASK) data in the 300MHz to 450MHz
frequency range. Its signal range is from -114dBm to
0dBm. With few external components and a low-current
power-down mode, it is ideal for cost- and power-sensi-
tive applications typical in the automotive and consumer
markets. The chip consists of a low-noise amplifier
(LNA), a fully differential image-rejection mixer, an on-
chip phase-locked-loop (PLL) with integrated voltage-
controlled oscillator (VCO), a 10.7MHz IF limiting
amplifier stage with received-signal-strength indicator
(RSSI), and analog baseband data-recovery circuitry.
The MAX1473 also has a discrete one-step automatic
gain control (AGC) that drops the LNA gain by 35dB
when the RF input signal is greater than -57dBm.
The MAX1473 is available in 28-pin TSSOP and 32-pin
thin QFN packages. Both versions are specified for the
extended (-40°C to +85°C) temperature range.
ApplicationsAutomotive Remote Keyless Entry Security Systems
Garage Door OpenersHome Automation
Remote ControlsLocal Telemetry
Wireless SensorsSystems
FeaturesOptimized for 315MHz or 433MHz ISM BandOperates from Single 3.3V or 5.0V SuppliesHigh Dynamic Range with On-Chip AGCSelectable Image-Rejection Center FrequencySelectable x64 or x32 fLO/fXTALRatioLow 5.2mA Operating Supply Current<2.5µA Low-Current Power-Down Mode for
Efficient Power Cycling250µs Startup TimeBuilt-In 50dB RF Image RejectionReceive Sensitivity of -114dBm
MAX1473
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Pin Configurations19-2748; Rev 3; 11/03
Functional Diagram and Typical Application Circuit appear
at end of data sheet.
MAX1473
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS (3.3V OPERATION)(Typical Application Circuit, VDD= 3.0V to 3.6V, no RF signal applied, TA= -40°C to +85°C, unless otherwise noted. Typical values
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDD5to AGND....................................................-0.3V to +6.0V
AVDDto AGND......................................................-0.3V to +4.0V
DVDDto DGND......................................................-0.3V to +4.0V
AGND to DGND.....................................................-0.1V to +0.1V
IRSEL, DATAOUT, XTALSEL, AGCDIS, PWRDNto AGND.....................................-0.3V to (VDD5+ 0.3V)
All Other Pins to AGND..............................-0.3V to (VDD+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
28-Pin TSSOP (derate 12.8mW/°C above +70°C).1025.6mW
32-Pin Thin QFN (derate 21.3mW/°C
above +70°C).........................................................1702.1mW
Operating Temperature Ranges
MAX1473E__..................................................-40°C to +85°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering 10s)..................................+300°C
MAX1473
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
DC ELECTRICAL CHARACTERISTICS (5.0V OPERATION)(Typical Application Circuit, VDD= 4.5V to 5.5V, no RF signal applied, TA= -40°C to +85°C, unless otherwise noted. Typical values
are at VDD= 5.0V and TA= +25°C.) (Note 1)
AC ELECTRICAL CHARACTERISTICS (Typical Application Circuit, VDD= 3.0V to 3.6V, all RF inputs are referenced to 50Ω, fRF= 315MHz, TA= -40°C to +85°C, unless oth-
erwise noted. Typical values are at VDD= 3.3V and TA= +25°C.) (Note 1).
MAX1473
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
AC ELECTRICAL CHARACTERISTICS (continued)(Typical Application Circuit, VDD= 3.0V to 3.6V, all RF inputs are referenced to 50Ω, fRF= 315MHz, TA= -40°C to +85°C, unless oth-
erwise noted. Typical values are at VDD= 3.3V and TA= +25°C.) (Note 1)
MAX1473
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Note 1:100% tested at TA= +25°C. Guaranteed by design and characterization over temperature.
Note 2:IRSEL is internally set to 375MHz IR mode. It can be left open when the 375MHz image rejection setting is desired. A 1nF
capacitor is recommended in noisy environments.
Note 3:BER = 2 x 10-3, Manchester encoded, data rate = 4kbps, IF bandwidth = 280kHz.
Note 4:Input impedance is measured at the LNAIN pin. Note that the impedance includes the 15nH inductive degeneration con-
nected from the LNA source to ground. The equivalent input circuit is 50Ωin series with 2.2pF.
Note 5:Crystal oscillator frequency for other RF carrier frequency within the 300MHz to 450MHz range is (fRF- 10.7MHz)/64 for
XTALSEL = 0V, and (fRF- 10.7MHz)/32 for XTALSEL = VDD.
AC ELECTRICAL CHARACTERISTICS (continued)(Typical Application Circuit, VDD= 3.0V to 3.6V, all RF inputs are referenced to 50Ω, fRF= 315MHz, TA= -40°C to +85°C, unless oth-
erwise noted. Typical values are at VDD= 3.3V and TA= +25°C.) (Note 1)
MAX1473
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Typical Operating Characteristics(Typical Application Circuit, VDD= 3.3V, fRF= 315MHz, TA= +25°C, unless otherwise noted.)
MAX1473
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic RangeNORMALIZED IF GAIN
vs. IF FREQUENCY
MAX1473 toc10
IF FREQUENCY (MHz)
NORMALIZED IF GAIN (dB)
S11 MAGNITUDE-LOG PLOT OF RFIN
MAX1473 toc11
RF FREQUENCY (MHz)
MAGNITUDE (dB)
S11 SMITH PLOT OF RFIN
MAX1473 toc12
REGULATOR VOLTAGE
vs. REGULATOR CURRENTMAX1473 toc13
REGULATOR CURRENT (mA)
REGULATOR VOLTAGE (V)2515
PHASE NOISE
vs. OFFSET FREQUENCY
OFFSET FREQUENCY (MHz)
1.E-051.E-041.E-031.E-021.E-011.E+001.E+01
PHASE NOISE (dBc/Hz)
MAX1473 toc14
PHASE NOISE
vs. OFFSET FREQUENCYOFFSET FREQUENCY (MHz)
1.E-051.E-041.E-031.E-021.E-011.E+001.E+01
PHASE NOISE (dBc/Hz)
MAX1473 toc15
ypical Operating Characteristics (continued)(Typical Application Circuit, VDD= 3.3V, fRF= 315MHz, TA= +25°C, unless otherwise noted.)
MAX1473
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
MAX1473
315MHz/433MHz ASK Superheterodyne
Receiver with Extended Dynamic Range
Detailed DescriptionThe MAX1473 CMOS superheterodyne receiver and a
few external components provide the complete receive
chain from the antenna to the digital output data.
Depending on signal power and component selection,
data rates as high as 100kbps can be achieved.
The MAX1473 is designed to receive binary ASK data
modulated in the 300MHz to 450MHz frequency range.
ASK modulation uses a difference in amplitude of the
carrier to represent logic 0 and logic 1 data.
Low-Noise AmplifierThe LNA is an NMOS cascode amplifier with off-chip
inductive degeneration that achieves approximately
16dB of power gain with a 2.0dB noise figure and an
IIP3 of -12dBm. The gain and noise figure are depen-
dent on both the antenna matching network at the LNA
input and the LC tank network between the LNA output
and the mixer inputs.
The off-chip inductive degeneration is achieved by
connecting an inductor from LNASRC to AGND. This
inductor sets the real part of the input impedance at
LNAIN, allowing for a more flexible input impedance
match, such as a typical PC board trace antenna. A
nominal value for this inductor with a 50Ωinput imped-
ance is 15nH, but is affected by PC board trace. See
Typical Operating Characteristicsfor the relationship
between the inductance and the LNA input impedance.
The AGC circuit monitors the RSSI output. When the
RSSI output reaches 2.05V, which corresponds to an
RF input level of approximately -57dBm, the AGC
switches on the LNA gain reduction resistor. The resis-
tor reduces the LNA gain by 35dB, thereby reducing
the RSSI output by about 500mV. The LNA resumes
high-gain mode when the RSSI level drops back below
1.45V (approximately -65dBm at RF input) for 150ms.
The AGC has a hysteresis of ~8dB. With the AGC func-
tion, the MAX1473 can reliably produce an ASK output
for RF input levels up to 0dBm with a modulation depth
of 18dB.
The LC tank filter connected to LNAOUT comprises L3
and C2 (see Typical Application Circuit). Select L3 and
C2 to resonate at the desired RF input frequency. The
resonant frequency is given by:
where:
LTOTAL= L3 + LPARASITICS
CTOTAL = C2 + CPARASITICS
LPARASITICSand CPARASITICSinclude inductance and
capacitance of the PC board traces, package pins,
mixer input impedance, LNA output impedance, etc.
These parasitics at high frequencies cannot be
ignored, and can have a dramatic effect on the tank fil-
ter center frequency. Lab experimentation should be
done to optimize the center frequency of the tank.
MixerA unique feature of the MAX1473 is the integrated
image rejection of the mixer. This device eliminates the
need for a costly front-end SAW filter for most applica-
tions. Advantages of not using a SAW filter are
increased sensitivity, simplified antenna matching, less
board space, and lower cost.
The mixer cell is a pair of double balanced mixers that
perform an IQ downconversion of the RF input to the
10.7MHz IF from a low-side injected LO (i.e., fLO= fRF-
fIF). The image-rejection circuit then combines these
signals to achieve a minimum 45dB of image rejection
over the full temperature range. Low-side injection is
required due to the on-chip image rejection architec-
ture. The IF output is driven by a source-follower biased
to create a driving impedance of 330Ω; this provides a
good match to the off-chip 330Ωceramic IF filter. The
voltage conversion gain is approximately 13dB when
the mixer is driving a 330Ωload.
The IRSEL pin is a logic input that selects one of the
three possible image-rejection frequencies. When
VIRSEL= 0V, the image rejection is tuned to 315MHz.
VIRSEL= VDD/2 tunes the image rejection to 375MHz,
and when VIRSEL= VDD, the image rejection is tuned to
433MHz. The IRSEL pin is internally set to VDD/2 (image
rejection at 375MHz) when it is left floating, thereby
eliminating the need for an external VDD/2 voltage.
Phase-Locked LoopThe PLL block contains a phase detector, charge
pump/integrated loop filter, VCO, asynchronous 64x
clock divider, and crystal oscillator driver. Besides the
crystal, this PLL does not require any external compo-
nents. The VCO generates a low-side local oscillator
(LO). The relationship between the RF, IF, and refer-
ence frequencies is given by:
fREF= (fRF- fIF) / (32 ✕M)
where:
M = 1 (VXTALSEL= VDD) or 2 (VXTALSEL= 0V)
To allow the smallest possible IF bandwidth (for best
sensitivity), the tolerance of the reference must be mini-
mized.
