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MAX14566AEETA+T |MAX14566AEETATMAXIMN/a2500avaiUSB Host Charger Identification Analog Switches
MAX14566BEETA+T |MAX14566BEETATMAXIMN/a2450avaiUSB Host Charger Identification Analog Switches
MAX14566EETA+T |MAX14566EETATMAXIMN/a2438avaiUSB Host Charger Identification Analog Switches


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MAX14566AEETA+T-MAX14566BEETA+T-MAX14566EETA+T
USB Host Charger Identification Analog Switches
MAX14566E/MAX14566AE/MAX14566BE
USB Host Charger Identification
Analog Switches
19-5293; Rev 1; 3/11
General Description
The MAX14566E/MAX14566AE/MAX14566BE are sec-
ond-generation USB devices that combine Hi-Speed
USB analog switches with a USB host charger (dedicated
charger) identification circuit. These devices support both
the latest USB Battery Charging Specification Revision 1.2
including data contact detection and a set resistor bias
for Apple-compliant devices as well as legacy USB D+/D-
short detection using data line pullup. The MAX14566E
has a pMOSFET open-drain control output (CEN) and the
MAX14566AE has an nMOSFET open-drain control output
(CEN) to restart the peripheral connected to the USB host.
These devices feature high-performance Hi-Speed USB
switches with low 4pF (typ) on-capacitance and low 4.0I
(typ) on-resistance. In addition, the devices feature a
single digital input (CB) to switch between pass-through
mode and autodetection charger mode. The USB host
charger identification circuit allows a host USB port to
support USB chargers with shorted DP/DM detection
and to provide support for Apple-compliant devices
using a resistor bias on USB data lines. When an Apple-
compliant device is attached to the port in autodetection
charger mode, the devices supply the voltage to the DP
and DM lines from the internal resistor-divider. If a USB
Revision 1.2-compliant device is attached, the devices
short DP and DM to allow correct charger detection. The
MAX14566BE features an additional digital input (CB1)
to allow forced charger mode.
These devices have enhanced, high electrostatic dis-
charge (ESD) protection on the DP and DM inputs up
to Q15kV Human Body Model (HBM). All the devices
are available in an 8-pin (2mm x 2mm) TDFN package,
and are specified over the -40NC to +85NC extended
temperature range.
FeaturesHi-Speed USB SwitchingLow 4.0pF (typ) On-CapacitanceLow 4.0I (typ) On-ResistanceUltra-Low 0.1I (typ) On-Resistance Flatness+2.8V to +5.5V Supply RangeUltra-Low 3µA (typ) Supply CurrentAutomatic Current-Limit Switch ControlAutomatic USB Charger Identification Circuit±15kV High ESD HBM Protection On DP/DM2mm x 2mm, 8-Pin TDFN Package-40NC to +85NC Operating Temperature Range
Applications
Laptops
Netbooks
Universal Charger including iPodM/iPhoneM Chargers
Ordering Information/
Selector Guide
Note: All devices are specified over the -40°C to +85°C oper-
ating temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Typical Operating Circuit
EVALUATION KIT
AVAILABLE
MAX14566ETDMD-TDPD+
LAPTOP CHIPSETVBUS
GND
USB
TRANSCEIVER
STANDBYCB
CEN
USB
A CONNECTOR
OVERCURRENT PROTECTOR
CEN
Li+
BATTERY
EXTERNAL
POWER SUPPLY
5V SWITCHING
POWER SUPPLYUSB AAPPLE DOCK
CONNECTOR
APPLE
DOCK
iPod
OR iPhone
USB AMICRO BMICRO-USB
CONNECTOR
PHONE OR MP3
PLAYER
PARTPIN-
PACKAGE
CLS
CONTROL
TOP
MARK
MAX14566EETA+8 TDFN-EP*CENADJ
MAX14566AEETA+8 TDFN-EP*CENADK
MAX14566BEETA+8 TDFN-EP*—BMR
MAX14566E/MAX14566AE/MAX14566BE
USB Host Charger Identification
Analog Switches
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
VCC, TDP, TDM, CB, DP, DM, CEN/CEN, CB1....-0.3V to +6.0V
Continuous Current into any Terminal .............................Q30mA
Continuous Power Dissipation (TA = +70NC)
TDFN (derate 11.9mW/NC above +70NC) ....................954mW
Operating Temperature Range ..........................-40NC to +85NC
Junction Temperature .....................................................+150NC
Storage Temperature Range ............................-65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
ELECTRICAL CHARACTERISTICS
(VCC = 2.8V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 5.0V, TA = +25NC.) (Note 2)
ABSOLUTE MAXIMUM RATINGS
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to /thermal-tutorial.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
TDFN
Junction-to-Ambient Thermal Resistance (qJA) ...........84°C/W
Junction-to-Case Thermal Resistance (qJC) ................37°C/W
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
POWER SUPPLY (MAX14566E/MAX14566AE)
Power-Supply RangeVCCVCB > VIH2.85.5V
VCB = 0V (Note 3) 4.755.25V
Supply CurrentICC
VCB = VCC VCC = 3.3V2VCC = 5.5V7
VCB = 0VVCC = 4.75V110200
VCC = 5.25V120200
Supply Current IncreaseDICC0 P VCB P VIL or VIH P VCB P VCC2FA
POWER SUPPLY (MAX14566BE)
Power-Supply RangeVCC
VCB = VCC and VCB1 = VCC or VCB = VCC
and VCB1 = 0V or VCB = 0V and
VCB1 = VCC
2.85.5V
VCB = 0V and VCB1 = 0V (Note 3)4.755.25V
Supply CurrentICC
VCB = VCC and
VCB1 = VCC or
VCB = VCC and
VCB1 = 0V
VCC = 3.3V2
VCC = 5.5V7
VCB = 0V and
VCB1 = 0V
VCC = 4.75V110200
VCC = 5.25V120200
VCB = 0V and
VCB1 = VCC
VCC = 5.0V for TYP
VCC = 5.5V for MAX37
Supply Current IncreaseDICC
VCB1 = 0V; 0 ≤ VCB ≤ VIL
and VIH ≤ VCB ≤ VCC (Note 4)1mAVCB = 0V; 0 ≤ VCB1 ≤ VIL
and VIH ≤ VCB1 ≤ VCC (Note 4)1
MAX14566E/MAX14566AE/MAX14566BE
USB Host Charger Identification
Analog Switches
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.8V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 5.0V, TA = +25NC.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
ANALOG SWITCH
Analog-Signal RangeVDP,VDM0VCCV
On-Resistance TDP/TDM SwitchRONVDP = VDM = 0V to VCC, IDP = IDM = 10mA4.06.5I
On-Resistance Match Between
Channels TDP/TDM SwitchDRONVCC = 5.0V, VDP = VDM = 400mV,
IDP = IDM = 10mA0.1I
On-Resistance Flatness TDP/
TDM SwitchRFLATVCC = 5.0V, VDP = VDM = 0 to VCC,
IDP = IDM = 10mA0.1I
On-Resistance of DP/DM ShortRSHORTVCB = 0V, VDP = 1V, IDP = IDM = 10mA4070I
Off-Leakage Current ITDPOFF,
ITDMOFF
VCC = 3.6V, VDP = VDM = 0.3V to 3.3V,
VTDP = VTDM = 3.3V to 0.3V, VCB = 0V-250+250nA
On-Leakage CurrentIDPON,IDMON VCC = 3.6V, VDP = VDM = 3.3V to 0.3V,
VCB = VCC-250+250nA
DYNAMIC PERFORMANCE
Turn-On TimetONVTDP or VTDM = 1.5V, RL = 300I,
CL = 35pF, Figure 120100Fs
Turn-Off TimetOFFVTDP or VTDM = 1.5V, RL = 300I,
CL = 35pF, Figure 1 15Fs
TDP, TDM Switch Propagation
DelaytPLH, tPHLRL = RS = 50I60ps
Output Skew tSK(O)
Skew between DP and DM when
connected to TDP and TDM,
RL = RS = 50I, Figure 2ps
TDP, TDM Off-CapacitanceCOFFf = 1MHz2.0pF
DP, DM On-Capacitance
(Connected to TDP, TDM)CONf = 240MHz4.05.5pF
-3dB Bandwidth BWRL = RS = 50I (Note 4)1000MHz
Off-IsolationVISOVTDP, VDP = 0dBm, RL = RS = 50I,
f = 250MHz, Figure 3 (Note 4)-20dB
CrosstalkVCTVTDP, VDP = 0dBm, RL = RS = 50I,
f = 250MHz, Figure 3 (Note 4)-25dB
INTERNAL RESISTORS
DP/DM Short PulldownRPD335500710kI
RP1/RP2 RatioRTRP1.4851.51.515Ratio
RP1 + RP2 Resistance RRP95126176kI
RM1/RM2 RatioRTRM0.8430.850.865Ratio
RM1 + RM2 ResistanceRRM7094132kI
COMPARATORS
DM1 Comparator ThresholdVDM1FDM falling454647%VCC
DM1 Comparator Hysteresis1%
DM2 Comparator ThresholdVDM2FDM falling6.3177.6%VCC
DM2 Comparator Hysteresis1%
MAX14566E/MAX14566AE/MAX14566BE
USB Host Charger Identification
Analog Switches
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.8V to 5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 5.0V, TA = +25NC.) (Note 2)
Note 2: All units are 100% production tested at TA = +25NC. Specifications over temperature are guaranteed by design.
Note 3: The part is operational from +2.8V to +5.5V. However, in order to have the valid Apple resistor-divider network, the VCC
supply must stay within the range of +4.75V to +5.25V.
Note 4: Guaranteed by design. Test Circuits/Timing Diagrams
tr < 5ns
tf < 5ns
50%
VIL
LOGIC
INPUT
GND
VIN
VIH
tOFF
TD_
0.9 x V0UT0.9 x VOUT
tON
VOUT
SWITCH
OUTPUT
LOGIC
INPUT
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
VCC
VCC
VOUT
MAX14566E
MAX14566AE
MAX14566BE
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VOUT = VINRL
RL + RON
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DP Comparator Hysteresis1%
LOGIC INPUT (CB, CB1)
CB/CB1 Input Logic-HighVIH1.4V
CB/CB1 Input Logic-LowVIL0.4V
CB/CB1 Input Leakage CurrentIINVCC = 5.5V, 0V P VCB P VIL or
VIH P VCB P VCC-1+1FA
CEN/CEN OUTPUTS
VBUS Toggle Time (MAX14566E/
MAX14566AE)tVBTCB = logic 0 to logic 1 or logic 1 to logic 00.512s
CEN Output Logic-High VoltageCB = logic 0 to logic 1, ISOURCE = 2mA
(MAX14566E only)
VCC -
0.4V
CEN Output Leakage CurrentVCC = 5.5V, VCEN = 0V, CEN deasserted
(MAX14566E only)1FA
CEN Output Logic-Low VoltageCB = logic 0 to logic 1, ISINK = 2mA
(MAX14566AE only)0.4V
CEN Output Leakage CurrentVCC = VCEN = 5.5V, CEN deasserted
(MAX14566AE only)1FA
ESD PROTECTION
ESD Protection Level
(DP and DM Only)VESDHBMQ15kV
ESD Protection Level
(All Other Pins)VESDHBMQ2kV
MAX14566E/MAX14566AE/MAX14566BE
USB Host Charger Identification
Analog Switches
Test Circuits/Timing Diagrams (continued)
Figure 2. Output Signal Skew
IN+
IN-
VCC
OUT+
OUT-
VIN+
VIN-
VOUT+
VOUT-
TDP
TDM
tPLHXtPHLX
tINRISE
tOUTRISEtOUTFALL
RISE-TIME PROPAGATION DELAY = tPLHX OR tPLHY
FALL-TIME PROPAGATION DELAY = tPHLX OR tPHLY
tSK(O) = |tPLHX - tPLHY| OR |tPHLX - tPHLY|
tSK(P) = |tPLHX - tPHLX| OR |tPLHY - tPHLY|
50%
50%
50%
50%
90%
10%10%
90%
10%10%
50%
50%
50%
50%
tINFALL
90%
90%
tPHLYtPLHY
MAX14566E
MAX14566AE
MAX14566BE
MAX14566E/MAX14566AE/MAX14566BE
USB Host Charger Identification
Analog Switches
Typical Operating Characteristics
(VCC = 5V, TA = +25NC, unless otherwise noted.)
Test Circuits/Timing Diagrams (continued)
Figure 3. Off-Isolation and Crosstalk
TDP/TDM ON-RESISTANCE
vs. SUPPLY VOLTAGE
MAX14566E toc01
VTDP (V)
VCC = 2.8V
VCC = 5.5V
ON-RESISTANCE vs. VTDP/TDM
MAX14566E toc02
TA = -40°C
TA = +25°C
TA = +85°C
5.0VCC = 3.3V
VTDP/TDM (V)
DP/DM SHORT ON-RESISTANCE
vs. SUPPLY VOLTAGE
MAX14566E toc03
VDP (V)
5.55.04.04.51.01.52.02.53.03.50.5VCC = 2.8V
VCC = 5.5V6.0
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN TD_ AND "OFF" D_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
VOUTVCC
VCC
TDP
DP*
VIN
OFF-ISOLATION = 20log VOUT
VIN
CROSSTALK = 20log VOUT
VIN
NETWORK
ANALYZER
50Ω
50Ω50Ω
50Ω
MEASREF
0V OR VCC
*FOR CROSSTALK THIS PIN IS DM.
MAX14566E
MAX14566AE
MAX14566BE
MAX14566E/MAX14566AE/MAX14566BE
USB Host Charger Identification
Analog Switches
Typical Operating Characteristics (continued)
(VCC = 5V, TA = +25NC, unless otherwise noted.)
TDP/DP LEAKAGE CURRENT
vs. TEMPERATURE
MAX14566E toc04
TEMPERATURE (°C)
LEAKAGE CURRENT (nA)603045-15015-30
VCC = 3.6V, VTDP = 3.3V
ON-LEAKAGE
OFF-LEAKAGE
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX14566E toc05
VCC (V)
ICC
(µA)
CB = VCC
TA = -40°C
TA = +25°C
TA = +85°C
SUPPLY CURRENT
vs. LOGIC LEVEL
MAX14566E toc06
LOGIC LEVEL (V)
ICC
(µA)
VCC = 5.5V
TURN-ON/TURN-OFF TIME
vs. SUPPLY VOLTAGE
MAX14566E toc07
VCC (V)
TURN-ON/TURN-OFF TIME (µs)
tON
tOFF
LOGIC-INPUT THRESHOLD (V)
LOGIC-INPUT THRESHOLD
vs. SUPPLY VOLTAGE
MAX14566E toc08
1.1CB_RISING
CB_FALLING
AUTODETECTION MODE
MAX14566E toc09
DM
1V/div
2V/div
1V/div
10µs/div
VCC = 5.0V, DP/DM HIGH IMPEDANCE,
CB LOGIC 1 TO LOGIC 0
MAX14566E/MAX14566AE/MAX14566BE
USB Host Charger Identification
Analog Switches
Typical Operating Characteristics (continued)
(VCC = 5V, TA = +25NC, unless otherwise noted.)
AUTODETECTION MODE
MAX14566E toc10
1ms/div
VCC = 5.0V, DP/DM HIGH IMPEDANCE TO
0.5V AT DM
DM
500mV/div
500mV/div
AUTO RESET
MAX14566E toc11
2V/div
2s/div
MAX14566E
CEN
2V/div
AUTO RESET
MAX14566E toc12
500mV/div
2s/div
MAX14566AE
CEN
2V/div
MAX14566E toc13
TIME (x 10n - 9)s
DIFFERENTIAL SIGNAL (V)
HI-SPEED USB TRANSMIT
TEMPLATE
USB EYE DIAGRAM
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