MAX1183ECM+D ,Dual 10-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Parallel OutputsELECTRICAL CHARACTERISTICS(V = 3V, OV = 2.5V, 0.1µF and 1.0µF capacitors from REFP, REFN, and COM t ..
MAX1183ECM-D ,Dual 10-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Parallel OutputsApplicationsINA- 5 32 OVDDV 6 31 OGNDDDMAX1183High-Resolution ImagingGND 7 30 D0BINB- 8 29 D1BI/Q C ..
MAX1185ECM+TD ,Dual 10-Bit, 20Msps, +3V, Low-Power ADC with Internal Reference and Multiplexed Parallel OutputsApplicationsINB- 8 29 N.C.INB+ 9 28 N.C.High Resolution ImagingGND 10 27 N.C.I/Q Channel Digitizati ..
MAX1187AEUI+ ,16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input RangeMAX1179/MAX1187/MAX118919-2675; Rev 1; 1/0316-Bit, 135ksps, Single-Supply ADCs withBipolar Analog I ..
MAX1187AEUI+ ,16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input RangeFeaturesThe MAX1179/MAX1187/MAX1189 16-bit, low-power,♦ Analog Input Voltage Range: ±10V, ±5V, or 0 ..
MAX1187BCUI ,16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input RangeApplicationsD14 7 22 D1D15 8 21 D0Temperature Sensing and MonitoringR/C 9 20 DVDDIndustrial Process ..
MAX3490ECSA ,3.3V-Powered / 15kV ESD-Protected / 12Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3490ECSA ,3.3V-Powered / 15kV ESD-Protected / 12Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3490ECSA+ ,3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3490ECSA+T ,3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3490EEPA+ ,3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX3490EESA ,3.3V-Powered / 15kV ESD-Protected / 12Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers
MAX1183ECM+D-MAX1183ECM-D
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with Internal Reference and Parallel Outputs
General DescriptionThe MAX1183 is a 3V, dual 10-bit analog-to-digital con-
verter (ADC) featuring fully differential wideband track-
and-hold (T/H) inputs, driving two pipelined, nine-stage
ADCs. The MAX1183 is optimized for low-power, high
dynamic performance applications in imaging, instrumen-
tation, and digital communication applications. This ADC
operates from a single 2.7V to 3.6V supply, consuming
only 120mW while delivering a typical signal-to-noise ratio
(SNR) of 59.6dB at an input frequency of 20MHz and a
sampling rate of 40Msps. The T/H driven input stages
incorporate 400MHz (-3dB) input amplifiers. The convert-
ers may also be operated with single-ended inputs. In
addition to low operating power, the MAX1183 features a
2.8mA sleep mode as well as a 1µA power-down mode to
conserve power during idle periods.
An internal 2.048V precision bandgap reference sets
the full-scale range of the ADC. A flexible reference
structure allows the use of this internal or an externally
derived reference, if desired for applications requiring
increased accuracy or a different input voltage range.
The MAX1183 features parallel, CMOS-compatible
three-state outputs. The digital output format can be set
to two’s complement or straight offset binary through a
single control pin. The device provides for a separate
output power supply of 1.7V to 3.6V for flexible interfac-
ing. The MAX1183 is available in a 7mm ✕7mm, 48-pin
TQFP package, and is specified for the extended
industrial (-40°C to +85°C) temperature range.
Pin-compatible lower and higher speed versions of the
MAX1183 are also available. See Table 2 at end of data
sheet for a list of pin-compatible versions. Refer to the
MAX1180 data sheet for 105Msps, the MAX1181 data
sheet for 80Msps, the MAX1182 data sheet for 65Msps,
and the MAX1184 data sheet for 20Msps. In addition to
these speed grades, this family includes a multiplexed
output version, for which digital data is presented time-
interleaved and on a single, parallel 10-bit output port.
ApplicationsHigh-Resolution Imaging
I/Q Channel Digitization
Multichannel IF Sampling
Instrumentation
Video Application
Ultrasound
FeaturesSingle 3V OperationExcellent Dynamic Performance:
59.6dB SNR at fIN= 20MHz
73dB SFDR at fIN= 20MHz Low Power:
40mA (Normal Operation)
2.8mA (Sleep Mode)
1µA (Shutdown Mode)0.02dB Gain and 0.25°Phase MatchingWide ±1VP-PDifferential Analog Input Voltage
Range400MHz -3dB Input BandwidthOn-Chip 2.048V Precision Bandgap ReferenceUser-Selectable Output Format—Two’s
Complement or Offset Binary48-Pin TQFP Package with Exposed Paddle for
Improved Thermal Dissipation
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel OutputsD1A
D0A
OGND
OVDD
OVDD
OGND
D0B
D1B
D2B
D3B
D4B
D5B
COM
VDD
GND
INA+
INA-
VDD
GND
INB-
INB+
GND
VDD
CLK
48 TQFP-EPMAX1183
GND
GND
T/B
SLEEP
D9BD8BD7BD6B14151617181920212223244746454443424140393837
REFNREFPREFINREFOUTD9AD8AD7AD6AD5AD4AD3AD2A
Pin Configuration
Ordering Information19-2173; Rev 1; 7/06
Functional Diagram appears at end of data sheet.
PARTTEMP RANGEPIN-PACKAGEMAX1183ECM-40°C to +85°C48 TQFP-EP*
MAX1183ECM+-40°C to +85°C48 TQFP-EP*
*EP = Exposed paddle.
+Denotes lead-free package.
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS(VDD= 3V, OVDD= 2.5V, 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND, REFOUT connected to REFIN through a
10kΩresistor, VIN= 2VP-P(differential with respect to COM), CL= 10pF at digital outputs (Note 1), fCLK= 40MHz, TA= TMINto TMAX,
unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD, OVDDto GND..............................................-0.3V to +3.6V
OGND to GND.......................................................-0.3V to +0.3V
INA+, INA-, INB+, INB- to GND...............................-0.3V to VDD
REFIN, REFOUT, REFP, REFN,
COM, CLK to GND.................................-0.3V to (VDD+ 0.3V)
OE, PD, SLEEP, T/B
D9A–D0A, D9B–D0B to OGND...........-0.3V to (OVDD+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
48-Pin TQFP-EP
(derate 30.4mW/°C above +70°C)..........................2430mW
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DC ACCURACYResolution10Bits
Integral NonlinearityINLfIN = 7.51MHz±0.5±1.7LSB
Differential NonlinearityDNLfIN = 7.51MHz, no missing codes guaranteed±0.25±1.0LSB
Offset Error<±1±1.8% FS
Gain Error0±2% FS
ANALOG INPUTDifferential Input Voltage RangeVDIFFDifferential or single-ended inputs±1.0V
Common-Mode Input Voltage
RangeVCMVDD/2
±0.5V
Input ResistanceRINSwitched capacitor load50kΩ
Input CapacitanceCIN5pF
CONVERSION RATEMaximum Clock FrequencyfCLK40MHz
Data Latency5Clock
Cycles
DYNAMIC CHARACTERISTICSfINA or B = 7.51MHz, TA = +25°C57.359.6Signal-to-Noise Ratio
(Note 3)SNRfINA or B = 20MHz, TA = +25°C56.859.6dB
fINA or B = 7.51MHz, TA = +25°C5759.4Signal-to-Noise and Distortion
(Note 3)SINADfINA or B = 20MHz, TA = +25°C56.559dB
fINA or B = 7.51MHz, TA = +25°C6576Spurious-Free Dynamic Range
(Note 3)SFDRfINA or B = 20MHz, TA = +25°C6573dBc
fINA or B = 7.51MHz, TA = +25°C-73-64Total Harmonic Distortion
(First 4 harmonics) (Note 3)THDfINA or B = 20MHz, TA = +25°C-73-63dBc
fINA or B = 7.51MHz-76Third-Harmonic Distortion
(Note 3)HD3fINA or B = 20MHz-73dB
Intermodulation DistortionIMD
fINA or B = 11.6066MHz at -6.5dBFS,
fINA or B = 13.3839MHz at -6.5dBFS
(Note 4)
-78dBc
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
ELECTRICAL CHARACTERISTICS (continued)(VDD= 3V, OVDD= 2.5V, 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND, REFOUT connected to REFIN through a
10kΩresistor, VIN= 2VP-P(differential with respect to COM), CL= 10pF at digital outputs (Note 1), fCLK= 40MHz, TA= TMINto TMAX,
unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSSmall-Signal BandwidthInput at -20dBFS, differential inputs500MHz
Full-Power BandwidthFPBWInput at -0.5dBFS, differential inputs400MHz
Aperture DelaytAD1ns
Aperture JittertAJ2psRMS
Overdrive Recovery TimeFor 1.5 x full-scale input2ns
Differential Gain±1%
Differential Phase±0.25Degrees
Output NoiseINA+ = INA- = INB+ = INB- = COM0.2LSBRMS
INTERNAL REFERENCEReference Output VoltageREFOUT2.048
±3%V
Reference Temperature
CoefficientTCREF60ppm/
Load Regulation1.25mV/mA
BUFFERED EXTERNAL REFERENCE (VREFIN = 2.048V)REFIN Input VoltageVREFIN2.048V
Positive Reference Output
VoltageVREFP2.012V
Negative Reference Output
VoltageVREFN0.988V
Differential Reference Output
Voltage RangeΔVREFΔVREF = VREFP - VREFN0.951.0241.10V
REFIN ResistanceRREFIN>50MΩ
Maximum REFP, COM
Source CurrentISOURCE5mA
Maximum REFP, COM
Sink CurrentISINK-250µA
Maximum REFN Source CurrentISOURCE250µA
Maximum REFN Sink CurrentISINK-5mA
UNBUFFERED EXTERNAL REFERENCE (VREFIN = AGND, reference voltage applied to REFP, REFN, and COM)REFP, REFN Input ResistanceRREFP,
RREFN
Measured between REFP and COM and
REFN and COM4kΩ
Differential Reference Input
Voltage RangeΔVREFΔVREF = VREFP - VREFN1.024
±10%V
COM Input Voltage RangeVCOMVDD/2
±10%V
REFP Input VoltageVREFPVCOM +
ΔVREF/2V
REFN Input VoltageVREFNVCOM -
ΔVREF/2V
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
ELECTRICAL CHARACTERISTICS (continued)(VDD= 3V, OVDD= 2.5V, 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND, REFOUT connected to REFIN through a
10kΩresistor, VIN= 2VP-P(differential with respect to COM), CL= 10pF at digital outputs (Note 1), fCLK= 40MHz, TA= TMINto TMAX,
unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DIGITAL INPUTS (CLK, PD, OE, SLEEP, T/B)CLK0.8 x
VDDInput High ThresholdVIH
PD, OE, SLEEP, T/B0.8 x
OVDD
CLK0.2 x
VDDInput Low ThresholdVIL
PD, OE, SLEEP, T/B0.2 x
OVDD
Input HysteresisVHYST0.1V
IIHVIH = OVDD or VDD (CLK)±5Input LeakageIILVIL = 0V±5µA
Input CapacitanceCIN5pF
DIGITAL OUTPUTS (D9A–D0A, D9B–D0B)Output Voltage LowVOLISINK = -200µA0.2V
Output Voltage HighVOHISOURCE = 200µAOVDD
- 0.2V
Three-State Leakage CurrentILEAKOE = OVDD±10µA
Three-State Leakage
CapacitanceCOUTOE = OVDD5pF
POWER REQUIREMENTSAnalog Supply Voltage RangeVDD2.733.6V
Output Supply Voltage RangeOVDD1.72.53.6V
Operating, fINA or B = 20MHz at -0.5dBFS4060
Sleep mode2.8mAAnalog Supply CurrentIVDD
Shutdown, clock idle, PD = OE = OVDD115µA
Operating, CL = 15pF,
fINA or B = 20MHz at -0.5dBFS5.8mA
Sleep mode100Output Supply CurrentIOVDD
Shutdown, clock idle, PD = OE = OVDD210µA
Operating, fINA or B = 20MHz at -0.5dBFS120180
Sleep mode8.4mWPower DissipationPDISS
Shutdown, clock idle, PD = OE = OVDD345µW
Offset±0.2mV/VPower-Supply Rejection RatioPSRRGain±0.1%V
TIMING CHARACTERISTICSCLK Rise to Output Data ValidtDOFigure 3 (Note 5)58ns
Output Enable TimetENABLEFigure 410ns
Output Disable TimetDISABLEFigure 41.5ns
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
ELECTRICAL CHARACTERISTICS (continued)(VDD= 3V, OVDD= 2.5V, 0.1µF and 1.0µF capacitors from REFP, REFN, and COM to GND, REFOUT connected to REFIN through a
10kΩresistor, VIN= 2VP-P(differential with respect to COM), CL= 10pF at digital outputs (Note 1), fCLK= 40MHz, TA= TMINto TMAX,
unless otherwise noted. Typical values are at TA= +25°C.) (Note 2)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITSCLK Pulse Width HightCHFigure 3, clock period: 25ns12.5
±3.8ns
CLK Pulse Width LowtCLFigure 3, clock period: 25ns12.5
±3.8ns
Wake up from sleep mode (Note 6)0.41Wake-Up TimetWAKEWake up from shutdown (Note 6)1.5µs
CHANNEL-TO-CHANNEL MATCHINGCrosstalkfINA or B = 20MHz at -0.5dBFS-70dB
Gain MatchingfINA or B = 20MHz at -0.5dBFS0.02±0.2dB
Phase MatchingfINA or B = 20MHz at -0.5dBFS0.25Degrees
Note 1:Equivalent dynamic performance is obtainable over full OVDDrange with reduced CL.
Note 2:Specifications at ≥+25°C are guaranteed by production test and < +25°C are guaranteed by design and characterization.
Note 3:SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dBFS referenced to a 1.024V full-scale
input voltage range.
Note 4:Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is
6dB better, if referenced to the two-tone envelope.
Note 5:Digital outputs settle to VIH, VIL. Parameter guaranteed by design.
Note 6:With REFIN driven externally, REFP, COM, and REFN are left floating while powered down.
Typical Operating Characteristics(VDD= 3V, OVDD= 2.5V, VREFIN= 2.048V, differential input at -0.5dBFS, fCLK= 40.0006MHz, CL≈10pF, TA= +25°C, unless
otherwise noted.)
FFT PLOT CHA (DIFFERENTIAL INPUT,
8192-POINT DATA RECORD)
MAX1183 toc01
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
fCLK = 40.0006MHz
fINA = 7.5343MHz
fINB = 6.1475MHz
AINA = -0.498dBFS
HD3
HD2
CHA
FFT PLOT CHB (DIFFERENTIAL INPUT,
8192-POINT DATA RECORD)
MAX1183 toc02
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
fCLK = 40.0006MHz
fINB = 6.1475MHz
fINA = 7.5343MHz
AINB = -0.534dBFS
HD3
HD2
CHB
FFT PLOT CHA (DIFFERENTIAL INPUT,
8192-POINT DATA RECORD)
MAX1183 toc03
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
fCLK = 40.0006MHz
fINA = 24.9662MHz
fINB = 19.888MHz
AINA = -0.552dBFS
HD3
HD2
CHA
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel OutputsFFT PLOT CHB (DIFFERENTIAL INPUT,
8192-POINT DATA RECORD)
MAX1183 toc04
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
CHBfCLK = 40.0006MHz
fINA = 24.9662MHz
fINB = 19.888MHz
AINB = -0.525dBFS
HD3
HD2
TWO-TONE IMD PLOT (DIFFERENTIAL INPUT,
8192-POINT DATA RECORD)
MAX1183 toc05
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE (dB)
IM2IM3IM3IM2
fCLK = 40.0006MHz
fIN1 = 11.6066MHz
fIN2 = 13.3834MHz
AIN1 = AIN2 = -6.5dBFSfIN2
fIN1
SIGNAL-TO-NOISE RATIO vs.
ANALOG INPUT FREQUENCYANALOG INPUT FREQUENCY (MHz)
SNR (dB)
MAX1183 toc061020304050607080
CHB
CHA
SIGNAL-TO-NOISE PLUS DISTORTION
vs. ANALOG INPUT FREQUENCYANALOG INPUT FREQUENCY (MHz)
SINAD (dB)
MAX1183 toc071020304050607080
CHB
CHA
TOTAL HARMONIC DISTORTION vs.
ANALOG INPUT FREQUENCYANALOG INPUT FREQUENCY (MHz)
THD (dBc)
MAX1183 toc081020304050607080
CHA
CHB
SPURIOUS-FREE DYNAMIC RANGE vs.
ANALOG INPUT FREQUENCYANALOG INPUT FREQUENCY (MHz)
SFDR (dBc)
MAX1183 toc091020304050607080
CHA
CHB101001000
FULL-POWER INPUT BANDWIDTH vs.
ANALOG INPUT FREQUENCY, SINGLE-ENDEDMAX1183 toc10
GAIN (dB)101001000
SMALL-SIGNAL INPUT BANDWIDTH vs.
ANALOG INPUT FREQUENCY, SINGLE-ENDEDMAX1183 toc11
GAIN (dB)
VIN = 100mVP-P
SIGNAL-TO-NOISE RATIO vs.
ANALOG INPUT POWER (fIN = 19.888MHz)
MAX1183 toc12
SNR (dB)
Typical Operating Characteristics (continued)
(VDD= 3V, OVDD= 2.5V, VREFIN= 2.048V, differential input at -0.5dBFS, fCLK= 40.0006MHz, CL≈10pF, TA= +25°C, unless
otherwise noted.)
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel OutputsSIGNAL-TO-NOISE PLUS DISTORTION vs.
ANALOG INPUT POWER (fIN = 19.888MHz)
MAX1183 toc13
ANALOG INPUT POWER (dBFS)
SINAD (dB)
TOTAL HARMONIC DISTORTION vs.
ANALOG INPUT POWER (fIN = 19.888MHz)
ANALOG INPUT POWER (dBFS)
THD (dBc)
MAX1183 toc14
SPURIOUS-FREE DYNAMIC RANGE vs.
ANALOG INPUT POWER (fIN = 19.888MHz)
ANALOG INPUT POWER (dBFS)
SFDR (dBc)
MAX1183 toc15
INTEGRAL NONLINEARITY
MAX1183 toc16
DIGITAL OUTPUT CODE
INL (LSB)
DIFFERENTIAL NONLINEARITY
MAX1183 toc17
DIGITAL OUTPUT CODE
DNL (LSB)
GAIN ERROR vs. TEMPERATURE
MAX1183 toc18
TEMPERATURE (°C)
GAIN ERROR (% FS)-153560
CHB
CHA
OFFSET ERROR vs. TEMPERATURE
MAX1183 toc19
OFFSET ERROR (% FS)-153560
CHB
CHA
ANALOG SUPPLY CURRENT vs.
ANALOG SUPPLY VOLTAGE
MAX1183 toc20
IVDD
(mA)
ANALOG SUPPLY CURRENT vs.
TEMPERATURE
MAX1183 toc21
IVDD
(mA)
ypical Operating Characteristics (continued)(VDD= 3V, OVDD= 2.5V, VREFIN= 2.048V, differential input at -0.5dBFS, fCLK= 40.0006MHz, CL≈10pF, TA= +25°C, unless
otherwise noted.)
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel OutputsANALOG POWER-DOWN CURRENT vs.
ANALOG SUPPLY VOLTAGE
MAX1183 toc22
VDD (V)
IVDD
OE = PD = OVDD
SNR/SINAD, -THD/SFDR vs.
CLOCK DUTY CYCLECLOCK DUTY CYCLE (%)
SNR/SINAD, -THD/SFDR (dB, dBc)
MAX1183 toc233540455055606570
SINAD
SNR
SFDR
-THD
fINA = 7.5343MHz
fINB = 6.1475MHz
INTERNAL REFERENCE VOLTAGE vs.
ANALOG SUPPLY VOLTAGE
MAX1183 toc24
VDD (V)
REFOUT
(V)
INTERNAL REFERENCE VOLTAGE vs.
TEMPERATURE
MAX1183 toc25
TEMPERATURE (°C)
REFOUT
(V)-153560
21,000
14,000
7,000
28,000
35,000
42,000
49,000
56,000
63,000
70,000
OUTPUT NOISE HISTOGRAM (DC INPUT)MAX1183 toc26
DIGITAL OUTPUT CODE
COUNTS
64,515
N-1
N+1
N+2
N-2
Typical Operating Characteristics (continued)(VDD= 3V, OVDD= 2.5V, VREFIN= 2.048V, differential input at -0.5dBFS, fCLK= 40.0006MHz, CL≈10pF, TA= +25°C, unless
otherwise noted.)
MAX1183
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
Pin Description
PINNAMEFUNCTIONCOMCommon-Mode Voltage Input/Output. Bypass to GND with a ≥ 0.1µF capacitor.
2, 6, 11,
14, 15VDDAnalog Supply Voltage. Bypass each supply pin to GND with a 0.1µF capacitor.
The analog supply accepts an input range of 2.7V to 3.6V.
3, 7, 10,
13, 16GNDAnalog GroundINA+Channel A Positive Analog Input. For single-ended operation connect signal source to INA+.INA-Channel A Negative Analog Input. For single-ended operation connect INA- to COM.INB-Channel B Negative Analog Input. For single-ended operation connect INB- to COM.INB+Channel B Positive Analog Input. For single-ended operation connect signal source to INB+.CLKConverter Clock InputT/B
T/B selects the ADC digital output format.
High: Two’s complement.
Low: Straight offset binary.SLEEP
Sleep Mode Input.
High: Deactivates the two ADCs, but leaves the reference bias circuit active.
Low: Normal operation.PD
Power-Down Input.
High: Power-down mode.
Low: Normal operation.OE
Output Enable Input.
High: Digital outputs disabled.
Low: Digital outputs enabled.D9BThree-State Digital Output, Bit 9 (MSB), Channel BD8BThree-State Digital Output, Bit 8, Channel BD7BThree-State Digital Output, Bit 7, Channel BD6BThree-State Digital Output, Bit 6, Channel BD5BThree-State Digital Output, Bit 5, Channel BD4BThree-State Digital Output, Bit 4, Channel BD3BThree-State Digital Output, Bit 3, Channel BD2BThree-State Digital Output, Bit 2, Channel BD1BThree-State Digital Output, Bit 1, Channel BD0BThree-State Digital Output, Bit 0 (LSB), Channel B
31, 34OGNDOutput Driver Ground
32, 33OVDDOutput Driver Supply Voltage. Bypass each supply pin to OGND with a 0.1µF capacitor.
The output driver supply accepts an input range of 1.7V to 3.6V.D0AThree-State Digital Output, Bit 0 (LSB), Channel AD1AThree-State Digital Output, Bit 1, Channel AD2AThree-State Digital Output, Bit 2, Channel AD3AThree-State Digital Output, Bit 3, Channel AD4AThree-State Digital Output, Bit 4, Channel AD5AThree-State Digital Output, Bit 5, Channel A
