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MAX117CAI+ |MAX117CAIMAXN/a709avai+3V, 400ksps, 4/8 Channel, 8-Bit ADCs with 1µA Power Down


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MAX117CAI+
+3V, 400ksps, 4/8 Channel, 8-Bit ADCs with 1µA Power Down
_______________General Description
The MAX113/MAX117 are microprocessor-compatible,
8-bit, 4-channel and 8-channel analog-to-digital con-
verters (ADCs). They operate from a single +3V supply
and use a half-flash technique to achieve a 1.8μs con-
version time (400ksps). A power-down pin (PWRDN)
reduces current consumption to 1μA typical. The
devices return from power-down mode to normal oper-
ating mode in less than 900ns, allowing large supply-
current reductions in burst-mode applications. (In burst
mode, the ADC wakes up from a low-power state at
specified intervals to sample the analog input signals.)
Both converters include a track/hold, enabling the ADC
to digitize fast analog signals.
Microprocessor (μP) interfaces are simplified because
the ADC can appear as a memory location or I/O port
without external interface logic. The data outputs use
latched, three-state buffer circuitry for direct connection
to an 8-bit parallel μP data bus or system input port.
The MAX113/MAX117 input/reference configuration
enables ratiometric operation.
The 4-channel MAX113 is available in a 24-pin DIP or
SSOP. The 8-channel MAX117 is available in a 28-pin
DIP or SSOP. For +5V applications, refer to the
MAX114/MAX118 data sheet.
________________________Applications

Battery-Powered SystemsPortable Equipment
System-Health MonitoringRemote Data Acquisition
Communications Systems
____________________________Feature
+3.0V to +3.6V Single-Supply Operation 4 (MAX113) or 8 (MAX117) Analog Input ChannelsLow Power:1.5mA (operating mode)
1μA (power-down mode)
Total Unadjusted Error ≤1LSBFast Conversion Time: 1.8μs per ChannelNo External Clock RequiredInternal Track/HoldRatiometric Reference InputsInternally Connected 8th Channel Monitors
Reference Voltage (MAX117)V, 400ksps, 4/8-Channe-Bit ADCs with 1μA Power-Dow

4-BIT
DAC
4-BIT
FLASH
ADC
(4MSBs)
4-BIT
FLASH
ADC
(4LSBs)
TIMING AND
CONTROL
ADDRESS
LATCH
DECODEREF+
THREE-
STATE
OUTPUT
DRIVERS
MUX
*IN7
*IN8
REF+
*IN6
*IN5
IN4
IN3
IN2
IN1A1A2REF-PWRDNRD
MODEINTWR/RDY
MAX113/MAX117
*MAX117 ONLY
_________________________________________________________Functional Diagram

19-1081; Rev 1; 8/96
PART
MAX113CNG

MAX113CAG
MAX113C/D0°C to +70°C
0°C to +70°C
0°C to +70°C
TEMP. RANGEPIN-PACKAGE

24 Narrow Plastic DIP
24 SSOP
Dice*
______________Ordering Information

MAX113ENG
MAX113EAG
MAX113MRG-55°C to +125°C
-40°C to +85°C
-40°C to +85°C24 Narrow Plastic DIP
24 SSOP
24 Narrow CERDIP**
Ordering Information continued at end of data sheet.

*Dice are specified at TA= +25°C, DC parameters only.
**Contact factory for availability.
Pin Configuration appears at end of data sheet.
3V, 400ksps, 4/8-Channel, -Bit ADCs with 1μA Power-DownABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VDD= +3V to +3.6V, REF+ = 3V, REF- = GND, Read Mode (MODE = GND), TA= TMINto TMAX, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND..............................................................-0.3V to +7V
Digital Input Voltage to GND......................-0.3V to (VDD+ 0.3V)
Digital Output Voltage to GND...................-0.3V to (VDD+ 0.3V)
REF+ to GND..............................................-0.3V to (VDD+ 0.3V)
REF- to GND...............................................-0.3V to (VDD+ 0.3V)
IN_ to GND.................................................-0.3V to (VDD+ 0.3V)
Continuous Power Dissipation (TA= +70°C)
24 Narrow Plastic DIP
(derate 13.33mW/°C above +70°C)................................1.08W
24 SSOP (derate 8.00mW/°C above +70°C).................640mW
24 Narrow CERDIP (derate 12.50mW/°C above +70°C).....1W
28 Wide Plastic DIP
(derate 14.29mW/°C above +70°C)................................1.14W
28 SSOP (derate 9.52mW/°C above +70°C).................762mW
28 Wide CERDIP (derate 16.67mW/°C above +70°C)....1.33W
Operating Temperature Ranges
MAX113C_G/MAX117C_I....................................0°C to +70°C
MAX113E_G/MAX117E_I..................................-40°C to +85°C
MAX113MRG/MAX117MJI..............................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
VIN_= 3Vp-p
MAX11_M, fSAMPLE= 340kHz, fIN= 30.725kHz
GND < VIN_< VDD
MAX11_C/E, fSAMPLE= 400kHz, fIN= 30.273kHz
No-missing-codes guaranteed
CONDITIONS
VREF-VDDREF+ Input Voltage Range124RREFReference Resistance32CIN_Input Capacitance±3IIN_Input Leakage CurrentVREF-VREF+VIN_Input Voltage Range
V/μs0.280.5Input Slew Rate, Tracking
LSB±1TUETotal Unadjusted Error
Bits8NResolution
MHz0.3Input Full-Power Bandwidth45SINADSignal-to-Noise Plus
Distortion Ratio
LSB±1DNLDifferential Nonlinearity
LSB±1Zero-Code Error
LSB±1Full-Scale Error
LSB±1/4Channel-to-Channel Mismatch
UNITSMINTYPMAXSYMBOLPARAMETER

MAX11_M, fSAMPLE= 340kHz, fIN= 30.725kHz
MAX11_C/E, fSAMPLE= 400kHz, fIN= 30.273kHzdB-50THDTotal Harmonic Distortion-50
MAX11_M, fSAMPLE= 340kHz, fIN= 30.725kHz
MAX11_C/E, fSAMPLE= 400kHz, fIN= 30.273kHzdB50SFDRSpurious-Free Dynamic
RangeGNDVREF+REF- Input Voltage Range
ACCURACY (Note 1)
DYNAMIC PERFORMANCE
ANALOG INPUT
REFERENCE INPUT
V, 400ksps, 4/8-Channe-Bit ADCs with 1μA Power-DowELECTRICAL CHARACTERISTICS (continued)
(VDD= +3V to +3.6V, REF+ = 3V, REF- = GND, Read Mode (MODE = GND), TA= TMINto TMAX, unless otherwise noted.)
Note 1:
Accuracy measurements performed at VDD= +3.0V. Operation over supply range is guaranteed by power-supply rejection test.
Note 2:
Guaranteed by design.
Note 3:
Power-down current increases if logic inputs are not driven to GND or VDD.
CS, RD, PWRDN, A0, A1, A2±3IINH
D0–D7, RDY
D0–D7, RDY, digital outputs = 0V to VDD
ISOURCE= 20μA, INT, D0–D7
ISINK= 400μA, INT, D0–D7
MODE
MODE
ISINK= 20μA, INT, D0–D7
CS, WR, RD, PWRDN, A0, A1, A2
CS, WR, RD, PWRDN, MODE, A0, A1, A2
CS, WR, RD, PWRDN, MODE, A0, A1, A2
CONDITIONS

Input High CurrentCOUTILKG
Three-State Capacitance
(Note 2)
VDD- 0.10.4VOLOutput Low Voltage
0.158CINInput Capacitance (Note 2)±1IINLInput Low Current1002.4VINHInput High Voltage
MODE
CS, WR, RD, PWRDN, A0, A1, A2V
UNITSMINTYPMAXSYMBOLPARAMETER

0.8VINLInput Low Voltage0.66
2.553.03.6VDDSupply Voltage
VDD= 3.0V to 3.6V, VREF= 3.0V= RD= VDD, PWRDN= 0V (Note 3)
LSB±1/16±1/4PSRPower-Supply Rejection110Power-Down VDDCurrent
VDD= 3.6V, CS= RD= 0V,
PWRDN= VDD2.56
MAX11_C
RDY, ISINK= 1mA0.4
ISOURCE= 400μA, INT, D0–D7VVDD- 0.4VOHOutput High Voltage
1.53VDD= 3.0V, CS= RD= 0V,
PWRDN= VDD
IDDVDDSupply CurrentMAX11_E/M
MAX11_C
MAX11_E/M8
LOGIC INPUTS
LOGIC OUTPUTS
POWER REQUIREMENTS
Three-State Current
3V, 400ksps, 4/8-Channel, -Bit ADCs with 1μA Power-DownTIMING CHARACTERISTICS
(VDD= +3V, TA= +25°C, unless otherwise noted.) (Note 4)
Note 4:
Input control signals are specified with tr = tf= 5ns, 10% to 90% of 3V, and timed from a voltage level of 1.3V. Timing
delays get shorter at higher supply voltages. See the Conversion Time vs. Supply Voltage graph in the Typical Operating
Characteristicsto extrapolate timing delays at other power-supply voltages.
Note 5:
See Figure 1 for load circuit. Parameter defined as the time required for the output to cross 0.66V or 2.0V.
Note 6:
See Figure 2 for load circuit. Parameter defined as the time required for the data lines to change 0.5V.
Note 7:
Also defined as the Minimum Address-Valid to Convert-Start Time.
0.8100.6610WRPulse WidthtWR0.610μs
700Minimum
Acquisition Time tACQ450ns(Note 7)600
MAX117M
MINMAXMINTYPMAX
PARAMETERSYMBOL
MINMAX
UNITSCONDITIONSMAX117C/E= +25°C
ALL GRADES= TMINto TMAX

250Data Access Time
(WR-RD Mode)tACC2180nstRD> tINTL, CL= 100pF
(Note 5)220
Data Access Time
After INTtID
Delay Between WR
and RDPulsestRD0.8μsPulse Width
(WR-RD Mode)tREAD1400ns
100ns
Multiplexer Address
Hold Time
Data Access Time
(WR-RD Mode)tACC1400nsto INTDelaytRI300nsto INTDelaytINTL0.71.45μs
tAH50ns
Pipelined mode, CL= 100pFPulse Width
(WR-RD Mode)tREAD2180nsto INTDelaytIHWR180ns
tRD> tINTL, determined by
tACC2
tRD< tINTL, determined by
tACC1
500tRD< tINTL, CL= 100pF
(Note 5)
340= 50pF
Pipelined mode, CL= 50pF
tCRD+
tCRD+
Data Hold TimetDH100nsto RD, WR
Setup TimetCSS0nsto RD, WR
Hold TimetCSH0nsto RDY DelaytRDY100ns
(Note 6)
Data Access Time
(RD Mode)tACC0tCRD+
100nsto INTDelay
(RD Mode)tINTH100160ns= 100pF (Note 5)= 50pF,= 5.1kΩto VDD= 50pF
2.42.06Conversion Time
(WR-RD Mode)tCWR1.8μstRD< tINTL, CL= 100pF
(Note 5)
1.41.2Power-Up TimetUP0.9μs
2.62.4Conversion Time
(RD Mode)tCRD2.0μs
V, 400ksps, 4/8-Channe-Bit ADCs with 1μA Power-DowCONVERSION TIME
vs. AMBIENT TEMPERATURE
TEMPERATURE (°C)
(N
, +
VDD = 3.3V
VDD = 3.6V
VDD = 3.0V
AX113/117-01
4.010k100k
EFFECTIVE BITS vs.
INPUT FREQUENCY (WR-RD MODE)

INPUT FREQUENCY (Hz)
fSAMPLE = 400kHz
VIN = 2.98Vp-p
AX113/117-02
SIGNAL-TO-NOISE RATIO
FREQUENCY (kHz)
(d
AX113/117-03
fIN = 30.27kHz
VIN = 2.88Vp-p
fSAMPLE = 400ksps
SNR = 48.8dB
CONVERSION TIME
vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
(n
MAX113/117-044
AVERAGE POWER CONSUMPTION
vs. SAMPLING RATE USING PWRDN

SAMPLING RATE (ksps)
(m
AX113/117-06
TOTAL UNADJUSTED ERROR
vs. POWER-UP TIME
AX113/117-08
tUP (ns)
(L
VDD = 3.0V
VDD = 3.6V
__________________________________________Typical Operating Characteristic

(VDD= +3V, TA = +25°C, unless otherwise noted.)
VDD = 5.25V
SUPPLY CURRENT vs. TEMPERATURE
(EXCLUDING REFERENCE CURRENT)
MAX113/117-10
TEMPERATURE (°C)
(100-2020
VDD = 3.3V
VDD = 3.0V
3V, 400ksps, 4/8-Channel, -Bit ADCs with 1μA Power-Down______________________________________________________________Pin Description
Mode Selection Input. Internally pulled low with a 15μA current source. MODE = 0
activates read mode; MODE = 1 activates write-read mode (see Digital Interface
section).
MODE5
Analog Input Channel 6IN6—
FUNCTION

Three-State Data Outputs D1, D2, D37, 8, 9
Three-State Data Output (LSB)D06
Lower limit of reference span. REF- sets the zero-code voltage. Range is GND ≤
VREF-< VREF+.REF-13
GroundGND12
Interrupt Output. INTgoes low to indicate end of conversion (see Digital Interface
section).INT11
Read Input. RDmust be low to access data (see Digital Interfacesection).RD10
Write-Control Input/Ready-Status Output (see Digital Interfacesection)WR/RDY15
Upper limit of reference span. REF+ sets the full-scale input voltage. Range is
VREF-< VREF+≤VDD. Internally hardwired to IN8 (Table 1).REF+14
Multiplexer Channel Address Input (MSB)A2—
Three-State Data Output (MSB)D720
Positive Supply, +3.0V to +3.6VVDD24
Power-Down Input. PWRDNreduces supply current when low.PWRDN23
Multiplexer Channel Address Input (LSB)A022
Multiplexer Channel Address Input A121
Analog Input Channel 7IN7—
Three-State Data Outputs D4, D5, D617, 18, 19
Chip-Select Input. CSmust be low for the device to recognize WRor RDinputs.CS16
9, 10, 11
PIN

19, 20, 21
MAX113NAMEMAX117

Analog Input Channel 5IN5—2
Analog Input Channel 1
Analog Input Channel 2IN23
IN16
Analog Input Channel 3
Analog Input Channel 4IN41
IN34
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