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MAX1169BCUD+N/AN/a2500avai58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP
MAX1169CCUD+N/AN/a2500avai58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP


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MAX1169BCUD+-MAX1169CCUD+
58.6ksps, 16-Bit, 2-Wire Serial ADC in a 14-Pin TSSOP
MAX1169
58.6ksps, 16-Bit,
2-Wire Serial ADC in a 14-Pin TSSOP

19-2654; Rev 2; 12/10
General Description

The MAX1169 is a low-power, 16-bit successive-
approximation analog-to-digital converter (ADC). The
device features automatic power-down, an on-chip
4MHz clock, a +4.096V internal reference, and an
I2C-compatible 2-wire serial interface capable of both
fast and high-speed modes.
The MAX1169 operates from a single supply and con-
sumes 5mW at the maximum conversion rate of
58.6ksps. AutoShutdown™ powers down the device
between conversions, reducing supply current to less
than 50µA at a 1ksps throughput rate. The option of a
separate digital supply voltage allows direct interfacing
with +2.7V to +5.5V digital logic.
The MAX1169 performs a unipolar conversion on its
single analog input using its internal 4MHz clock. The
full-scale analog input range is determined by the inter-
nal reference or by an externally applied reference volt-
age ranging from 1V to VAVDD.
The four address select inputs (ADD0 to ADD3) allow
up to 16 MAX1169 devices on the same bus.
The MAX1169 is packaged in a 14-pin TSSOP and
operates over an extended temperature range. Refer to
the MAX1069 data sheet for a 14-bit device in a pin-
compatible package.
Applications

Hand-Held Portable Applications
Medical Instruments
Battery-Powered Test Equipment
Solar-Powered Remote Systems
Received-Signal-Strength Indicators
System Supervision
Features
High-Speed I2C-Compatible Serial Interface
400kHz Fast Mode
1.7MHz High-Speed Mode
+4.75V to +5.25V Single Supply+2.7V to +5.5V Adjustable Logic LevelInternal +4.096V ReferenceExternal Reference: 1V to VAVDDInternal 4MHz Conversion Clock58.6ksps Sampling RateAutoShutdown Between ConversionsLow Power
5.0mW at 58.6ksps
4.2mW at 50ksps
2.0mW at 10ksps
0.23mW at 1ksps
3µW in Shutdown
Small 14-Pin TSSOP Package
Ordering Information
PARTTEMP RANGEPIN-
PACKAGE
INL
(LSB)

MAX1169BEUD+ -40°C to +85°C 14 TSSOP ±2
ADD3
REF
REFADJ
AGNDSADD2
SDA
SCL
DGND
TOP VIEW
MAX1169
AIN
AGND
AVDDDVDD
ADD0
ADD1
TSSOP
Pin Configuration

AutoShutdown is a trademark of Maxim Integrated Products, Inc.
+Denotes a lead(Pb)-free/RoHS-compliant package.
EVALUATION KIT
AVAILABLE
MAX1169
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVDDto AGND.........................................................-0.3V to +6V
DVDDto DGND........................................................-0.3V to +6V
AGND to DGND.....................................................-0.3V to +0.3V
AGNDS to AGND...................................................-0.3V to +0.3V
AIN, REF, REFADJ to AGND..................-0.3V to (VAVDD+ 0.3V)
SCL, SDA, ADD_ to DGND.......................................-0.3V to +6V
Maximum Current into Any Pin............................................50mA
Continuous Power Dissipation (TA= +85°C)
14-Pin TSSOP (derate 9.1mW/°C above +85°C).........864mW
Operating Temperature Ranges
MAX1169_EUD................................................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
ELECTRICAL CHARACTERISTICS

(VAVDD= +4.75V to +5.25V, VDVDD= +2.7V to +5.5V, fSCL= 1.7MHz (33% duty cycle), fSAMPLE= 58.6ksps, VREF= +4.096V, external
reference applied to REF, REFADJ = AVDD, CREF= 10µF, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DC ACCURACY (Note 1)

Resolution 16 Bits
Relative Accuracy (Note 2) INL MAX1169B ±2 LSB
Differential Nonlinearity DNL MAX1169B, no missing codes 16-bit
NMC 0.7 1.7 LSB
Offset Error 2 5 mV
Offset-Error Temperature
Coefficient 1.0 ppm/°C
Gain Error (Note 3) ±0.25 ±0.5 %FSR
Gain Temperature Coefficient 0.1 ppm/°C
DYNAMIC PERFORMANCE (fIN(sine wave) = 1kHz, VIN = VREF(P-P), fSAMPLE = 58.6ksps)

Signal-to-Noise Plus Distortion SINAD 86 90 dB
Total Harmonic Distortion THD Up to the 5th harmonic -102 -90 dB
Spurious-Free Dynamic Range SFDR 92 105 dB
Signal-to-Noise Ratio SNR 87 90 dB
Full-Power Bandwidth FPBW -3dB point 4 MHz
Full-Linear Bandwidth SINAD > 81dB 33 kHz
CONVERSION RATE (Figure 11)

Fast mode 7.1 7.5 Conversion Time
(SCL Stretched Low) tCONVHigh-speed mode 5.8 6 μs
Fast mode 19 Throughput Rate (Note 4) fSAMPLE High-speed mode 58.6 ksps
Internal Clock Frequency fCLK 4 MHz
Track/Hold Acquisition Time tACQ (Note 5) 1100 ns
Fast mode50Aperture Delay, Figure 11c
(Note 6)tADHigh-speed mode30ns
MAX1169
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
ELECTRICAL CHARACTERISTICS (continued)

(VAVDD= +4.75V to +5.25V, VDVDD= +2.7V to +5.5V, fSCL= 1.7MHz (33% duty cycle), fSAMPLE= 58.6ksps, VREF= +4.096V, external
reference applied to REF, REFADJ = AVDD, CREF= 10µF, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Fast mode 100Aperture Jitter, Figure 11c tAJ High-speed mode 100ps
ANALOG INPUT (AIN)

Input Voltage Range VAIN 0 VREF V
Input Leakage Current On/off-leakage current, VAIN = 0V or VAVDD,
no clock, fSCL = 0 ±0.01 ±10 μA
Input Capacitance CIN 35 pF
INTERNAL REFERENCE (bypass REFADJ with 0.1μF to AGND and REF with 10μF to AGND)

REF Output Voltage VREF 4.056 4.096 4.136 V
Reference Temperature
Coefficient TCREF TA= -40°C to +85°C ±35 ppm/°C
Reference Short-Circuit Current IREFSC 10 mA
REFADJ Output Voltage 4.0564.096 4.136V
REFADJ Input Range For small adjustments, from 4.096V ±60 mV
EXTERNAL REFERENCE (REFADJ = AVDD)

REFADJ Buffer Disable Voltage Pull REFADJ high to disable the internal
bandgap reference and reference buffer
VAVDD
- 0.1 V
REFADJ Buffer Enable Voltage VAVDD
- 0.4 V
Reference Input Voltage Range (Note 7) 1.0 VAVDD V
VREF = +4.096V, VIN = VREF(P-P),
fIN(sine wave) = 1kHz, fSAMPLE = 58.6ksps 27 REF Input Current IREF
VREF = +4.096V, shutdown 0.1
μA
DIGITAL INPUTS/OUTPUTS(SCL, SDA)

Input High Voltage VIH 0.7 
VDVDD V
Input Low Voltage VIL 0.3 
VDVDDV
Input Hysteresis VHYST 0.1 
VDVDD V
Input Current IIN ±10 μA
Input Capacitance CIN 15 pF
Output Low Voltage VOL ISINK = 3mA 0.4 V
ADDRESS SELECT INPUTS(ADD3, ADD2, ADD1, ADD0)

Input High Voltage 0.7 
VDVDD V
Input Low Voltage 0.3 
VDVDDV
Input Hysteresis 0.1 
VDVDD V
MAX1169
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
ELECTRICAL CHARACTERISTICS (continued)

(VAVDD= +4.75V to +5.25V, VDVDD= +2.7V to +5.5V, fSCL= 1.7MHz (33% duty cycle), fSAMPLE= 58.6ksps, VREF= +4.096V, external
reference applied to REF, REFADJ = AVDD, CREF= 10µF, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Input Current ±10 μA
Input Capacitance 15pf
POWER REQUIREMENTS (AVDD, AGND, DVDD, DGND)

Analog Supply Voltage AVDD 4.75 5.25 V
Digital Supply Voltage DVDD 2.7 5.5 V
fSAMPLE = 58.6ksps 1.82.5
fSAMPLE = 10ksps 0.7mA
fSAMPLE = 1ksps 40
Internal reference
(powered down
between conversions,
R/W = 0) Shutdown 0.45μA
fSAMPLE = 58.6ksps 1.82.5
fSAMPLE = 10ksps 1.4mA
fSAMPLE = 1ksps 1.1
Internal reference
(always on, R/W = 1)
Shutdown 0.45
μA
fSAMPLE = 58.6ksps 0.901.8
fSAMPLE = 10ksps 0.36mA
fSAMPLE = 1ksps 40
Analog Supply Current IAVDD
External reference
(REFADJ = AVDD)
Shutdown 0.45μA
fSAMPLE = 58.6ksps 260400
fSAMPLE = 10ksps 65
fSAMPLE = 1ksps 6Digital Supply Current IDVDD
Shutdown 0.25
μA
Power-Supply Rejection Ratio PSRR VAVDD = 5V ±5%, full-scale input (Note 8) 516LSB/V
TIMING CHARACTERISTICS FOR 2-WIRE FAST MODE (Figure 1a and Figure 2)

Serial Clock Frequency fSCL 400 kHz
Bus Free Time Between a STOP
and a START Condition tBUF 1.3 μs
Hold Time for Start Condition tHD, STA 0.6 μs
Low Period of the SCL Clock tLOW 1.3 μs
High Period of the SCL Clock tHIGH 0.6 μs
Setup Time for a Repeated
START Condition (Sr) tSU, STA 0.6 μs
Data Hold Time tHD, DAT (Note 9) 0 900 ns
Data Setup Time tSU, DAT 100 ns
Rise Time of Both SDA and SCL
Signals, Receiving tR (Note 10) 20 + 0.1CB 300 ns
Fall Time of SDA Transmitting tF (Note 10) 20 + 0.1CB 300 ns
Setup Time for STOP Condition tSU, STO 0.6 μs
Capacitive Load for Each Bus CB 400 pF
Pulse Width of Spike Suppressed tSP 50 ns
MAX1169
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
Note 1:
DC accuracy is tested at VAVDD= +5.0V and VDVDD= +3.0V. Performance at power-supply tolerance limits is guaranteed
by power-supply rejection test.
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and
offset have been calibrated.
Note 3:
Offset nullified.
Note 4:
One sample is achieved every 18 clocks in continuous conversion mode:
Note 5:
The track/hold acquisition time is two SCL cycles as illustrated in Figure 11:
Note 6:
A filter on SDA and SCL delays the sampling instant and suppresses noise spikes less than 10ns in high-speed mode and
50ns in fast mode.
Note 7:
ADC performance is limited by the converter’s noise floor, typically 225µVP-P.
Note 8:

PSRR(5.25V)-V(4.75V)2
5.25VFS
REF=⎣⎤⎦×-4.75VwhereNisthenumberofbits().161ACQSCL=×⎛⎜⎟1clockstSAMPLESCLC+⎛⎜⎟8
ONV
ELECTRICAL CHARACTERISTICS (continued)

(VAVDD= +4.75V to +5.25V, VDVDD= +2.7V to +5.5V, fSCL= 1.7MHz (33% duty cycle), fSAMPLE= 58.6ksps, VREF= +4.096V, external
reference applied to REF, REFADJ = AVDD, CREF= 10µF, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
TIMING CHARACTERISTICS FOR 2-WIRE HIGH-SPEED MODE (Figure 1b and Figure 2)

Serial Clock Frequency fSCLH (Note 11) 1.7 MHz
Hold Time (Repeated) Start
Condition tHD, STA 160 ns
Low Period of the SCL Clock tLOW 320 ns
High Period of the SCL Clock tHIGH 120 ns
Setup Time for a Repeated
START Condition tSU, STA 160 ns
Data Hold Time tHD, DAT (Note 9) 0 150 ns
Data Setup Time tSU, DAT 10 ns
Rise Time of SCL Signal
(Current Source Enabled) tRCL (Note 10) 10 80 ns
Rise Time of SCL Signal After
Acknowledge Bit tRCL1 (Note 10) 20 160 ns
Fall Time of SCL Signal tFCL (Note 10) 20 80 ns
Rise Time of SDA Signal tRDA (Note 10) 20 160 ns
Fall Time of SDA Signal tFDA (Note 10) 20 160 ns
Setup Time for STOP Condition tSU, STO 160 ns
Capacitive Load for Each Bus CB 400 pF
Pulse Width of Spike Suppressed tSP 10 ns
MAX1169
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
Note 9:
A master device must provide a data hold time for SDA (referred to VILof SCL) in order to bridge the undefined region of
SCL’s falling edge (see Figure 1).
Note 10:
CB= total capacitance of one bus line in pF. tRand tFmeasured between 0.3 ✕VDVDDand 0.7 ✕VDVDD.
Note 11:
fSCLmust meet the minimum clock low time plus the rise/fall times.
ELECTRICAL CHARACTERISTICS (continued)

(VAVDD= +4.75V to +5.25V, VDVDD= +2.7V to +5.5V, fSCL= 1.7MHz (33% duty cycle), fSAMPLE= 58.6ksps, VREF= +4.096V, external
reference applied to REF, REFADJ = AVDD, CREF= 10µF, TA= TMINto TMAX, unless otherwise noted. Typical values are at TA= +25°C.)
Figure 1. I2C Serial Interface Timing
tHD,STA
tHD,STA
tHIGH
tHIGH
tRCL
tFCL
tHD,STASrA
SCL
SDA
tSU,STAtSU,STO
tSU,STO
tRCL1tF
tBUF
tBUF
tLOW
tSU,DATtHD,DAT
tHD,DAT
tSU,DATtHD,STASrA
SCL
SDA
tSU,STAtLOWS
HS-MODEF/S-MODE
A. F/S-MODE I2C SERIAL INTERFACE TIMING
B. HS-MODE I2C SERIAL INTERFACE TIMINGtRDAtFDA
PARAMETERS ARE MEASURED FROM 30% TO 70%.
VOUT
VDD
IOL = 3mA
IOH = 0mA
400pF
DIGITAL
I/O
MAX1169
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
ANALOG SUPPLY CURRENT vs. ANALOG
SUPPLY VOLTAGE (INTERNAL REFERENCE)

MAX1169 toc01
VAVDD (V)
IAVDD
(mA)
VDVDD = 3V
TA = +85°C
TA = +70°C
TA = +25°C
TA = 0°C
TA = -40°C770
ANALOG SUPPLY CURRENT vs. ANALOG
SUPPLY VOLTAGE (EXTERNAL REFERENCE)
MAX1169 toc02
VAVDD (V)
IAVDD
VDVDD = 3V
TA = +85°C
TA = +70°C
TA = +25°C
TA = 0°C
TA = -40°C
DIGITAL SUPPLY CURRENT
vs. DIGITAL SUPPLY VOLTAGE

MAX1169 toc04
VDVDD (V)
IDVDD
VAVDD = 5V
TA = +85°C
TA = -40°C
OFFSET ERROR
vs. TEMPERATURE

MAX1169 toc06
OFFSET ERROR (35-1510
GAIN ERROR
vs. TEMPERATURE
MAX1169 toc07
GAIN ERROR (% FSR)35-1510
Typical Operating Characteristics
(VDVDD= +3.0V, VAVDD= +5.0V, fSCL= 1.7MHz (33% duty cycle), fSAMPLE= 58.6ksps, VREF= +4.096V, external reference applied
to REF, REFADJ = AVDD, CREF= 10µF, TA= +25°C, unless otherwise noted.)
DIGITAL SHUTDOWN CURRENT
vs. DIGITAL SUPPLY VOLTAGE

MAX1169 toc05
VDVDD (V)
IDVDD
(nA)
VAVDD = 5V
fSAMPLE = 0
R/W = 0
TA = +70°C
TA = +85°C
TA = +25°C
TA = 0°C
TA = -40°C
ANALOG SHUTDOWN CURRENT
vs. ANALOG SUPPLY VOLTAGE

MAX1169 toc03
VAVDD (V)
IAVDD
(nA)
TA = +85°C
TA = +70°C
TA = +25°C
TA = 0°C
TA = -40°C
VDVDD = 3V
fSAMPLE = 0
R/W = 0
MAX1169
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
Typical Operating Characteristics (continued)

(VDVDD= +3.0V, VAVDD= +5.0V, fSCL= 1.7MHz (33% duty cycle), fSAMPLE= 58.6ksps, VREF= +4.096V, external reference applied
to REF, REFADJ = AVDD, CREF= 10µF, TA= +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. CONVERSION RATE
(HIGH-SPEED MODE, INTERNAL REFERENCE)

MAX1169 toc08
CONVERSION RATE (ksps)
SUPPLY CURRENT (5030402010
INTERNAL REFERENCE, fSCL = 1.7MHz
IAVDD, R/W = 1
IAVDD, R/W = 0
IDVDD, R/W = 1 OR 0
SUPPLY CURRENT vs. CONVERSION RATE
(HIGH-SPEED MODE, EXTERNAL REFERENCE)
MAX1169 toc09
CONVERSION RATE (ksps)
SUPPLY CURRENT (5030402010070
EXTERNAL REFERENCE, fSCL = 1.7MHz
IDVDD, R/W = 1 OR 0
IAVDD, R/W = 1 OR 0
SUPPLY CURRENT vs. CONVERSION RATE
(FAST MODE, INTERNAL REFERENCE)

MAX1169 toc10
CONVERSION RATE (ksps)
SUPPLY CURRENT (15105
INTERNAL REFERENCE, fSCL = 400kHz
IAVDD, R/W = 1
IAVDD, R/W = 0
IDVDD, R/W = 1 OR 0100
SUPPLY CURRENT vs. CONVERSION RATE
(FAST MODE, EXTERNAL REFERENCE)
MAX1169 toc11
CONVERSION RATE (ksps)
SUPPLY CURRENT (15105025
EXTERNAL REFERENCE, fSCL = 400kHz
IDVDD, R/W = 1 OR 0
IAVDD, R/W = 1 OR 0
MAX1169
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
INTERNAL +4.096V REFERENCE VOLTAGE
vs. ANALOG SUPPLY VOLTAGE

MAX1169 toc12
VAVDD (V)
REF
(V)
VDVDD = 3V
TA = +85°C
TA = +70°C
TA = +25°C
TA = 0°C
TA = -40°C
INTERNAL REFERENCE VOLTAGE
vs. REF LOAD

MAX1169 toc13
IREF (mA)
REF
(V)4321
fSCL = 0
INTERNAL REFERENCE MODE
LOAD APPLIED TO REF4.15
EXTERNAL REFERENCE CURRENT
vs. EXTERNAL REFERENCE VOLTAGE

MAX1169 toc14
VREF (V)
REF432106
AIN = AGNDS
58.6ksps
fSCL = 1.7MHz
19ksps
fSCL = 400kHz
EXTERNAL REFERENCE CURRENT AND
REFERENCE VOLTAGE vs. VREFADJ

MAX1169 toc15
VREFADJ (V)
IREFADJ
REF
(V)
AIN = AGNDS
IREFADJ
VREF
Typical Operating Characteristics (continued)

(VDVDD= +3.0V, VAVDD= +5.0V, fSCL= 1.7MHz (33% duty cycle), fSAMPLE= 58.6ksps, VREF= +4.096V, external reference applied
to REF, REFADJ = AVDD, CREF= 10µF, TA= +25°C, unless otherwise noted.)
MAX1169
58.6ksps, 16-Bit, 2-Wire Serial ADC
in a 14-Pin TSSOP
Typical Operating Characteristics (continued)

(VDVDD= +3.0V, VAVDD= +5.0V, fSCL= 1.7MHz (33% duty cycle), fSAMPLE= 58.6ksps, VREF= +4.096V, external reference applied
to REF, REFADJ = AVDD, CREF= 10µF, TA= +25°C, unless otherwise noted.)
SPURIOUS-FREE DYNAMIC RANGE
vs. FREQUENCY

MAX1169 toc17
FREQUENCY (kHz)
SFDR (dB)
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
MAX1169 toc19
FREQUENCY (kHz)
THD (dB)
SINAD vs. FREQUENCY
MAX1169 toc20
FREQUENCY (kHz)
SINAD (dB)
2.032,76816,38449,15265,536
INTEGRAL NONLINEARITY
vs. DIGITAL OUTPUT CODE

MAX1169 toc21
DIGITAL OUTPUT CODE
INL (LSB)
FFT
MAX1169 toc22
FREQUENCY (kHz)
MAGNITUDE (dB)
fSAMPLE = 58.6ksps
fIN(SINE WAVE) = 1kHz
VIN = VREF(P-P)
SIGNAL-TO-NOISE RATIO
vs. FREQUENCY

MAX1169 toc16
FREQUENCY (kHz)
SNR (dB)
DIFFERENTIAL NONLINEARITY
vs. DIGITAL OUTPUT CODE
MAX1169 toc18
DIGITAL OUTPUT CODE
DNL (LSB)
49,15216,38432,768
-2.565,536
ic,good price


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