MAX1087ETA+T-MAX1089ETA+ Fast Delivery |IC PHOENIX CO.,LIMITED

MAX1087ETA+T ,150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 and TDFNApplicationsMAX1086ETA+T -40°C to +85°C 8 TDFN-EP* AFQLow Power Data AcquisitionMAX1087EKA-T -40°C ..
MAX1089EKA+T ,150ksps / 10-Bit / 2-Channel Single-Ended / and 1-Channel True-Differential ADCs in SOT23ELECTRICAL CHARACTERISTICS(V = +2.7V to +3.6V, V = +2.5V for MAX1087/MAX1089, or VDD = +4.75V to +5 ..
MAX1089ETA+ ,150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 and TDFNELECTRICAL CHARACTERISTICS(V = +2.7V to +3.6V, V = +2.5V for MAX1087/MAX1089, or VDD = +4.75V to +5 ..
MAX1090ACEI ,400ksps / +5V / 8-/4-Channel / 10-Bit ADCs with +2.5V Reference and Parallel InterfaceMAX1090/MAX109219-1640; Rev 0; 1/00400ksps, +5V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and ..
MAX1090BCEI+ ,400ksps, +5V, 8-/4-Channel, 10-Bit ADCs with +2.5V Reference and Parallel InterfaceFeaturesThe MAX1090/MAX1092 low-power, 10-bit analog-to-♦ 10-Bit Resolution, ±0.5 LSB Linearitydigi ..
MAX1090BEEI ,400ksps / +5V / 8-/4-Channel / 10-Bit ADCs with +2.5V Reference and Parallel InterfaceFeaturesThe MAX1090/MAX1092 low-power, 10-bit analog-to- 10-Bit Resolution, ±0.5LSB Linearitydigit ..
MAX339CEE+ ,8-Channel/Dual 4-Channel, Low-Leakage, CMOS Analog MultiplexersELECTRICAL CHARACTERISTICS—Dual Supplies(V+ = +15V, V- = -15V, V = 0V, V = +2.4V, V = +0.8V, T = T ..
MAX339CPE ,Dual 4-channel, low-leakage, CMOS analog multiplexer.ApplicationsMAX338MJE -55°C to +125°C 16 CERDIP**Data-Acquisition Systems Sample-and-Hold CircuitsO ..
MAX339CSE ,Dual 4-channel, low-leakage, CMOS analog multiplexer.ELECTRICAL CHARACTERISTICS—Dual Supplies(V+ = +15V, V- = -15V, GND = 0V, VAH = +2.4V, VAL = +0.8V, ..
MAX339CSE+ ,8-Channel/Dual 4-Channel, Low-Leakage, CMOS Analog MultiplexersGeneral DescriptionThe MAX338/MAX339 are monolithic, CMOS analog♦ On-Resistance, <400Ω maxmultiplex ..
MAX339EPE ,Dual 4-channel, low-leakage, CMOS analog multiplexer.General Description ________
MAX339EPE+ ,8-Channel/Dual 4-Channel, Low-Leakage, CMOS Analog MultiplexersMAX338/MAX33919-0272; Rev 4; 4/128-Channel/Dual 4-Channel,Low-Leakage, CMOS Analog Multiplexers____ ..

MAX1087ETA+T-MAX1089ETA+
150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 and TDFN
General Description
The MAX1086–MAX1089 are low-cost, micropower, ser-
ial output 10-bit analog-to-digital converters (ADCs)
available in a tiny 8-pin SOT23. The MAX1086/MAX1088
operate with a single +5V supply. The MAX1087/MAX1089
operate with a single +3V supply. The devices feature a
successive-approximation ADC, automatic shutdown,
fast wake-up (1.4µs), and a high-speed 3-wire inter-
face. Power consumption is only 0.5mW (VDD= +2.7V)
at the maximum sampling rate of 150ksps.
AutoShutdown™ (0.1µA) between conversions results in
reduced power consumption at slower throughput rates.
The MAX1086/MAX1087 provide 2-channel, single-
ended operation and accept input signals from 0 to
VREF. The MAX1088/MAX1089 accept true-differential
inputs ranging from 0 to VREF. Data is accessed using
an external clock through the 3-wire SPI™, QSPI™, and
MICROWIRE™-compatible serial interface. Excellent
dynamic performance, low-power, ease of use, and
small package size, make these converters ideal for
portable battery-powered data acquisition applications,
and for other applications that demand low power con-
sumption and minimal space.
Applications
Low Power Data Acquisition
Portable Temperature Monitors
Flowmeters
Touch Screens
FeaturesSingle-Supply Operation
+3V (MAX1087/MAX1089)
+5V (MAX1086/MAX1088)AutoShutdown Between ConversionsLow Power
200µA at 150ksps
130µA at 100ksps
65µA at 50ksps
13µA at 10ksps
1.5µA at 1ksps
0.2µA in ShutdownTrue-Differential Track/Hold, 150kHz Sampling RateSoftware-Configurable Unipolar/BipolarConversion (MAX1088/MAX1089 only) SPI, QSPI, MICROWIRE-Compatible Interface for
DSPs and ProcessorsInternal Conversion Clock8-Pin SOT23 and 8-Pin TDFN Packages
MAX1086–MAX1089
150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23 and TDFN
CNVST
REFGND
SCLK
DOUTAIN1 (AIN+)
AIN2 (AIN-)
VDD
SOT23
TOP VIEW
( ) ARE FOR THE MAX1088/MAX1089
MAX1086
MAX1087
MAX1088
MAX108945
SCLKCONVSTREF
MAX1086–
MAX1089
DOUT
AIN1AIN2GND
TDFN
Pin Configurations
19-2036; Rev 3; 8/10
Ordering Information
AutoShutdown is a trademark of Maxim Integrated Products.
SPI and QSPI are trademarks of Motorola Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
PARTTEMP
RANGE
PIN-
PACKAGE
TOP
MARK
MAX1086EKA-T -40°C to +85°C8 SOT23AAEZ
MAX1086ETA+T -40°C to +85°C8 TDFN-EP*AFQ
MAX1087EKA-T -40°C to +85°C8 SOT23AAEV
MAX1087ETA+T -40°C to +85°C8 TDFN-EP*AFM
MAX1088EKA-T -40°C to +85°C8 SOT23AAFB
MAX1088ETA+T -40°C to +85°C8 TDFN-EP*AFS
MAX1089EKA-T -40°C to +85°C8 SOT23AAEX
MAX1089ETA+T -40°C to +85°C8 TDFN-EP*AFO
*EP = Exposed pad.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
EVALUATION KITAVAILABLE
MAX1086–MAX1089
150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23 and TDFN
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD= +2.7V to +3.6V, VREF= +2.5V for MAX1087/MAX1089, or VDD= +4.75V to +5.25V, VREF= +4.096V for MAX1086/MAX1088,
0.1µF capacitor at REF, fSCLK= 8MHz (50% duty cycle), AIN- = GND for MAX1088/MAX1089. TA= TMINto TMAX,unless otherwise
noted. Typical values at TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDDto GND.............................................................-0.3V to +6V
CNVST, SCLK, DOUT to GND......................-0.3V to (VDD+0.3V)
REF, AIN1(AIN+), AIN2(AIN-) to GND..........-0.3V to (VDD+0.3V)
Maximum Current Into Any Pin...........................................50mA
Continuous Power Dissipation (TA= +70°C)
8-Pin SOT23 (derate 9.70mW/°C above TA= +70°C)......777mW
8-Pin TDFN (derate 18.2mW/°C above TA= +70°C)...1454.5mW
Operating Temperature Ranges.........................-40°C to +85°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow)
SOT23..........................................................................+240°C
TDFN............................................................................+260°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
DC ACCURACY (Note 1)
Resolution10Bits
Relative Accuracy (Note 2)INL±1.0LSB
Differential NonlinearityDNLNo missing codes over temperature±1.0LSB
Offset Error±0.5±1.0LSB
Gain Error (Note 3)±1.0±2.0LSB
Gain Temperature Coefficient±0.8ppm/°C
Channel-to-Channel Offset±0.1LSB
Channel-to-Channel Gain Matching±0.1LSB
Input Common-Mode RejectionCMRVCM = 0V to VDD; zero scale input±0.1mV
DYNAMIC SPECIFICATIONS: (fIN (sine-wave) = 10kHz, VIN = 4.096Vp-p for MAX1086/MAX1088 or VIN = 2.5VPP
for MAX1087/MAX1089, 150ksps, fSCLK = 8MHz, AIN- = GND for MAX1088/MAX1089)
Signal to Noise Plus DistortionSINAD61dB
Total Harmonic Distortion
(up to the 5th harmonic)THD-70dB
Spurious-Free Dynamic RangeSFDR70dB
Full-Power Bandwidth-3dB point1MHz
Full-Linear BandwidthSINAD > 56dB100kHz
CONVERSION RATE
Conversion TimetCONV3.7µs
T/H Acquisition TimetACQ1.4µs
Aperture Delay30ns
Aperture Jitter<50ps
Maximum Serial Clock FrequencyfSCLK8MHz
Duty Cycle3070%
MAX1086–MAX1089
150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23 and TDFN
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +2.7V to +3.6V, VREF= +2.5V for MAX1087/MAX1089, or VDD= +4.75V to +5.25V, VREF= +4.096V for MAX1086/MAX1088,
0.1µF capacitor at REF, fSCLK= 8MHz (50% duty cycle), AIN- = GND for MAX1088/MAX1089. TA= TMINto TMAX,unless otherwise
noted. Typical values at TA= +25°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
ANALOG INPUT
Unipolar0VREFInput Voltage Range (Note 4)Bipolar-VREF /2VREF/2V
Input Leakage CurrentC hannel not sel ected or conver si on stop p ed ±0.01±1µA
Input Capacitance34pF
EXTERNAL REFERENCE INPUT
Input Voltage RangeVREF1.0VDD
+50mVV
VREF = +2.5V at 150ksps1630
VREF = +4.096V at 150ksps2645Input CurrentIREF
Acquisition/Between conversions±0.01±1
DIGITAL INPUTS/OUTPUTS (SCLK, CNVST, DOUT)
Input Low VoltageVIL0.8V
Input High VoltageVIHVDD -1V
Input Leakage CurrentIL±0.1µA
Input CapacitanceCIN15pF
ISINK = 2mA0.4VOutput Low VoltageVOLISINK = 4mA0.8V
Output High VoltageVOHISOURCE = 1.5mAVDD
-0.5V
Three-State Leakage CurrentCNVST = GND±10µA
Three-State Output CapacitanceCOUTCNVST = GND15pF
POWER REQUIREMENTS
MAX1086/MAX10884.755.05.25Positive Supply VoltageVDDMAX1087/MAX10892.73.03.6V
fSAMPLE =150ksps245350
fSAMPLE =100ksps150
fSAMPLE =10ksps15VDD = +3V
fSAMPLE =1ksps2
fSAMPLE =150ksps320400
fSAMPLE =100ksps215
fSAMPLE =10ksps22VDD = +5V
fSAMPLE =1ksps2.5
Positive Supply CurrentIDD
Shutdown0.25
VDD = 5V ±5%; full-scale input±0.11.0Positive Supply RejectionPSRVDD = +2.7V to +3.6V; full-scale input±0.1±1.2mV
MAX1086–MAX1089
150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23 and TDFN
TIMING CHARACTERISTICS (Figures 1 and 2)
(VDD= +2.7V to +3.6V, VREF= +2.5V for MAX1087/MAX1089, or VDD= +4.75V to +5.25V, VREF= +4.096V for MAX1086/MAX1088,
0.1µF capacitor at REF, fSCLK= 8MHz (50% duty cycle); AIN- = GND for MAX1088/MAX1089. TA= TMINto TMAX,unless otherwise
noted. Typical values at TA= +25°C.)
PARAMETERSSYMBOLCONDITIONSMINTYPMAXUNITS
SCLK Pulse Width HightCH38ns
SCLK Pulse Width LowtCL38ns
SCLK Fall to DOUT TransitiontDOTCLOAD = 30pF60ns
SCLK Rise to DOUT DisabletDODCLOAD = 30pF100500ns
CNVST Rise to DOUT EnabletDOECLOAD = 30pF80ns
CNVST Fall to MSB ValidtDOVCLOAD = 30pF3.7μs
CNVST Pulse WidthtCSW30ns
Note 1:Unipolar input.
Note 2:Relative accuracy is the deviation of the analog value at any code from its theoretical value after offset and gain errors have
been removed.
Note 3:Offset nulled.
Note 4:The absolute input range for the analog inputs is from GND to VDD.
• • •
• • •
• • •
CNVST
SCLK
DOUT
tDOE
HIGH-ZHIGH-Z
tCSW
tDOT
tCL
tCH
tDOD
DOUT
6kΩ
6kΩ
GND
DOUT
GND
VDD
a) HIGH -Z TO VOH, VOL TO VOH, AND VOH TO HIGH -Za) HIGH -Z TO VOL, VOH TO VOL, AND VOL TO HIGH -Z
Figure 1. Detailed Serial-Interface Timing Sequence
Figure 2. Load Circuits for Enable/Disable Times
MAX1086–MAX1089
150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23 and TDFN
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
MAX1086-9 toc01
OUTPUT CODE
INL (LSB)
MAX1087/MAX108940020060080010001200
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
MAX1086-9 toc02
OUTPUT CODE
INL (LSB)
1.0MAX1086/MAX1088
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
MAX1086-9 toc03
OUTPUT CODE
DNL (LSB)40060020080010001200
1.0MAX1087/MAX1089
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
MAX1086-9 toc04
OUTPUT CODE40060020080010001200
DNL (LSB)
1.0MAX1086/MAX1088
SUPPLY CURRENT
vs. SAMPLING RATE
MAX1086-9 toc05
SAMPLING RATE (ksps)
SUPPLY CURRENT (
MAX1087/MAX10891000
SUPPLY CURRENT
vs. SAMPLING RATE
MAX1086-9 toc06
SAMPLING RATE (ksps)
SUPPLY CURRENT (
MAX1086/MAX1088
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX1086-9 toc07
VDD (V)
SUPPLY CURRENT (
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
MAX1086-9 toc08
VDD (V)
SHUTDOWN CURRENT (nA)
Typical Operating Characteristics
(VDD= +3.0V, VREF= +2.5V for MAX1087/MAX1089 or VDD= +5.0V, VREF= +4.096V for MAX1086/MAX1088, 0.1µF capacitor at
REF, fSCLK= 8MHz, (50% Duty Cycle), AIN- = GND for MAX1088/1089, TA= +25°C, unless otherwise noted.)
MAX1086–MAX1089
150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23 and TDFNypical Operating Characteristics (continued)
(VDD= 3.0V, VREF= 2.5V for MAX1087/MAX1089 or VDD= 5.0V, VREF= +4.096V for MAX1086MAX1088, 0.1µF capacitor at REF,
fSCLK= 8MHz, (50% Duty Cycle), AIN- = GND for MAX1088/89, TA= +25°C, unless otherwise noted.)
SHUTDOWN CURRENT
vs. TEMPERATURE
MAX1086-9 toc10
TEMPERATURE (°C)
SHUTDOWN CURRENT (nA)
OFFSET ERROR
vs. TEMPERATURE
MAX1086-9 toc11
TEMPERATURE (°C)
OFFSET ERROR (LSB)
OFFSET ERROR
vs. SUPPLY VOLTAGE
MAX1086-9 toc12
VDD (V)
OFFSET ERROR (LSB)
GAIN ERROR
vs. TEMPERATURE
MAX1086-9 toc13
TEMPERATURE (°C)
GAIN ERROR (LSB)
GAIN ERROR
vs. SUPPLY VOLTAGE
MAX1086-9 toc14
GAIN ERROR (LSB)
FFT PLOT (SINAD)
MAX1086-9 toc15
AMPLITUDE (dB)
SUPPLY CURRENT
vs. TEMPERATURE
MAX1086-9 toc09
TEMPERATURE (°C)
SUPPLY CURRENT (
MAX1086–MAX1089
150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23 and TDFN
Detailed Description
The MAX1086–MAX1089 analog-to-digital converters
(ADCs) use a successive-approximation conversion (SAR)
technique and an on-chip track-and-hold (T/H) structure to
convert an analog signal into a 10-bit digital result.
The serial interface provides easy interfacing to micro-
processors (µPs). Figure 3 shows the simplified internal
structure for the MAX1086/MAX1087 (2–channels, sin-
gle-ended) and the MAX1088/MAX1089 (1–channel,
true-differential).
True-Differential Analog Input Track/Hold
The equivalent circuit of Figure 4 shows the
MAX1086–MAX1089’s input architecture which is com-
posed of a T/H, input multiplexer, comparator, and
switched-capacitor DAC. The T/H enters its tracking
mode on the rising edge of CNVST. The positive input
capacitor is connected to AIN1 or AIN2 (MAX1086/
MAX1087) or AIN+ (MAX1088/MAX1089). The negative
input capacitor is connected to GND (MAX1086/
MAX1087) or AIN- (MAX1088/MAX1089). The T/H enters
its hold mode on the falling edge of CNVST and the dif-
ference between the sampled positive and negative
input voltages is converted. The time required for the T/H
to acquire an input signal is determined by how quickly
its input capacitance is charged. If the input signal’s
source impedance is high, the acquisition time length-
ens, and CNVST must be held high for a longer period of
time. The acquisition time, tACQ, is the maximum time
needed for the signal to be acquired, plus the power-up
time. It is calculated by the following equation:
tACQ= 7 x (RS+ RIN) x 24pF + tPWR
Pin Description
NAME
PINMAX1086
MAX1087
MAX1088
MAX1089
FUNCTION
1VDDVDDPositive Supply Voltage. +2.7V to +3.6V (MAX1087/MAX1089); +4.75V to +5.25V
(MAX1086/MAX1088). Bypass with a 0.1µF capacitor to GND.AIN1AIN+Analog Input Channel 1 (MAX1086/MAX1087) or Positive Analog Input (MAX1088/MAX1089)AIN2AIN-Analog Input Channel 2 (MAX1086/MAX1087) or Negative Analog Input (MAX1088/MAX1089)GNDGNDGroundREFREFExternal Reference Voltage Input. Sets the analog voltage range. Bypass with a 0.1µF
capacitor to GND.CNVSTCNVST
Conversion Start. A rising edge powers-up the IC and places it in track mode. At the falling
edge of CNVST, the device enters hold mode and begins conversion. CNVST also selects the
input channel (MAX1086/MAX1087) or input polarity (MAX1088/MAX1089).DOUTDOUT
Serial Data Output. DOUT transitions the falling edge of SCLK. DOUT goes low at the start of a
conversion and presents the MSB at the completion of a conversion. DOUT goes high-
impedance once data has been fully clocked out.SCLKSCLKSerial Clock Input. Clocks out data at DOUT MSB first.EP—Exposed Pad (TDFN only). Connect the exposed pad to ground or leave unconnected.
10-BIT
SAR
ADC
CONTROL
OSCILLATOR
INPUT SHIFT
REGISTER
T/H
REF
CNVST
SCLK
DOUT
AIN2
(AIN-)
AIN1
(AIN+)
MAX1086–MAX1089
( ) ARE FOR MAX1088/MAX1089
Figure 3. Simplified Functional Diagram
MAX1086–MAX1089
150ksps, 10-Bit, 2-Channel Single-Ended, and
1-Channel True-Differential ADCs in SOT23 and TDFN
where RIN= 1.5kΩ, RSis the source impedance of the
input signal, and tPWR= 1µs is the power-up time of the
device.
Note:tACQis never less than 1.4µs and any source
impedance below 300Ωdoes not significantly affect the
ADC‘s AC performance. A high impedance source can
be accommodated either by lengthening tACQor by
placing a 1µF capacitor between the positive and neg-
ative analog inputs.
Selecting AIN1 or AIN2
(MAX1086/MAX1087)
Select between the MAX1086/MAX1087’s two positive
input channels using the CNVST pin. If AIN1 is desired
(Figure 5a), drive CNVST high to power-up the ADC
and place the T/H in track mode with AIN1 connected
to the positive input capacitor. Hold CNVST high for
tACQto fully acquire the signal. Drive CNVST low to
place the T/H in hold mode. The ADC will then perform
a conversion and shutdown automatically. The MSB is
available at DOUT after 3.7µs. Data can then be
clocked out using SCLK. Be sure to clock out all 12 bits
of data (the 10-bit result plus two sub-bits) before dri-
ving CNVST high for the next conversion. If all 12 bits of
data are not clocked out before CNVST is driven high,
AIN2 will be selected for the next conversion.
If AIN2 is desired (Figure 5b), drive CNVST high for at
least 30ns. Next, drive it low for at least 30ns, and then
high again. This will power-up the ADC and place the
T/H in track mode with AIN2 connected to the positive
input capacitor. Now hold CNVST high for tACQto fully
acquire the signal. Drive CNVST low to place the T/H in
hold mode. The ADC will then perform a conversion
and shutdown automatically. The MSB is available at
DOUT after 3.7µs. Data can then be clocked out using
SCLK. If all 12 bits of data are not clocked out before
CNVST is driven high, AIN2 will be selected for the next
conversion.
Selecting Unipolar or Bipolar Conversions
(MAX1088/MAX1089)
Initiate true-differential conversions with the
MAX1088/MAX1089’s unipolar and bipolar modes,
using the CNVST pin. AIN+ and AIN- are sampled at
the falling edge of CNVST. In unipolar mode, AIN+ can
exceed AIN- by up to VREF. The output format is
straight binary. In bipolar mode, either input can
exceed the other by up to VREF/2. The output format is
two’s complement.
Note:In both modes, AIN+ and AIN- must not exceed
VDDby more than 50mV or be lower than GND by more
than 50mV.
If unipolar mode is desired (Figure 5a), drive CNVST
high to power-up the ADC and place the T/H in track
mode with AIN+ and AIN- connected to the input
capacitors. Hold CNVST high for tACQto fully acquire
the signal. Drive CNVST low to place the T/H in hold
mode. The ADC will then perform a conversion and
shutdown automatically. The MSB is available at DOUT
after 3.7µs. Data can then be clocked out using SCLK.
Be sure to clock out all 12 bits (the 10-bit result plus
two sub-bits) of data before driving CNVST high for the
next conversion. If all 12 bits of data are not clocked
out before CNVST is driven high, bipolar mode will be
selected for the next conversion.
If bipolar mode is desired (Figure 5b), drive CNVST
high for at least 30ns. Next, drive it low for at least 30ns
and then high again. This will place the T/H in track
mode with AIN+ and AIN- connected to the input
capacitors. Now hold CNVST high for tACQto fully
acquire the signal. Drive CNVST low to place the T/H in
hold mode. The ADC will then perform a conversion
and shutdown automatically. The MSB is available at
DOUT after 3.7µs. Data can then be clocked out using
SCLK. If all 12 bits of data are not clocked out before
CNVST is driven high, bipolar mode will be selected for
the next conversion.
Input Bandwidth
The ADCs input tracking circuitry has a 1MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. To avoid high fre-
quency signals being aliased into the frequency band
of interest, anti-alias filtering is recommended.
RIN+
HOLD
RIN-
CIN+
REF
GNDDAC
CIN-
TRACKVDD/2
COMPARATOR
GND(AIN-)
AIN2
AIN1(AIN+)
HOLD
HOLD
*( ) APPLIES TO MAX1088/1089
Figure 4. Equivalent Input Circuit

Partno	Mfg	Dc	Qty	Available	Descript
MAX1087ETA+T \|MAX1087ETAT	MAXIM	N/a	2500	avai	150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 and TDFN
MAX1089ETA+ \|MAX1089ETA	MAXIM	N/a	30	avai	150ksps, 10-Bit, 2-Channel Single-Ended, and 1-Channel True-Differential ADCs in SOT23 and TDFN