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M74HC4514OKIN/a15avaiHC4515: 4 TO 16 LINE DECODER LATCH (INV.) HC4514: 4 TO 16 LINE DECODER/LATCH


M74HC4514 ,HC4515: 4 TO 16 LINE DECODER LATCH (INV.) HC4514: 4 TO 16 LINE DECODER/LATCHM74HC4514 4 TO 16 LINE DECODER/LATCH ■ HIGH SPEED:t = 20 ns (TYP.) at V = 6VPD CC■ LOW POWER DISSI ..
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M74HC4514
HC4515: 4 TO 16 LINE DECODER LATCH (INV.) HC4514: 4 TO 16 LINE DECODER/LATCH
1/12April 2003 HIGH SPEED:
tPD= 20 ns (TYP .) at VCC = 6V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4514
DESCRIPTION

The M74HC4514 is an high speed CMOS 4 LINE
TO 16 LINE SEGMENT DECODER WITH
LATCHED INPUTS fabricated with silicon gate2 MOS technology.
A binary code stored in the four input latches (A to
D) provides a high level at the selected one of
sixteen outputs excluding the other fifteen outputs,
when the inhibit input (INHIBIT) is held low. When
the inhibit input (INHIBIT) is held high, all outputs
are kept low level, while the latch function is
available. The data applied to the data inputs are
transferred to the Q outputs of latches when the
strobe input is held high. When the strobe input is
taken low, the information data applied to the data
input at a time is retained at the output of the
latches.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC4514

4 TO 16 LINE DECODER/LATCH
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC4514
2/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE

X : Don’t Care
M74HC4514
3/12
LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
M74HC4514
4/12
RECOMMENDED OPERATING CONDITIONS
DC SPECIFICATIONS
M74HC4514
5/12
AC ELECTRICAL CHARACTERISTICS (C
L = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
M74HC4514
6/12
TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
SWITCHING CHARACTERISTICS TEST WAVEFORM (f=1MHz; 50% duty cycle)
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