M74HC4011M1R Fast Delivery |IC PHOENIX CO.,LIMITED

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M74HC4011M1R
BCD TO 7 SEGMENT LATCH/DECODER DRIVER
M54H C4511
M74HC4511
BCD TO7 SEGMENT LATCH/DECODER DRIVER
B1R
(Plastic Package)
ORDER CODES:
M54HC4011F1R M74HC4011M1R
M74HC4011B1R M74HC4011C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)= Internal
DESCRIPTION HIGH SPEED
tPD=28ns (TYP.) AT VCC =5V. LOWPOWER DISSIPATION
ICC =4 μA (MAX.) ATTA =25°C. HIGH NOISE IMMUNITY
VNIH =VNIL =28% VCC (MIN.). OUTPUT DRIVE CAPABILITY LSTTL LOADS. HIGH SOURGE CURRENT
|IOH|=20 mA (MIN.). BALANCEDPROPAGATION DELAYS
tPLH =tPHL. WIDE OPERATING VOLTAGE RANGE
VCC (OPR)=2V TO6V. PIN AND FUNCTION COMPATIBLE
WITH 4511B
The M54/74HC4511isa high speed CMOS BCD-
TO-7 SEGMENT LATCH/DECODER/DRIVER fab-
ricated with silicon gateC2 MOS technology.It
enables high speed latch anddecode operation with
identical pin connection and functionto standard
CMOS 4511B.
The segment output driver, whichis CMOS fabri-
catedin silicon gateC2 MOS technology, has large
IOH capability which enables common cathode Ledsbe directly driven.
When lamp test (LT)is taken ”L”,all segment out-
puts willgoto ”H”, and when blanking (BI)is taken
”L” andLTis taken ”H”all segment outputs willgo ”L”.
These functions operate regard lessof other inputs
and are usedto test the display.
InputBIis usedto pulse-modulate the brightnessof
the display.
Whenan error input code (over 10)is appliedto the
BCD input,all segment outputs willgo”L” (turn off).
All inputs are equipped with protection circuits
TRUTH TABLE
INPUTS OUTPUTD DISPLAY
MODELE BI LT D C B A a b c d e f g L XXXX H H H HHHH 8 L H XXXX L LLLLLL BLANK H H LLLL H H H H H H L 0 H H LLL H L H H LLLL 1 H L LH L H H L H H L H 2 H H L L H HHHH H L L H 3 H H L H LLL H H LL H H 4 H HL HL H H L H H L H H 5 H H L HH L L L H HHHH 6 H H L H H H H H LLLLL 7 HHH L L L HHH HHHH 8 HHH L L HHHH L L HH 9 H H H L H X L LLLLLL BLANK HHHHX X L LLLLLL BLANK H H XXXX Hold the stageat the leading edgeofLE Don’tCare
LOGIC DIAGRAM
M54/M74HC4511
DISPLAY MODE
BLOCK DIAGRAM
M54/M74HC4511
PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION LT Lamp Test Input (Active
LOW) BI Ripple Blanking Input
(Active LOW) LE Latch Enable Input1,2,6 AtoD BCD Address Inputs
13,12, 11,
10,9,15,tog Segment Outputs GND Ground (0V) VCC Positive Supply Voltage
IEC LOGIC SYMBOL
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Supply Voltage -0.5to+7 V DC Input Voltage -0.5to VCC+ 0.5 V DC Output Voltage -0.5to VCC+ 0.5 V
IIK DC Input Diode Current ±20 mA
IOK DC Output Diode Current ±20 mA DC Output Source Sink Current Per Output Pin -35/25 mA
ICCor IGND DC VCCor Ground Current +150/-50 mA Power Dissipation 500(*) mW
Tstg Storage Temperature -65to +150 oC Lead Temperature (10 sec) 300 oC
Absolute MaximumRatings arethose values beyond whichdamage tothedevicemayoccur.Functional operation under theseconditionisnotimplied.
(*)500 mW:≅65oC derate to300mWby 10mW/oC:65o Cto85oC
INPUT AND OUTPUT EQUIVALENT CIRCUIT
M54/M74HC4511
SPECIFICATIONSSymbol Parameter
Test Conditions Value
UnitVCC
(V) =25oC
54HC and 74HC
-40to85oC
74HC
-55to 125oC
54HC
Min. Typ. Max. Min. Max. Min. Max.
VIH High Level Input
Voltage
2.0 1.5 1.5 1.54.5 3.15 3.15 3.15
6.0 4.2 4.2 4.2
VIL Low Level Input
Voltage
2.0 0.5 0.5 0.54.5 1.35 1.35 1.35
6.0 1.8 1.8 1.8
VOH High Level
Output Voltage
2.0 VI=
VIH
VIL
IO=-20μA
1.9 2.0 1.9 1.94.5 4.4 4.5 4.4 4.4
6.0 5.9 6.0 5.9 5.9
4.5 IO=-4.0 mA 3.2 3.8 2.9
6.0 IO=-5.2 mA 5.68 5.8 5.63 5.60
VOL Low Level Output
Voltage
2.0 VI=
VIH
VIL
IO=20μA
0.0 0.1 0.1 0.1
4.5 0.0 0.1 0.1 0.1
6.0 0.0 0.1 0.1 0.1
4.5 IO= 4.0 mA 0.17 0.26 0.37 0.40
6.0 IO= 5.2 mA 0.18 0.26 0.37 0.40 Input Leakage
Current 6.0 VI =VCCor GND ±0.1 ±1 ±1 μA
ICC Quiescent Supply
Current
6.0 VI =VCCor GND 4 40 80 μA
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
VCC Supply Voltage 2to6 V Input Voltage 0to VCC V Output Voltage 0to VCC V
Top Operating Temperature: M54HC Series
M74HC Series
-55to +125
-40to +85CC
tr,tf Input Rise and Fall Time VCC=2V 0to 1000 ns
VCC=4.5V 0to 500
VCC=6V 0to 400
M54/M74HC4511
ELECTRICAL CHARACTERISTICS (CL =50 pF, Inputtr =tf =6 ns)Symbol Parameter
Test Conditions Value
UnitVCC
(V) =25oC
54HC and 74HC
-40to85oC
74HC
-55to 125oC
54HC
Min. Typ. Max. Min. Max. Min. Max.
tTLH Output Transition
Time
2.0 25 60 75 904.5 7 121518
6.0 6 111315
tTHL Output Transition
Time
2.0 30 75 95 1104.5 8 151922
6.0 7 131619
tPLH
tPHL
Propagation
Delay Time
(BCD- Seg.)
2.0 125 255 320 3854.5 33 51 64 77
6.0 23 43 54 65
tPLH
tPHL
Propagation
Delay Time
(BI- Seg.)
2.0 70 175 220 2654.5 22 35 44 53
6.0 17 30 37 45
tPLH
tPHL
Propagation
Delay Time
(LT- Seg.)
2.0 60 120 150 1804.5 15 24 30 36
6.0 12 20 26 31
tPLH
tPHL
Propagation
Delay Time
(LE- Seg.)
2.0 95 240 300 3604.5 32 48 60 72
6.0 23 41 51 61
tW(L) Minimum Pulse
Width
2.0 30 75 95 1104.5 8 151922
6.0 7 131619 Minimum Set-up
Time
2.0 20 75 95 1104.5 5 151922
6.0 4 131619 Minimum Hold
Time
2.0 0 0 04.5 0 0 0
6.0 0 0 0
CIN Input Capacitance 5 10 10 10 pF
CPD(*) Power Dissipation
Capacitance pF
(*) CPD isdefinedasthe valueofthe IC’sinternal equivalent capacitance which iscalculated fromthe operatingcurrent consumption without load.
(Referto Test Circuit).Average operting currentcanbe obtained bythefollowingequation. ICC(opr)=CPD •VCC •fIN+ICC/2(per FLIP/FLOP)
M54/M74HC4511
SWITCHING CHARACTERISTICS TEST WAVEFORM
DataSegment Delay Time LE-Segment DelayTime
BI-Segment Delay Time LT-Segment DelayTime
DataSet-up/HoldTime
M54/M74HC4511

Partno	Mfg	Dc	Qty	Available	Descript
M74HC4011M1R	STM	N/a	900	avai	BCD TO 7 SEGMENT LATCH/DECODER DRIVER