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M74HC377M1RSTN/a379avaiOCTAL D TYPE FLIP FLOP


M74HC377M1R ,OCTAL D TYPE FLIP FLOPM74HC377OCTAL D TYPE FLIP FLOP ■ HIGH SPEED : f = 66 ..
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M74HC377M1R
OCTAL D TYPE FLIP FLOP
1/11July 2001 HIGH SPEED :
fMAX = 66 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION:CC =4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 377
DESCRIPTION

The M74HC377 is an high speed CMOS OCTAL
D TYPE FLIP FLOP fabricated with silicon gate2 MOS technology.
Information at the D inputs meeting the setup time
requirements is transferred to the Q outputs on the
positive going edge of the clock pulse if the enable
input G is low. Clock triggering occurs at a
particular voltage level and is not directly related
to the transition time of the positive going pulse.
When the clock input is at either the high or low
level, the D input signal has no effect at the output.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC377

OCTAL D TYPE FLIP FLOP
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC377
2/11
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE

X : Don’t Care
LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays
M74HC377
3/11
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC377
4/11
DC SPECIFICATIONS
M74HC377
5/11
AC ELECTRICAL CHARACTERISTICS (C
L = 50 pF, Input tr = tf = 6ns)
CAPACITIVE CHARACTERISTICS

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
M74HC377
6/11
TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1: PROPAGATION DELAY TIME, MINIMUM PULSE WIDTH (CK), SETUP AND HOLD
TIME (D TO CK) (f=1MHz; 50% duty cycle)
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