M74HC193M1R ,SYNCHRONOUS UP/DOWN DECADE COUNTERM74HC193SYNCHRONOUS UP/DOWN BINARY COUNTER ■ HIGH SPEED : ..
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M74HC193M1R
SYNCHRONOUS UP/DOWN DECADE COUNTER
1/14July 2001 HIGH SPEED :
fMAX = 55 MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION:CC =4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:NIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE:CC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 193
DESCRIPTIONThe M74HC193 is an high speed CMOS
SYNCRONOUS UP/DOWN BINARY
COUNTERS fabricated with silicon gate C2 MOS
technology.
The counter has two separate clock inputs, an UP
COUNT input and a DOWN COUNT input. All
outputs of the flip-flop are simultaneously
triggered on the low to high transition of either
clock while the other input is held high. The
direction of counting is determined by which input
is clocked. This counter may be preset by entering
the desired data on the DATA A, DATA B, DATA
C, and DATA D input. When the LOAD input is
taken low the data is loaded independently of
either clock input. This feature allows the counters
to be used as divide-by-n counters by modifying
the count length with the preset inputs. In addition
the counter can also be cleared. This is
accomplished by inputting a high on the clear
input. All 4 internal stages are set to low
independently of either COUNT input. Both a
BORROW and CARRY output are provided to
enable cascading of both up and down counting
functions. The BORROW output produces a
negative going pulse when the counter underflows
and the CARRY outputs a pulse when the
counters overflows. The counter can be cascaded
by connection the CARRY and BORROW outputs
of one device to the COUNT UP and COUNT
DOWN inputs, respectively, of the next device.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC193SYNCHRONOUS UP/DOWN BINARY COUNTER
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
M74HC1932/14
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
M74HC1933/14
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
M74HC1934/14
TIMING CHART
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
M74HC1935/14
DC SPECIFICATIONS
M74HC1936/14
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
M74HC1937/14
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC
