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Home ›  MM4 > M27C512-10C6-M27C512-10F3-M27C512-10F6-M27C512-10XF1-M27C512-12C3-M27C512-12F6-M27C512--12F6-M27C512-12N1-M27C512-12XF1-M27C512-15B1-M27C512-15B6-M27C512-15C1-M27C512-15C3-M27C512-15C6-M27C512-15F1-M27C512-15F3-M27C512-15F6-M27C512-15XC1-M27C512-15XF1-M27C512-15XF,512 Kbit (64K x8) UV EPROM and OTP EPROM
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Partno Mfg Dc Qty AvailableDescript
M27C512-10C6 |M27C51210C6STN/a860avai512 Kbit (64Kb x 8) EPROM, 5V, 100ns
M27C512-10F3 |M27C51210F3STN/a6100avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-10F6 |M27C51210F6STN/a5000avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-10XF1 |M27C51210XF1STN/a606avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-12C3 |M27C51212C3STN/a180avai512 Kbit (64Kb x 8) EPROM, 5V, 120ns
M27C512-12F6 |M27C51212F6STN/a2069avai512 Kbit (64Kb x 8) EPROM, 5V, 120ns
M27C512-12F6 |M27C51212F6STMN/a2400avai512 Kbit (64Kb x 8) EPROM, 5V, 120ns
M27C512--12F6 |M27C51212F6STN/a74avai512 Kbit (64Kb x 8) EPROM, 5V, 120ns
M27C512-12N1 |M27C51212N1STN/a1848avai512 Kbit (64Kb x 8) EPROM, 5V, 120ns
M27C512-12XF1 |M27C51212XF1STN/a762avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-12XF1 |M27C51212XF1STMN/a13avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15B1 |M27C51215B1STN/a1292avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15B1 |M27C51215B1STMN/a1129avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15B1 |M27C51215B1STMicroelectronicsN/a290avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15B6 |M27C51215B6STN/a215avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15B6 |M27C51215B6STMN/a113avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15C1 |M27C51215C1STMN/a39avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15C3 |M27C51215C3STN/a980avai512 Kbit (64Kb x 8) EPROM, 5V, 150ns
M27C512-15C6 |M27C51215C6STN/a540avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15F1 |M27C51215F1STMN/a3837avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15F3 |M27C51215F3STN/a2078avai512 Kbit (64Kb x 8) EPROM, 5V, 150ns
M27C512-15F6 |M27C51215F6STN/a5380avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15XC1 |M27C51215XC1STN/a3avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15XF1 |M27C51215XF1ST.N/a808avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-15XF6 |M27C51215XF6N/a5avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-20B1 |M27C51220B1STN/a5130avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-20B1 |M27C51220B1N/a2730avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-20C1 |M27C51220C1STN/a384avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-20C6 |M27C51220C6STN/a228avai512 Kbit (64Kb x 8) EPROM, 5V, 200ns
M27C512-20F1 |M27C51220F1STN/a6000avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-20F6 |M27C51220F6N/a39avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-20XF1 |M27C51220XF1N/a57avai512 Kbit (64Kb x 8) EPROM, 5V, 200ns
M27C512-20XF6 |M27C51220XF6STN/a6960avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-25F1 |M27C51225F1STN/a5530avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-25F6 |M27C51225F6STN/a5300avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-25XF1 |M27C51225XF1STN/a4000avai512 Kbit (64Kb x 8) EPROM, 5V, 250ns
M27C512-45F1 |M27C51245F1STN/a2152avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-45F3 |M27C51245F3STN/a2073avai512 Kbit (64Kb x 8) EPROM, 5V, 45ns
M27C512-45F6 |M27C51245F6STN/a2065avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-45XF3 |M27C51245XF3STN/a2079avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-45XF6 |M27C51245XF6STN/a2071avai512 Kbit (64Kb x 8) EPROM, 5V, 45ns
M27C512-70C6 |M27C51270C6STN/a60avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-70F1 |M27C51270F1STN/a2058avai512 Kbit (64Kb x 8) EPROM, 5V, 70ns
M27C512-70F3 |M27C51270F3STN/a2074avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-70F6 |M27C51270F6STN/a2066avai512 Kbit (64Kb x 8) EPROM, 5V, 70ns
M27C512-70XF3 |M27C51270XF3STN/a2080avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-70XF6 |M27C51270XF6STN/a2072avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-80XF1 |M27C51280XF1STMN/a6000avai512 Kbit (64Kb x 8) EPROM, 5V, 80ns
M27C512-90F1 |M27C51290F1ST ?N/a584avai512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-90F3 |M27C51290F3STN/a2075avai512 Kbit (64Kb x 8) EPROM, 5V, 90ns


M27C512-20XF6 ,512 Kbit (64K x8) UV EPROM and OTP EPROMLogic Diagramtwo ranges UV (ultra violet erase) and OTP (onetime programmable). It is ideally suite ..
M27C512-25F1 ,512 Kbit (64K x8) UV EPROM and OTP EPROMFEATURES SUMMARY■ 5V ± 10% SUPPLY VOLTAGE in READ Figure 1. PackagesOPERATION■ ACCESS TIME: 45ns■ L ..
M27C512-25F6 ,512 Kbit (64K x8) UV EPROM and OTP EPROMFEATURES SUMMARY . . . . . 1Figure 1. Packages . . . . . . 1SUMMARY DESCRIPTION ..
M27C512-25XF1 ,512 Kbit (64Kb x 8) EPROM, 5V, 250nsM27C512512 Kbit (64K x8) UV EPROM and OTP EPROM
M27C512-45F1 ,512 Kbit (64K x8) UV EPROM and OTP EPROMAbsolute Maximum Ratings 9DC and AC PARAMETERS . 10Table 5. AC Measurement Conditions ..
M27C512-45F3 ,512 Kbit (64Kb x 8) EPROM, 5V, 45nsFEATURES SUMMARY■ 5V ± 10% SUPPLY VOLTAGE in READ Figure 1. PackagesOPERATION■ ACCESS TIME: 45ns■ L ..
M45PE10-VMN6TG ,1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus InterfaceFEATURES SUMMARY■ 1Mbit of Page-Erasable Flash Memory Figure 1. Packages■ Page Write (up to 256 Byt ..
M45PE10-VMN6TP ,1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus InterfaceBlock Diagram . 10INSTRUCTIONS . . 11Table 4. Instruction Set . 11Write Enabl ..
M45PE10-VMP6TG ,1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus InterfaceAbsolute Maximum Ratings . . . . . . . 25DC AND AC PARAMETERS . 26Table 8. Operating Cond ..
M45PE10-VMP6TG ,1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus InterfaceLogic Diagram . . 5Figure 3. SO and VDFPN Connections . . . . . . 5Table 1. Signal Name ..
M45PE16-VMW6TG , 16 Mbit, low-voltage, Page-Erasable Serial Flash memory with byte alterability and a 50 MHz SPI bus interface
M45PE16-VMW6TG , 16 Mbit, low-voltage, Page-Erasable Serial Flash memory with byte alterability and a 50 MHz SPI bus interface


M27C512-10C6-M27C512-10F3-M27C512-10F6-M27C512-10XF1-M27C512-12C3-M27C512-12F6-M27C512--12F6-M27C512-12N1-M27C512-12XF1-M27C512-15B1-M27C512-15B6-M27C512-15C1-M27C512-15C3-M27C512-15C6-M27C512-15F1-M27C512-15F3-M27C512-15F6-M27C512-15XC1-M27C512-15XF1-M27C512-15XF
512 Kbit (64K x8) UV EPROM and OTP EPROM
1/22November 2004
M27C512

512 Kbit (64K x8) UV EPROM and OTP EPROM
FEATURES SUMMARY
5V ± 10% SUPPLY VOLTAGE in READ
OPERATION ACCESS TIME: 45ns LOW POWER “CMOS” CONSUMPTION: Active Current 30mA Standby Current 100µA PROGRAMMING VOLTAGE: 12.75V ± 0.25V PROGRAMMING TIMES of AROUND 6sec. ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: 3Dh PACKAGES Lead-Free Versions
M27C512
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Figure 3. DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 4. LCC Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 5. TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
DEVICE OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

Table 2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Table 3. Electronic Signature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Two Line Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
System Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

Figure 6. Programming Flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
PRESTO IIB Programming Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Program Verify. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
ERASURE OPERATION (APPLIES FOR UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

Table 4. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Table 5. AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Figure 7. Testing Input Output Waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Figure 8. AC Testing Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 6. Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Table 7. Read Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 8. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Table 9. Read Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Figure 9. Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Table 10. Programming Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Table 11. Margin Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Figure 10.Margin Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Table 12. Programming Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Figure 11.Programming and Verify Modes AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3/22
M27C512
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

Figure 12.FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Outline. . . . . . . . . . . .16
Table 13. FDIP28W - 28 pin Ceramic Frit-seal DIP, with window, Package Mechanical Data . . . .16
Figure 13.PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline . . . . . . . . . . . . . . . . . . . .17
Table 14. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Mechanical Data . . . . . . . . . . . .17
Figure 14.PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline . . . . . . . . . . . . . . . . .18
Table 15. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data . . . . . . . . . .18
Figure 15.TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Outline . . . . . . . .19
Table 16. TSOP28 - 28 lead Plastic Thin Small Outline, 8 x 13.4 mm, Package Mechanical Data19
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Table 17. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Table 18. Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
M27C512
SUMMARY DESCRIPTION

The M27C512 is a 512 Kbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for applica-
tions where fast turn-around and pattern experi-
mentation are important requirements and is
organized as 65536 by 8 bits.
The FDIP28W (window ceramic frit-seal package)
has transparent lid which allows the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C512 is offered in PDIP28, PLCC32 and
TSOP28 (8 x 13.4 mm) packages.
In addition to the standard versions, the packages
are also available in Lead-free versions, in compli-
ance with JEDEC Std J-STD-020B, the ST ECO-
PACK 7191395 Specification, and the RoHS
(Restriction of Hazardous Substances) directive.
5/22
M27C512
M27C512
DEVICE OPERATION

The modes of operations of the M27C512 are list-
ed in the Operating Modes table. A single power
supply is required in the read mode. All inputs are
TTL levels except for GVPP and 12V on A9 for
Electronic Signature.
Read Mode

The M27C512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(tAVQV) is equal to the delay from E to output
(tELQV). Data is available at the output after a delay
of tGLQV from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least tAVQV-tGLQV.
Standby Mode

The M27C512 has a standby mode which reduces
the active current from 30mA to 100µA The
M27C512 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the GVPP input.
Table 2. Operating Modes

Note: X = VIH or VIL, VID = 12V ± 0.5V.
Table 3. Electronic Signature
Two Line Output Control

Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows: the lowest possible memory power
dissipation, complete assurance that output bus
contention will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
System Considerations

The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, ICC, has three seg-
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor be used on every device between VCC
and VSS. This should be a high frequency capaci-
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
7/22
M27C512

Nevertheless to achieve compatibility with all pro-
gramming equipments, PRESTO Programming
Algorithm can be used as well.
PRESTO IIB Programming Algorithm

PRESTO IIB Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 6.5 seconds. This can
be achieved with STMicroelectronics M27C512
due to several design innovations described in the
M27C512 datasheet to improve programming effi-
ciency and to provide adequate margin for reliabil-
ity. Before starting the programming the internal
MARGIN MODE circuit is set in order to guarantee
that each cell is programmed with enough margin.
Then a sequence of 100µs program pulses are ap-
plied to each byte until a correct verify occurs. No
overprogram pulses are applied since the verify in
MARGIN MODE provides the necessary margin.
Program Inhibit

Programming of multiple M27C512s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including GVPP of the par-
allel M27C512 may be common. A TTL low level
pulse applied to a M27C512's E input, with VPP at
12.75V, will program that M27C512. A high level E
input inhibits the other M27C512s from being pro-
grammed.
Program Verify

A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
at VIL. Data should be verified with tELQV after the
falling edge of E.
Electronic Signature

The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am-
bient temperature range that is required when pro-
gramming the M27C512. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
M27C512. Two identifier bytes may then be se-
quenced from the device outputs by toggling ad-
dress line A0 from VIL to VIH. All other address
lines must be held at VIL during Electronic Signa-
ture mode. Byte 0 (A0 = VIL) represents the man-
ufacturer code and byte 1 (A0 = VIH) the device
identifier code. For the STMicroelectronics
M27C512, these two identifier bytes are given in
Table 3. and can be read-out on outputs Q7 to Q0.
M27C512
ERASURE OPERATION (APPLIES FOR UV EPROM)

The erasure characteristics of the M27C512 is
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately 4000Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range.
Research shows that constant exposure to room
level fluorescent lighting could erase a typical
M27C512 in about 3 years, while it would take ap-
proximately 1 week to cause erasure when ex-
posed to direct sunlight. If the M27C512 is to be
exposed to these types of lighting conditions for
extended periods of time, it is suggested that
opaque labels be put over the M27C512 window to
prevent unintentional erasure. The recommended
erasure procedure for the M27C512 is exposure to
short wave ultraviolet light which has wavelength
2537 Å. The integrated dose (i.e. UV intensity x
exposure time) for erasure should be a minimum
of 15 W-sec/cm2 . The erasure time with this dos-
age is approximately 15 to 20 minutes using an ul-
traviolet lamp with 12000 µW/cm2 power rating.
The M27C512 should be placed within 2.5 cm (1
inch) of the lamp tubes during the erasure. Some
lamps have a filter on their tubes which should be
removed before erasure.
9/22
M27C512
MAXIMUM RATING

Stressing the device outside the ratings listed in
Table 4. may cause permanent damage to the de-
vice. These are stress ratings only, and operation
of the device at these, or any other conditions out-
side those indicated in the Operating sections of
this specification, is not implied. Exposure to Ab-
solute Maximum Rating conditions for extended
periods may affect device reliability. Refer also to
the STMicroelectronics SURE Program and other
relevant quality documents.
Table 4. Absolute Maximum Ratings

Note:1. Compliant with the JEDEC Std J-STD-020B (for small body, Sn-Pb or Pb assermbly), the ST ECOPACK® 7191395 specification,
and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. Depends on range.
M27C512
DC AND AC PARAMETERS

This section summarizes the operating and mea-
surement conditions, and the DC and AC charac-
teristics of the device. The parameters in the DC
and AC Characteristic tables that follow are de-
rived from tests performed under the Measure-
ment Conditions summarized in the relevant
tables. Designers should check that the operating
conditions in their circuit match the measurement
conditions when relying on the quoted parame-
ters.
Table 5. AC Measurement Conditions Figure 8. AC Testing Load Circuit
Table 6. Capacitance

Note:1. TA = 25°C, f = 1MHz Sampled only, not 100% tested.
11/22
M27C512
Table 7. Read Mode DC Characteristics

Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Maximum DC voltage on Output is VCC +0.5V.
Table 8. Read Mode AC Characteristics

Note:1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. Sampled only, not 100% tested. Speed obtained with High Speed AC measurement conditions.
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