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LM97593VH/NOPB
Dual ADC / Digital Tuner / AGC
LM97593
www.ti.com SNWS019B –JULY 2007–REVISED APRIL 2013
LM97593 Dual ADC/ Digital Tuner/ AGC
Checkfor Samples: LM97593
1FEATURES DESCRIPTIONThe LM97593 Dual ADC/ Digital Tuner/ AGCICisa
100% Software Compatible with the CLC5903 two channel digital downconverter (DDC) with
• Pin Compatible with the CLC5903 Except for integrated 12-bit analog-to-digital converters (ADCs)
the Analog Input and Reference Section and automatic gain control (AGC). The LM97593
123 dB Dynamic Range with CLC5526 DVGA further enhances TI’s Diversity Receiver Chipset
(DRCS) by integratinga wide-bandwidth dual ADC
(200kHz)core with the DDC. The complete DRCS includes one
• On-chip Precision Reference LM97593 Dual ADC/ Digital Tuner/ AGC and two
• User Programmable AGC with Enhanced CLC5526 digitally controlled variable gain amplifiers
Power Detector (DVGAs). This system allows directIF samplingof
signals up to 300MHz for enhanced receiver
• Channel Filters Includea Fourth Order CICperformance and reduced system costs.A block
Followed by 21-tap and 63-tap Symmetric FIRs diagram for a DRCS-based narrowband
• Flexible Output Formats communications systemis shownin Figure1.
• Serial and Parallel Output Ports The LM97593 offers high dynamic range digital tuning
• JTAG Boundary Scan and filtering based on hard-wired digital signal
8-bit Microprocessor Interface processing (DSP) technology. Each channel has
independent tuning, phase offset, filter coefficients,
• 128 pin PQFP and gain settings. Channel filteringis performedbya
seriesof three filters. The firstisa 4-stage Cascaded
APPLICATIONS Integrator Comb (CIC) filter witha programmable
• Cellular Basestations decimation ratio from8to 2048. Next there are two
symmetric FIR filters,a 21-tap anda 63-tap, both with
• GSM/ GPRS/ EDGE/ GSM Phase2 Receivers independent programmable coefficients. The first FIR
• Satellite Receivers filter decimates the data by 2, the second FIR
• Wireless Local Loop Receivers decimates by either2or4. Channel filter bandwidth 52MSPS ranges from ±650kHz downto ±1.3kHz.
• Digital Communications 65MSPS, the maximum bandwidth increasesto
±812kHz.
KEY SPECIFICATIONSThe LM97593’s AGC controller monitors the ADC
• Internal ADC Resolution:12 Bits output and controls the ADC input signal level by adjusting the DVGA setting. AGC threshold,
11-bit,62 dBFS deadband+hysteresis, and the loop time constant are user defined. Total dynamic rangeof greater than
123dB full-scale signal to noise in a 200kHz
200kHz):83 dBFS (typ) achieved with the Diversity
dBFS (typ) Power Consumption: 560 mW (typ)
