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LM75BD-LM75BDP
Digital temperature sensor and thermal watchdog
1. General descriptionThe LM75B is a temperature-to-digital converter using an on-chip band gap temperature
sensor and Sigma-Delta A-to-D conversion technique with an overtemperature detection
output. The LM75B contains a number of data registers: Configuration register (Conf) to
store the device settings such as device operation mode, OS operation mode, OS polarity
and OS fault queue as described in Section 7 “Functional description”; temperature
register (Temp) to store the digital temp reading, and set-point registers (T os and Thyst) to
store programmable overtemperature shutdown and hysteresis limits, that can be
communicated by a controller via the 2-wire serial I2 C-bus interface. The device also
includes an open-drain output (OS) which becomes active when the temperature exceeds
the programmed limits. There are three selectable logic address pins so that eight devices
can be connected on the same bus without address conflict.
The LM75B can be configured for different operation conditions. It can be set in normal
mode to periodically monitor the ambient temperature, or in shutdown mode to minimize
power consumption. The OS output operates in either of two selectable modes: comparator mode or OS interrupt mode. Its active state can be selected as either
HIGH or LOW. The fault queue that defines the number of consecutive faults in order to
activate the OS output is programmable as well as the set-point limits.
The temperature register always stores an 11-bit two’s complement data giving a
temperature resolution of 0.125 C. This high temperature resolution is particularly useful
in applications of measuring precisely the thermal drift or runaway. When the LM75B is
accessed the conversion in process is not interrupted (that is, the I2 C-bus section is totally
independent of the Sigma-Delta converter section) and accessing the LM75B
continuously without waiting at least one conversion time between communications will
not prevent the device from updating the Temp register with a new conversion result. The
new conversion result will be available immediately after the Temp register is updated.
The LM75B powers up in the normal operation mode with the OS in comparator mode,
temperature threshold of 80 C and hysteresis of 75 C, so that it can be used as a
stand-alone thermostat with those pre-defined temperature set points.
2. Features and benefits Pin-for-pin replacement for industry standard LM75 and LM75A and offers improved
temperature resolution of 0.125 C and specification of a single part over power supply
range from 2.8 V to 5.5VI2 C-bus interface with up to 8 devices on the same bus Power supply range from 2.8 V to 5.5V Temperatures range from 55 C to +125C
LM75B
Digital temperature sensor and thermal watchdog
Rev. 5 — 22 January 2014 Product data sheet
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog Frequency range 20 Hz to 400 kHz with bus fault time-out to prevent hanging up the
bus 11-bit ADC that offers a temperature resolution of 0.125C Temperature accuracy of:2 C from 25 C to +100C3 C from 55 C to +125C Programmable temperature threshold and hysteresis set points Supply current of 1.0 A in shutdown mode for power conservation Stand-alone operation as thermostat at power-up ESD protection exceeds 4500 V HBM per JESD22-A114 and 2000 V CDM per
JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Small 8-pin package types: SO8, TSSOP8, 3 mm2 mm XSON8U, and
2mm 3mmHWSON8
3. Applications System thermal management Personal computers Electronics equipment Industrial controllers
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
4. Ordering information[1] LM75BGD cannot be production cold temperature tested because of manufacturing process constraints. Although no LM75BGD
complaints have been noted, NXP recommends consideration/use of the LM75BTP instead of the LM75BGD in operating environments
of less than 0C.
4.1 Ordering options
Table 1. Ordering informationLM75BD LM75BD SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
LM75BDP LM75B TSSOP8 plastic thin shrink small outline package; 8 leads; body width3 mm SOT505-1
LM75BGD[1] 75B XSON8U plastic extremely thin small outline package; no leads; 8 terminals;
UTLP based; body 32 0.5 mm
SOT996-2
LM75BTP M75 HWSON8 plastic thermal enhanced very very thin small outline package; leads; 8 terminals, 23 0.8 mm
SOT1069-2
Table 2. Ordering optionsLM75BD LM75BD,112 SO8 Standard marking * IC’s tube -
DSC bulk pack
2000 Tamb= 55 C to +125C
LM75BD,118 SO8 Reel 13” Q1/T1
*Standard mark SMD
2500 Tamb= 55 C to +125C
LM75BDP LM75BDP ,118 TSSOP8 Reel 13” Q1/T1
*Standard mark SMD
2500 Tamb= 55 C to +125C
LM75BGD LM75BGD,125 XSON8U Reel 7” Q3/T4 *Standard mark 3000 Tamb= 55 C to +125C
LM75BTP LM75BTP ,147 HWSON8 Reel 7” Q2/T3 *Standard mark 4000 Tamb= 55 C to +125C
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
5. Block diagram
6. Pinning information
6.1 PinningNXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
6.2 Pin description
7. Functional description
7.1 General operationThe LM75B uses the on-chip band gap sensor to measure the device temperature with
the resolution of 0.125 C and stores the 11-bit two’s complement digital data, resulted
from 11-bit A-to-D conversion, into the device Temp register. This Temp register can be
read at any time by a controller on the I2 C-bus. Reading temperature data does not affect
the conversion in progress during the read operation.
The device can be set to operate in either mode: normal or shutdown. In normal operation
mode, the temp-to-digital conversion is executed every 100 ms and the Temp register is
updated at the end of each conversion. During each ‘conversion period’ (Tconv) of about
100 ms the device takes only about 10 ms, called ‘temperature conversion time’ (tconv(T)),
to complete a temperature-to-data conversion and then becomes idle for the time
remaining in the period. This feature is implemented to significantly reduce the device
power dissipation. In shutdown mode, the device becomes idle, data conversion is
disabled and the Temp register holds the latest result; however, the device I2 C-bus
interface is still active and register write/read operation can be performed. The device
operation mode is controllable by programming bit B0 of the configuration register. The
temperature conversion is initiated when the device is powered-up or put back into normal
mode from shutdown.
In addition, at the end of each conversion in normal mode, the temperature data (or Temp)
in the Temp register is automatically compared with the overtemperature shutdown
threshold data (or Tth(ots)) stored in the Tos register, and the hysteresis data (or Thys)
stored in the Thyst register, in order to set the state of the device OS output accordingly.
The device Tos and Thyst registers are write/read capable, and both operate with 9-bit
two’s complement digital data. To match with this 9-bit operation, the Temp register uses
only the 9 MSB bits of its 11-bit data for the comparison.
The way that the OS output responds to the comparison operation depends upon the OS
operation mode selected by configuration bit B1, and the user-defined fault queue defined
by configuration bits B3 and B4.
Table 3. Pin descriptionSDA 1 Digital I/O. I2 C-bus serial bidirectional data line; open-drain.
SCL 2 Digital input. I2 C-bus serial clock input. 3 Overtemperature Shutdown output; open-drain.
GND 4 Ground. To be connected to the system ground. 5 Digital input. User-defined address bit2. 6 Digital input. User-defined address bit1. 7 Digital input. User-defined address bit0.
VCC 8 Power supply.
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdogIn OS comparator mode, the OS output behaves like a thermostat. It becomes active
when the Temp exceeds the Tth(ots), and is reset when the Temp drops below the Thys.
Reading the device registers or putting the device into shutdown does not change the
state of the OS output. The OS output in this case can be used to control cooling fans or
thermal switches.
In OS interrupt mode, the OS output is used for thermal interruption. When the device is
powered-up, the OS output is first activated only when the Temp exceeds the Tth(ots); then
it remains active indefinitely until being reset by a read of any register. Once the OS output
has been activated by crossing Tth(ots) and then reset, it can be activated again only when
the Temp drops below the Thys; then again, it remains active indefinitely until being reset
by a read of any register. The OS interrupt operation would be continued in this sequence:
Tth(ots) trip, Reset, Thys trip, Reset, Tth(ots) trip, Reset, Thys trip, Reset, etc. Putting the
device into the shutdown mode by setting the bit 0 of the configuration register also resets
the OS output.
In both cases, comparator mode and interrupt mode, the OS output is activated only if a
number of consecutive faults, defined by the device fault queue, has been met. The fault
queue is programmable and stored in the two bits, B3 and B4, of the Configuration
register. Also, the OS output active state is selectable as HIGH or LOW by setting
accordingly the configuration register bit B2.
At power-up, the device is put into normal operation mode, the Tth(ots) is set to 80 C, the
Thys is set to 75 C, the OS active state is selected LOW and the fault queue is equal to1.
The temp reading data is not available until the first conversion is completed in about
100 ms.
The OS response to the temperature is illustrated in Figure6.
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
7.2I2 C-bus serial interfaceThe LM75B can be connected to a compatible 2-wire serial interface I2 C-bus as a slave
device under the control of a controller or master device, using two device terminals, SCL
and SDA. The controller must provide the SCL clock signal and write/read data to/from the
device through the SDA terminal. Notice that if the I2 C-bus common pull-up resistors have
not been installed as required for I2 C-bus, then an external pull-up resistor, about 10 k,
is needed for each of these two terminals. The bus communication protocols are
described in Section 7.10.
7.2.1 Bus fault time-outIf the SDA line is held LOW for longer than tto (75 ms minimum/ 13.3 Hz; guaranteed at ms minimum/20 Hz), the LM75B will reset to the idle state (SDA released) and wait
for a new START condition. This ensures that the LM75B will never hang up the bus
should there be conflict in the transmission sequence.
7.3 Slave addressThe LM75B slave address on the I2 C-bus is partially defined by the logic applied to the
device address pins A2, A1 and A0. Each of them is typically connected either to GND for
logic 0, or to VCC for logic 1. These pins represent the three LSB bits of the device 7-bit
address. The other four MSB bits of the address data are preset to ‘1001’ by hard wiring
inside the LM75B. Table 4 shows the device’s complete address and indicates that up to devices can be connected to the same bus without address conflict. Because the input
pins, SCL, SDA and A2to A0, are not internally biased, it is important that they should not
be left floating in any application.
7.4 Register listThe LM75B contains four data registers beside the pointer register as listed in Table5.
The pointer value, read/write capability and default content at power-up of the registers
are also shown in Table5.
Table 4. Address table1 = HIGH; 0 = LOW. 0 0 1 A2 A1 A0
Table 5. Register tableConf 01h R/W 00h Configuration register: contains a single 8-bit data
byte; to set the device operating condition; default=0.
Temp 00h read only n/a Temperature register: contains two 8-bit data bytes; store the measured Temp data.
Tos 03h R/W 5000h Overtemperature shutdown threshold register:
contains two 8-bit data bytes; to store the
overtemperature shutdown Tth(ots) limit;
default=80 C.
Thyst 02h R/W 4B00h Hysteresis register: contains two 8-bit data bytes; store the hysteresis Thys limit; default=75 C.
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
7.4.1 Pointer registerThe Pointer register contains an 8-bit data byte, of which the two LSB bits represent the
pointer value of the other four registers, and the other 6 MSB bits are equal to 0, as shown
in Table 6 and Table 7. The Pointer register is not accessible to the user, but is used to
select the data register for write/read operation by including the pointer data byte in the
bus command.
Because the Pointer value is latched into the Pointer register when the bus command
(which includes the pointer byte) is executed, a read from the LM75B may or may not
include the pointer byte in the statement. To read again a register that has been recently
read and the pointer has been preset, the pointer byte does not have to be included. To
read a register that is different from the one that has been recently read, the pointer byte
must be included. However, a write to the LM75B must always include the pointer byte in
the statement. The bus communication protocols are described in Section 7.10.
At power-up, the Pointer value is equal to 00 and the Temp register is selected; users can
then read the Temp data without specifying the pointer byte.
7.4.2 Configuration registerThe Configuration register (Conf) is a write/read register and contains an 8-bit
non-complement data byte that is used to configure the device for different operation
conditions. Table 8 shows the bit assignments of this register.
Table 6. Pointer register000000pointer value
Table 7. Pointer value 0 Temperature register (Temp) 1 Configuration register (Conf) 0 Hysteresis register (Thyst) 1 Overtemperature shutdown register (Tos)
Table 8. Conf registerLegend: * = default value.
B[7:5] reserved R/W 000* reserved for manufacturer’s use; should be kept as
zeroes for normal operation
B[4:3] OS_F_QUE[1:0] R/W OS fault queue programming
00* queue value = 1 queue value = 2 queue value = 4 queue value = 6 OS_POL R/W OS polarity selection OS active LOW OS active HIGH
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
7.4.3 Temperature registerThe Temperature register (Temp) holds the digital result of temperature measurement or
monitor at the end of each analog-to-digital conversion. This register is read-only and
contains two 8-bit data bytes consisting of one Most Significant Byte (MSByte) and one
Least Significant Byte (LSByte). However, only 11 bits of those two bytes are used to store
the Temp data in two’s complement format with the resolution of 0.125 C. Table 9 shows
the bit arrangement of the Temp data in the data bytes.
When reading register Temp, all 16 bits of the two data bytes (MSByte and LSByte) are
provided to the bus and must be all collected by the controller to complete the bus
operation. However, only the 11 most significant bits should be used, and the 5 least
significant bits of the LSByte are zero and should be ignored. One of the ways to calculate
the Temp value in C from the 11-bit Temp data is: If the Temp data MSByte bit D10= 0, then the temperature is positive and Temp value
(C)= +(Temp data) 0.125 C. If the Temp data MSByte bit D10= 1, then the temperature is negative and
Temp value (C)= (two’s complement of Temp data) 0.125 C.
Examples of the Temp data and value are shown in Table 10. OS_COMP_INT R/W OS operation mode selection OS comparator OS interrupt SHUTDOWN R/W device operation mode selection normal shutdown
Table 8. Conf register …continuedLegend: * = default value.
Table 9. Temp register
Table 10. Temp register value011 1111 1000 3F8 1016 +127.000C
011 1111 0111 3F7 1015 +126.875C
011 1111 0001 3F1 1009 +126.125C
011 1110 1000 3E8 1000 +125.000C
000 1100 1000 0C8 200 +25.000C
000 0000 0001 001 1 +0.125C
000 0000 0000 000 0 0.000C
111 1111 1111 7FF 1 0.125C
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdogFor 9-bit Temp data application in replacing the industry standard LM75, just use only MSB bits of the two bytes and disregard 7 LSB of the LSByte. The 9-bit Temp data with
0.5 C resolution of the LM75B is defined exactly in the same way as for the standard
LM75 and it is here similar to the Tos and Thyst registers.
The only MSByte of the temperature can also be read with the use of a one-byte reading
command. Then the temperature resolution will be 1.00 C instead.
7.4.4 Overtemperature shutdown threshold (Tos) and hysteresis (Thyst) registersThese two registers, are write/read registers, and also called set-point registers. They are
used to store the user-defined temperature limits, called overtemperature shutdown
threshold (Tth(ots)) and hysteresis temperature (Thys), for the device watchdog operation.
At the end of each conversion the Temp data will be compared with the data stored in
these two registers in order to set the state of the device OS output; see Section 7.1.
Each of the set-point registers contains two 8-bit data bytes consisting of one MSByte and
one LSByte the same as register Temp. However, only 9 bits of the two bytes are used to
store the set-point data in two’s complement format with the resolution of 0.5 C. Table 11
and Table 12 show the bit arrangement of the Tos data and Thyst data in the data bytes.
Notice that because only 9-bit data are used in the set-point registers, the device uses
only the 9 MSB of the Temp data for data comparison.
When a set-point register is read, all 16 bits are provided to the bus and must be collected
by the controller to complete the bus operation. However, only the 9 most significant bits
should be used and the 7 LSB of the LSByte are equal to zero and should be ignored.
Table 13 shows examples of the limit data and value.
111 0011 1000 738 200 25.000C
110 0100 1001 649 439 54.875C
110 0100 1000 648 440 55.000C
Table 10. Temp register value …continued
Table 11. Tos register
Table 12. Thyst register
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
7.5 OS output and polarityThe OS output is an open-drain output and its state represents results of the device
watchdog operation as described in Section 7.1. In order to observe this output state, an
external pull-up resistor is needed. The resistor should be as large as possible, up to
200 k, to minimize the Temp reading error due to internal heating by the high OS sinking
current.
The OS output active state can be selected as HIGH or LOW by programming bit B2
(OS_POL) of register Conf: setting bit OS_POL to logic 1 selects OS active HIGH and
setting bit B2 to logic 0 sets OS active LOW. At power-up, bit OS_POL is equal to logic 0
and the OS active state is LOW.
7.6 OS comparator and interrupt modesAs described in Section 7.1, the device OS output responds to the result of the
comparison between register Temp data and the programmed limits, in registers Tos and
Thyst, in different ways depending on the selected OS mode: OS comparator or interrupt. The OS mode is selected by programming bit B1 (OS_COMP_INT) of
register Conf: setting bit OS_COMP_INT to logic 1 selects the OS interrupt mode, and
setting to logic 0 selects the OS comparator mode. At power-up, bit OS_COMP_INT is
equal to logic 0 and the OS comparator is selected.
The main difference between the two modes is that in OS comparator mode, the OS
output becomes active when Temp has exceeded Tth(ots) and reset when T emp has
dropped below Thys, reading a register or putting the device into shutdown mode does not
change the state of the OS output; while in OS interrupt mode, once it has been activated
either by exceeding Tth(ots) or dropping below Thys, the OS output will remain active
indefinitely until reading a register, then the OS output is reset.
Temperature limits Tth(ots) and Thys must be selected so that Tth(ots) > Thys. Otherwise, the
OS output state will be undefined.
Table 13. Tos and Thyst limit data and value0 1111 1010 0FA 250 +125.0C
0 0011 0010 032 50 +25.0C
0 0000 0001 001 1 +0.5C
0 0000 0000 000 0 0.0C
1 1111 1111 1FF 1 0.5C
1 1100 1110 1CE 50 25.0C
1 1001 0010 192 110 55.0C
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
7.7 OS fault queueFault queue is defined as the number of faults that must occur consecutively to activate
the OS output. It is provided to avoid false tripping due to noise. Because faults are
determined at the end of data conversions, fault queue is also defined as the number of
consecutive conversions returning a temperature trip. The value of fault queue is
selectable by programming the two bits B4 and B3 (OS_F_QUE[1:0]) in register Conf.
Notice that the programmed data and the fault queue value are not the same. Table 14
shows the one-to-one relationship between them. At power-up, fault queue data= 0 and
fault queue value=1.
7.8 Shutdown modeThe device operation mode is selected by programming bit B0 (SHUTDOWN) of register
Conf. Setting bit SHUTDOWN to logic 1 will put the device into shutdown mode. Resetting
bit SHUTDOWN to logic 0 will return the device to normal mode.
In shutdown mode, the device draws a small current of approximately 1.0 A and the
power dissipation is minimized; the temperature conversion stops, but the I2 C-bus
interface remains active and register write/read operation can be performed. When the
shutdown is set, the OS output will be unchanged in comparator mode and reset in
interrupt mode.
7.9 Power-up default and power-on resetThe LM75B always powers-up in its default state with:
Normal operation mode
OS comparator mode
Tth(ots) = 80C
Thys = 75C
OS output active state is LOW
Pointer value is logic 00 (Temp)
When the power supply voltage is dropped below the device power-on reset level of
approximately 1.0 V (POR) for over 2 s and then rises up again, the device will be reset
to its default condition as listed above.
Table 14. Fault queue table 1 2 4 6
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
7.10 Protocols for writing and reading the registersThe communication between the host and the LM75B must strictly follow the rules as
defined by the I2 C-bus management. The protocols for LM75B register read/write
operations are illustrated in Figure 7 to Figure 12 together with the following definitions: Before a communication, the I2 C-bus must be free or not busy. It means that the SCL
and SDA lines must both be released by all devices on the bus, and they become
HIGH by the bus pull-up resistors. The host must provide SCL clock pulses necessary for the communication. Data is
transferred in a sequence of 9 SCL clock pulses for every 8-bit data byte followed by
1-bit status of the acknowledgement. During data transfer, except the START and STOP signals, the SDA signal must be
stable while the SCL signal is HIGH. It means that the SDA signal can be changed
only during the LOW duration of the SCL line. S: START signal, initiated by the host to start a communication, the SDA goes from
HIGH to LOW while the SCL is HIGH. RS: RE-START signal, same as the START signal, to start a read command that
follows a write command. P: STOP signal, generated by the host to stop a communication, the SDA goes from
LOW to HIGH while the SCL is HIGH. The bus becomes free thereafter. W: write bit, when the write/read bit = LOW in a write command. R: read bit, when the write/read bit = HIGH in a read command. A: device acknowledge bit, returned by the LM75B. It is LOW if the device works
properly and HIGH if not. The host must release the SDA line during this period in
order to give the device the control on the SDA line.
10. A’: master acknowledge bit, not returned by the device, but set by the master or host
in reading 2-byte data. During this clock period, the host must set the SDA line to
LOW in order to notify the device that the first byte has been read for the device to
provide the second byte onto the bus.
11. NA: Not Acknowledge bit. During this clock period, both the device and host release
the SDA line at the end of a data transfer, the host is then enabled to generate the
STOP signal.
12. In a write protocol, data is sent from the host to the device and the host controls the
SDA line, except during the clock period when the device sends the device
acknowledgement signal to the bus.
13. In a read protocol, data is sent to the bus by the device and the host must release the
SDA line during the time that the device is providing data onto the bus and controlling
the SDA line, except during the clock period when the master sends the master
acknowledgement signal to the bus.
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdogNXP Semiconductors LM75B
Digital temperature sensor and thermal watchdogNXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
8. Application design-in information
8.1 Typical application
8.2 LM75A and LM75B comparison[1] This option is updated to be compatible with the competitive parts. When the OS output has been activated in the interrupt mode due to
a temp limit violation, if the Configuration Shutdown bit B0 is set (to the LM75A), then the OS output activated status remains
unchanged, while (to the LM75B) the OS will be reset. The latter is compatible with the operation condition of the competitive parts.
[2] The LM75 series is intentionally designed to provide two successive temperature data bytes (MSByte and LSByte) for the 11-bit data
resolution and both bytes should be read in a typical application. In some specific applications, when only the MSByte is read using a
single-byte read command, it often happens that if bit D7 of the LSByte is zero, then the device will hold the SDA bus in a LOW state
forever, resulting in a bus hang-up problem, and the bus cannot be released until the device power is reset. This condition exists for the
LM75A but not for the LM75B. For the LM75B the temperature can be read either one byte or two bytes without a hang-up problem.
[3] The bus time-out is included for releasing the LM75B device operation whenever the SDA input is kept at a LOW state for too long
(longer than the LM75B time-out duration) due to a fault from the host. The trade-off for this option is the limitation of the I2C-bus low Hz. This option is compatible with some of the latest versions of the competitive parts.
Table 15. LM75A and LM75B comparisonavailability of the XSON8U (3 mm2 mm) package type no yes
OS output auto-reset when SHUTDOWN bit is set in interrupt mode[1] no yes
support single-byte reading of the Temp registers without bus lockup[2] no yes
bus fault time-out (75 ms, 200 ms)[3] no yes
minimum data hold time (tHD;DAT)[4] 10ns 0ns
ratio of conversion time / conversion period (typical)[5] 100 ms / 100 ms 10 ms / 100ms
supply current in shutdown mode (typical value) 3.5 A0.2A
HBM ESD protection level (minimum) >2000V >4500V
MM ESD protection level (minimum) >200V >450V
CDM ESD protection level (minimum) >1000V >2000V
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog[5] The LM75B performs the temperature-to-data conversions with a much higher speed than the LM75A. While the LM75A takes almost
the whole of conversion period (Tconv) time of about 100 ms to complete a conversion, the LM75B takes only about 1⁄10 of the period, or
about 10 ms. Therefore, the conversion period (Tconv) is the same, but the temperature conversion time (tconv(T)) is different between the
two parts. A shorter conversion time is applied to significantly reduce the device’s average power dissipation. During each conversion
period, when the conversion is completed, the LM75B becomes idled and the power is reduced, resulting in a lesser average power
consumption.
8.3 Temperature accuracyBecause the local channel of the temperature sensor measures its own die temperature
that is transferred from its body, the temperature of the device body must be stabilized and
saturated for it to provide the stable readings. Because the LM75B operates at a low
power level, the thermal gradient of the device package has a minor effect on the
measurement. The accuracy of the measurement is more dependent upon the definition
of the environment temperature, which is affected by different factors: the printed-circuit
board on which the device is mounted; the air flow contacting the device body (if the
ambient air temperature and the printed-circuit board temperature are much different,
then the measurement may not be stable because of the different thermal paths between
the die and the environment). The stabilized temperature liquid of a thermal bath will
provide the best temperature environment when the device is completely dipped into it. A
thermal probe with the device mounted inside a sealed-end metal tube located in
consistent temperature air also provides a good method of temperature measurement.
If you would like to calculate the effect of self-heating, use Equation 1 below:
Equation 1 is the formula to calculate the effect of self-heating:
(1)
where:
T = Tj Tamb
Tj = junction temperature
Tamb = ambient temperature
Rth(j-a) = package thermal resistance
VDD = supply voltage
IDD(AV) = average supply current
VOL(SDA) = LOW-level output voltage on pin SDA
VOL(EVENT) = LOW-level output voltage on pin EVENT
IOL(sink)(SDA) = SDA output current LOW
IOL(sink)EVENT = EVENT output current LOW
Calculation example:Tamb (typical temperature inside the notebook) = 50C
IDD(AV) = 400 A
VDD = 3.6V
Maximum VOL(SDA) = 0.4V
IOL(sink)(SDA) = 1 mA
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdogVOL(EVENT) = 0.4 V
IOL(sink)EVENT = 3 mA
Rth(j-a) = 56 C/W
Self heating due to power dissipation is:
(2)
8.4 Noise effectThe LM75B device design includes the implementation of basic features for a good noise
immunity:
The low-pass filter on both the bus pins SCL and SDA;
The hysteresis of the threshold voltages to the bus input signals SCL and SDA, about
500 mV minimum;
All pins have ESD protection circuitry to prevent damage during electrical surges. The
ESD protection on the address, OS, SCL and SDA pins it to ground. The latch-back
based device breakdown voltage of address/OS is typically 11 V and SCL/SDA is
typically 9.5 V at any supply voltage but will vary over process and temperature. Since
there are no protection diodes from SCL or SDA to VCC, the LM75B will not hold the 2 C lines LOW when VCC is not supplied and therefore allow continued I2 C-bus
operation if the LM75B is de-powered.
However, good layout practices and extra noise filters are recommended when the device
is used in a very noisy environment:
Use decoupling capacitors at VCC pin.
Keep the digital traces away from switching power supplies.
Apply proper terminations for the long board traces.
Add capacitors to the SCL and SDA lines to increase the low-pass filter
characteristics.
NXP Semiconductors LM75B
Digital temperature sensor and thermal watchdog
9. Limiting values
10. Recommended operating conditions
Table 16. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VCC supply voltage 0.3 +6.0 V input voltage at input pins 0.3 +6.0 V input current at input pins 5.0 +5.0 mA
IO(sink) output sink current on pin OS - 10.0 mA output voltage on pin OS 0.3 +6.0 V
Tstg storage temperature 65 +150 C junction temperature - 150 C
Table 17. Recommended operating characteristicsVCC supply voltage 2.8 - 5.5 V
Tamb ambient temperature 55 - +125 C
