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LM4500ANNSN/a2avaiLM4500A High Fidelity FM Stereo Demodulator with Blend


LM4500AN ,LM4500A High Fidelity FM Stereo Demodulator with BlendNational _ Semiconductor LM4500A High Fidelity FM Stereo Demodulator with Blend
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LM4500AN
LM4500A High Fidelity FM Stereo Demodulator with Blend
National
'Fllt,tifii'gi1t,ua,,
LM4500A High Fidelity FM Stereo
Demodulator with Blend
General Description
The LM4500A is an improved stereo demodulator IC offer-
ing very low audio distortion. A new demodulator technique
minimizes adjacent station interference caused by subcarri-
er harmonics and prevents lock-up problems from pilot car-
rier frequency harmonics. The 10 features a blend circuit
which optimizes the signal-to-noise ratio under weak signal
conditions by gradually combining left and right channel in-
formation.
Features
Low distortion-OA % typ
Voltage controlled blend
Adjustable gain
55 dB supply ripple rejection
Low output impedance
Requires no external inductors
Wide supply range 8V-16V
High subcarrier harmonic rejection
Large input dynamic ranger-tti Vp-p
High treparation-fixed or adjustable
Reduced stereo-mono DC shift-S mV typ
Excellent rejection of 57 kHz ARI subcarrier
Typical Application
I-1BVDc
I--t m__ l,,
1mm 0.41uF -- Pu
momma Tr c9 c5 C8
f 0-1uF ozzuF SEPARATION Mt "
CONTROL
- 1 , numsuuz
c3 momma
w 220pF t
10k um 16 15 " t3 —IIZ 11 1n a
vco mo
ADJUST LmsouA =
comosne + ___l‘ 2 7 l'
INPUT =
ct ---l H-
0.0062uF
STEREO
mchTon
'Matal film, zero temperature txNtfticitmt reslstor recommended
OUTPUTS
FIGURE 1
Order Number LM4500AN
See NS Package Number N16A
STEREO
TL/ H/ 7073- 1
VOOSVW'I
LM4500A
Absolute Maximum Ratings
it Mllltary/Aerospace speclfled devlces are required,
please contact the National SetNttttrtdtttttor Sales
OfflttttfDItttrlbutttrs for availability and ttpeeitleatltsntr.
Power Supply Voltage
Power Dissipation (Package Limitation)
Derate above TA = + 25°C
1800 mW
15 mW/'C
Operating Temperature Range (Ambient) -40'C to + 85°C
Storage Temperature Range
Lamp Drive Voltage
Max Voltage at Pin 7 with Lamp "Off"
16V Lamp Current
Blend Control Input Voltage (Pin 11)
Lead Temperature (Soldering, 10 sec.)
-65°C to + 150°C
100 mA
Electrical Characteristics Unless otherwise noted: Vcc = 12 VDC, TA = 25'C, Vp-p standard multiplex com-
posite signal with L or R channel only modulated at 1.0 kHz and with 10% pilot level, using circuit of Figure 1
Parameter Conditions Min Typ Max Units
Stereo Channel Separation Unadiusted 30 dB
Optimized on Other Channel (Note 1) 40 dB
Measured Voltage Gain (Note 1) 0.8 1 1.2
THD 2.5 Vp-p Composite Input Signal 0.15 0.3 %
1.5 Vp-p Composite Input Signal 0.08 %
Signal-to-Noise Ratio DIN45405 Quasi Peak Reading 83 dB
rms 20 Hz-15 kHz 88 dB
Ultrasonic Frequency Rejection 19 kHz 31 dB
38 kHz 45 dB
Stereo Switch Level 19 kHz Input Level for Lamp "On" 12 16 20 mVrms
Hysteresis 8 dB
Output Voltage Change With Mono/Stereo Switching (Note 2) 3 20 mVDc
Stereo Blend Control Voltage (Pin 11) 3 dB Separation 0.7 V
(See Figure 8) 30 dB Separation 1.7 V
Minimum Separation Pin 11 at 0V 1 dB
Monaural Channel Imbalance Pilot Tone Off 0.03 0.3 dB
Sub-Carrier Harmonic Rejection 76 kHz 80 dB
1 14 kHz 70 dB
152 kHz 83 dB
Supply Ripple Rejection f = 1 kHz 57 dB
Input Impedance 50 kn
Output Impedance 100 n
Blend Control Current (Note 1) - 100 - 300 pA
Capture Range i 4 %
Operating Supply Voltage 8 16 V
Current Drain Lamp Disconnected 35 mA
Note l.. See Applications Information and Circuit Description.
Note 2.. This test ls done with the stereo indicator lamp dlsconnected in order to remove DC shift due to thermal changes. These shifts have long time constants
(100 ms) and therefore do not produce audible translents.
Typical Performance Characteristics
Supply Current vs
Supply Voltagg 7
SUNlV CURRENT (MAI
I it Mitt 11131‘151l
SUHLV VOLTAGE (V)
Channel Separation "
Supply Voltage
" " t mix, us'mn mam
I I " " 1111 " ""
SUPPLY VDL‘IABE M
Stereo Separation "
Temperature
USIIESTERED
3 W no usuaccmcun
E to wk
, ' "m 's
" uuuuum _ K.
-6lt -N g " " " IO
IEMRATUHE t''trr
Galn vs Temperature
-q -20 ll " " ID "
TEMPERATURE t''to
POWER SUPPLY REJEtTION MI)
rnmumcy mun (m. TOTAL "Anunlll: nlsrnrmnn (X)
THRESHOLD VOLTAGE (lVl-i)
Power Supply Rejection vs
Supply Voltage
0- t Hit,“ llIVnm " Ptlt "
'iruittttt3tqtstir
SUN“ VDLTAGE M
Total Harmonie Distortion
" Composite Input Level
Itrtt I " Von
" uquo
" Van: .
' a t2 It
ll 1 2 3 I i
COMPOSITE INPUT lEVEL W”)
VCO Free Running
Frequency Drlft vs
Temperature
'll TEMPERATURE IOEFFICIENT
, TIHIRB BOWONEKTS - R1,”. "
- tl . P1
-m 420 omPt1 CAPACITOR - Cl
-M -ttl ' 20 " 50 ID
TEWEHATURE PC)
Stereo Swltch Threshold
vs Temperature
-o -til B til q " M
YEW‘EHATURE I "Cl
LA. rm SITURATIOII VOLYAGE (V)
INPUT IMDIICE llfl)
SATURATIOI V0 lTAGE (V)
VCO Free Running
Frequency vs
Supply Voltage
I I " tt 12 " " “II
SUHLV VOLTAGE M
Lamp Pln Saturation
Voltage vs Current
o we zoo zoo m nu
um Ptit CURRENT (IA)
Input Impedance "
Temperature
-O-til n " 40 u u
TEMPERATURE ("Cl
Lamp Pin Saturation
Voltage vs
Temperature
40 -M tt 20 “I lo ”I!
TEIIPERATURE Ct)
TL/H/7973-2
VOOSWH'I
LM4500A
Typical Performance Characteristics (Continued)
Total Harmonic Dlstortlon Separation " Power Supply Relectlon
" F vs F
A . " N
5 " ii so
E E " E 50
, 2 ii
g a M ' m
x m USING STEREO t
g " Amusma g n
50 tttlt m 5410 1k " 5k 10k ISI so "II m 500 tt " it III 15k IN " ttlt tMt
FREQUENBY (N1) FREQUENCY Oh)
FREQUENBV (Hz)
Adjusted Separation vs Unadjusted Separation "
VCO Free Running VCO Free Running Capture Range "
Frequency Frequency Pilot Level
50 200
USING STEREO ADJUSTING CIRCUIT,
OITIMIZED AT = 19.0 A
I l I t 1st:
55 ut''t.5 40 VII'LS '
li'" W" PILOT v ' " 1ltrtr iii 1 E
; n " ; t Itil
tp. " 2 5
E 5 " a'
E if, E IO
M " " 20 t,
VIN . E "
III% "LOT T0 MONO
25 " n
t8Jt t8.4 t8.8 19.2 116 20.0 ".0 ttA 1].! '" 1].! Ill ".0 Ill l” tthit ttlt
ttttt FREE RUNNING FREQUENtV (kHz) tttm FREE RUNNING FREQUENCY (H11) FREQUEIEV (Hill
TL/H/7973-3
Block Diagram
t"itrttr
II III: ttrg'
MODULAIIIR MM PASS OSCILIAYDR " L.“ JOHKBOI
t FILTER t28 Ill: CEUITEI
" in: ar
" In: Llu"
HODU LATO I
WW PASS '
BTERED
MD MI ll"!!!
DIFFERENYIAL
MPLIFIER
" END CONYRDL
FIGURE 2
nmuumn --otrtx
TL/H/7973-4
Circuit Description
INTRODUCTION
The LM4500A is a phase-lock-loop stereo decoder which
incorporates a variable separation control, and in which
sensitivity to the third harmonics of both the pilot and sub-
carrier frequencies has been eliminated by the use of appro-
priate, digitally generated, waveforms in the phase-lock-loop
and decoder sections.
The variable separation control may be operated manually,
or by a receiver’s AGC or S meter signals, to provide
smooth transitions between monaural and stereo reception.
It operates only during stereo reception: the circit switches
automatically to monaural if the 19 kHz pilot tone is absent.
The elimination of sensitivity to the third harmonic of the
sub-carrier (114 kHz) excludes interference from the side-
bands of adjacent transmitters, while the elimination of sen-
sitivity to the third harmonic of the pilot tone (57 kHz) ex-
cludes interference from the ARP system which employs
this frequency.
CIRCUIT OPERATION
The block diagram of the circuit, shown in Figure a consists
of three sections, the phase-Iock-loop, including the digital
waveform generator, the stereo switch, and the decoder, in
which the composite stereo signal is demodulated and ma-
trixed to separate L and R channels.
In the phase-lock-Ioop the internal RC oscillator, operating
at 228 kHz, feeds a 3-stage Johnson counter, via a binary
divider, to generate a series of 19 kHz square waves. By the
use of suitably connected NAND and EXCLUSIVE OR
gates, the waveforms shown in Figure 3, which are used to
drive the various modulators in the circuit, are developed.
'Auto Radio Information - used in Europe
Modulator Drive Waveform
PH. (19 kHz)
J'"""""""'
STEREO SWITCH __.r-
(19k!!!)
n Cl T""l
DECUDER
(38 kHz) n TI
The use of such drive waveforms produces the modulating
functions also shown in Figure 3. The usual square wave-
forms have been replaced in the PLL and decoder sections
by 3-level forms which contain no third harmonic (actually
no harmonics which are mutliples of 2 or 3 are present).
This eliminates the frequency translation of interference
from these bands into the low frequency region. Such trans-
lation may produce audible components in the decoder sec-
tion from the sidebands of adjacent channel FM signals,
and may produce phase litter, and consequent intermodula-
tion distortion, in the PLL, from the modulated 57 kHz tones
of the ARI system. The LM4500A is inherently free from
these effects.
The stereo switch section is of conventional form (ag.
LM1310).
The decoder section consists of a modulator (driven by the
waveforms shown in Figure 3) whose outputs are the invert-
ed and non-inverted channel difference signals. These sig-
nals pass to the output amplifiers via the variable blend cir-
cuit in which they are partially combined, and hence mutual-
ly attenuated, according to the control voltage applied.
Matrixing occurs at the inputs of the output amplifiers,
where the unmodified composite signal is added to the
blended channel difference signals. The stereo separation
may be progressively reduced from maximum to zero; de-
pendent on the blending. The control law has been made
non-linear, as the major redistribution of sound energy oc-
curs at very low separation levels. For monaural, or very
weak stereo signals, the modulator in the decoder section is
deactivated by the stereo switch circuit. The variable sepa-
ration control is thus, also, automatically disabled.
Modulating Functions
TL/H/7973-5
FIGURE 3. Digital Waveforms
VOOSVW'I
LM4500A
Applications Information
GAIN AND DE-EMPHASIS
The gain and de-emphasis characteristics of the circuit are
defined by shunt feedback via the external RC networks
(R3, C5, R4, C7 of Figure f) around the output amplifiers.
The gain is unity when resistors of 5.1 kn are used. Higher
gains may be obtained by using networks of the form shown
in Figure 4.
PIN 3 pot ' Pill 5 PIN 8
TL/H/7973-6
FIGURE 4. Output Amplifier Feedback Networks
The resistors R6, R7 are added to correct the output quies-
cent voltage levels which are optimized for R3, R4 = 5.1 kn
and which would, if uncorrected, become too low with high-
er value resistors. Suitable network values are as follows:
Galn (dB) R3, R4 C6, C7 R6, R7
50 us 75 ps
0 5.1 kn IO nF 15 nF
3 6.8 kn 6.8 nF 10 nF 47k i 10%
6 10k 4.7 nF 6.8 nF 27k i 10%
The maximum output level is 1 Vrms; consequently the max
input is limited to 1.4 Vp-p if the gain is set to 6 dB.
CIRCUIT
SEPARATION ADJUSTMENT
A separation adjustment may be added, as shown in Figure
5, to compensate for the receiver's IF characteristics.
This network reduces the amplification of the channel sum
signal in the decoder, to compensate the attenuation of the
channel difftyrtmtm signal in the receiver’s lF section. The
network shown will compensate for up to 2 dB attenuation
at 38 kHz. The decoder gain is, obviously, reduced by an
amount equal to the compensation required. When used as
described. the adjustment also corrects the inherent sepa-
ration of the decoder, which may be optimized on one chan-
nel. Optimization of both channels is possible if separate
potentiometers are used to feed each output amplifier.
Plr"o--AAAr--
Pm6o--NVV--
TL/H/7973-7
FIGURE S. Networking Providing Adlustable Separation
VARIABLE SEPARATION (BLEND) CONTROL
AND 19 kHz OUTPUT
To retain the 16-Pin package the blend control has been
combined with the 19 kHz output on Pin ll, The internal
circuit providing this combination is shown in Figure 6.
If Pin 11 is left open-circuit the 19 kHz signal appears at a
mean DC level of4V. The blend circuit is inoperative at this
level and the decoder provides full separation. The 19 kHz
signal can be used to tune the internal oscillator.
To reduce the separation the voltage on Pin 11 is reduced.
At 3.2V T2 ceases conduction and the 19 kHz signal disap-
pears.
At 2.0V the blend circuit comes into operation and the sepa-
ration decreases according to the curve shown in Figure 8.
TL/ H/7973-8
FIGURE 6. Blend Control Input Circuit
Applications Information (Continued)
PIN II
TEST POINT
IN kHz MONITOR
TL/H/7973-9
FIGURE r. Oscillator Network for Direct Frequency Measurement
Separation " Blend (Pin 11) Voltage
SEPARATION (68)
" " " 1.0 " 1.4 1.0 " "
" VOLTAGE APPLIED T0 PIN tt Noe)
TL/H/7973-10
FIGURE 8
Oscillator Tuning
If the variable separation facility is not required Pin 11 is left
open-circuit and the 19 kHz signal which then appears may
be used to indicate the oscillator frequency. It the variable
separation is used, and the drive circuit prevents access to
the 19 kHz signal, then the oscillator frequency must be
measured directiy. A test point should be obtained by modi-
tying the oscillator RC network as in Figure 7.
The output is a pulse train of appoximateiy 1.5V amplitude.
Connecting frequency counters of up to 300 pF input capac-
itance produces less than 0.3% change of the oscillator
frequency, which should be set to 228 kHz.
HIGH LOOP GAIN COMPONENTS
For applications demanding operation under low pilot level
(e.g. car radio) the following component changes to Figure 1
are recommended.
R1 = 12k CS=150pF
R2 --= 1.5K C4 = 330 pF
R8 = 330 cs = 150 pF
P1 = 10k
EXTERNAL MONO-STEREO SWITCHING
AND OSCILLATOR KILLING
If required the LM4500A can be forced Into mono mode
simply by grounding Pin 9 (see Figure f), The 228 kHz oscil-
lator will be automatically stopped.
The conditions governing mono/stereo switching on Pin 9
are the following:
Quiescent voltage: + 2.3 VDc
Current required to ensure mono operation (with
100 mVrms pilot level): 10 HA (from Pin 9 to ground)
Hysteresis: 0.7 pA
Stereo/mono switching & osclilator killing; less than
+ 500 mV
Maximum stray capacitance between Pin 9 and ground:
100 pF
EXTERNAL COMPONENT FUNCTIONS
P1 " kHz frequency adjustment.
P2 Channel separation adjustment and compensa-
tion for IF roll-off.
R3, R6 Gain fixing resistors. The values shown In the
schematic are for unity gain.
C6, C7 Do-emphasis capacitors. Value to give:
RC = 50 us.
VOOSVW'I
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