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LF198AH-LF198H/883-LF298H-LF298M-LF298MX Fast Delivery,Good Price
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LF198AHNSN/a37avaiPrecision Sample and Hold Amplifier
LF198H/883 |LF198H883N/a2avaiMonolithic Sample and Hold Circuit
LF298HNSN/a42avaiMonolithic Sample and Hold Circuit
LF298MNSN/a4771avaiMonolithic Sample and Hold Circuit
LF298MXNSN/a2avaiMonolithic Sample and Hold Circuit
LF398 MDC |LF398MDCNSN/a1613avaiMonolithic Sample and Hold Circuit
LF398ANNSN/a456avaiMonolithic Sample and Hold Circuit
LF398HNSN/a200avaiPrecision Sample and Hold Amplifier
LF398MN/a123avaiMonolithic Sample and Hold Circuit
LF398MXNSN/a18889avaiMonolithic Sample and Hold Circuit
LF398NNATIONALN/a47avaiPrecision Sample and Hold Amplifier in DIP8 Package


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LF198AH-LF198H/883-LF298H-LF298M-LF298MX-LF398 MDC-LF398AN-LF398H-LF398M-LF398MX-LF398N
Monolithic Sample and Hold Circuit
LF198/LF298/LF398, LF198A/LF398A
Monolithic Sample-and-Hold Circuits
General Description

The LF198/LF298/LF398 are monolithic sample-and-hold
circuits which utilize BI-FET technologyto obtain ultra-high accuracy with fast acquisitionof signal and low droop
rate. Operatingasa unity gain follower,dc gain accuracyis
0.002% typical and acquisition timeisas lowas6μsto
0.01%.A bipolar input stageis usedto achieve low offset
voltage and wide bandwidth. Input offset adjustis accom-
plished witha single pin, and does not degrade input offset
drift. The wide bandwidth allowsthe LF198tobe includedin-
sidethe feedback loopof1 MHzop amps without having sta-
bility problems. Input impedanceof 1010Ω allows high
source impedancestobe used without degrading accuracy.
P-channel junction FET’s are combined with bipolar devicesthe output amplifierto give droop ratesas lowas5 mV/min
witha1μF hold capacitor. The JFET’s have much lower
noise than MOS devices usedin previous designs anddo
not exhibit high temperature instabilities. The overall design
guaranteesno feed-through from inputto outputinthe hold
mode, evenfor input signals equaltothe supply voltages.
Features
Operates from ±5Vto ±18V supplies Less than10μs acquisition time TTL, PMOS, CMOS compatible logic input 0.5 mV typical hold stepatCh= 0.01μF Low input offset 0.002% gain accuracy Low output noisein hold mode Input characteristicsdo not change during hold mode High supply rejection ratioin sampleor hold Wide bandwidth Space qualified, JM38510
Logic inputsonthe LF198are fully differential with low input
current, allowing direct connectionto TTL, PMOS, and
CMOS. Differential thresholdis 1.4V. The LF198will operate
from ±5Vto ±18V supplies. “A” versionis available with tightened electrical
specifications.
Typical Connection and Performance Curve
Functional Diagram

DS005692-32
Acquisition Time

DS005692-16
July 2000
LF198/LF298/LF398,
LF198A/LF398A
Monolithic
Sample-and-Hold
Circuits
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