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L9733-L9733CN-L9733CNTR-L9733XP-L9733XPTR
Octal configurable low/high side driver
September 2013 Doc ID 11319 Rev 11 1/34
L9733

Octal self configuring low/high side driver
Features
Eight independently self configuring low/high
drivers Supply voltage from 4.5 V to 5.5 V RON(max) = 0.7  @ Tj = 25 °C,
RON(max) = 1.2  @Tj = 125 °C Minimum current limit of each output 1 A Output voltage clamping min. 40 V in low-side
configuration Output voltage clamping max. -14 V in high-side
configuration SPI interface for outputs control and for
diagnosis data communication Additional PWM inputs for 3 outputs Independent thermal shutdown for all outputs
open load, short to GND, short to Vb,
overcurrent diagnostics in latched or unlatched
mode for each channel Internal charge pump without need of external
capacitor Controlled SR for reduced EMC
Description

The L9733 is a highly flexible monolithic, medium
current, output driver that incorporates 8 outputs
that can be used as either internal low or high-side
drives in any combination.
Outputs 1-8 are self-configuring as high or low-
side drives. Self-configuration allows a user to
connect a high or low-side load to any of these
outputs and the L9733 will drive them correctly as
well as provide proper fault mode operation with
no other needed inputs. In addition, outputs 6, 7 and
8 can be PWM controlled via a external pins (IN6-8).
This device is capable of switching variable load
currents over the ambient range of -40 °C to
+125 °C. The outputs are MOSFET drivers to
minimize Vdd current requirements. For low-side
configured outputs an internal zener clamp from
the drain to gate with a breakdown of 50 V
minimum will provide fast turn off of inductive
loads. When a high-side configured output is
commanded Off after having been commanded
On, the source voltage will go to (VGND - 15 V).
An 16 bit SPI input is used to command the 8
output drivers either "On" or "Off", reducing the
I/O port requirement of the microcontroller.
Multiple L9733 can be daisy-chained. In addition
the SPI output indicates latched fault conditions
that may have occurred.

Table 1. Device summary
Contents L9733
2/34 Doc ID 11319 Rev 11
Contents Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1 Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.1 Functional operative range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.2 Jump start conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1.3 Operation at low battery condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1.4 Operation at load dump condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1.5 Loss of protection against short to battery . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.1 DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2 AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3 SPI characteristics and timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1 Configurations for outputs 1-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1.1 Low-side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1.2 High-side drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2 Outputs 1-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3 Outputs 6-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.4 Drn1-8 susceptibility to negative voltage transients . . . . . . . . . . . . . . . . . 19
4.5 Supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.5.1 Main power input (Vdd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.5.2 Battery supply (Vbat) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.5.3 Discrete inputs voltage supply (VDO) . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.6 Discrete inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.6.1 Output 6-8 enable input (In6, ln7, ln8) . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.6.2 Reset input (RES) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
L9733 Contents
Doc ID 11319 Rev 11 3/34
5.1 Serial data output (DO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.2 Serial data input (DI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.3 Chip select (CS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.4 Serial clock (SCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.5 Initial input command register and fault register SPI cycle . . . . . . . . . . . . 22
5.6 Input command register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Other L9733 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.1 Charge pump usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.2 Waveshaping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.3 POR register initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.4 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Fault operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.1 Low-side configured output fault operation . . . . . . . . . . . . . . . . . . . . . . . . 25
7.1.1 No latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.1.2 Latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.2 High-side configured output fault operation . . . . . . . . . . . . . . . . . . . . . . . 27
7.2.1 No latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.2.2 Latch mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
List of tables L9733
4/34 Doc ID 11319 Rev 11
List of tables

Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 5. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 6. DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 7. AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 8. SPI characteristics and timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 9. Bit command register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 10. Command register logic definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 11. Fault register definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 12. Fault logic definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 13. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
L9733 List of figures
Doc ID 11319 Rev 11 5/34
List of figures

Figure 1. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Output turn on/off delays and slew rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 3. DO loading for disable time measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 4. Output loading for slew rate measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 5. SPI input/output timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 6. SPI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 7. L9733 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 8. L9733 HVAC applicative examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 9. L9733 powertrain applicative examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 10. Optimized circuit layout to achieve proper EMI/ESD capability . . . . . . . . . . . . . . . . . . . . . 31
Figure 11. PowerSSO28 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . 32
Pin description L9733
6/34 Doc ID 11319 Rev 11
1 Pin description
Figure 1. Pin connection (top view)

Table 2. Pin description
L9733 Pin description
Doc ID 11319 Rev 11 7/34
Note: The exposed slug must be soldered on the PCB and connected to GND.
Table 2. Pin description (continued)
Operating conditions L9733
8/34 Doc ID 11319 Rev 11
2 Operating conditions
2.1 Operating range

This part may not operate if taken outside the operating range. Once the condition is
returned to within the specified maximum rating or the power is recycled, the part will
recover with no damage or degradation.

2.1.1 Functional operative range

4.5 V  Vbat  18 V (-40 °C  Tj  150 °C);
All the electrical capabilities are guaranteed by characterization as reported in Section3:
Electrical performance characteristics.
2.1.2 Jump start conditions

18 V  Vbat  27 V (-40 °C  Tj  150 °C);
Operation at Jump start condition for a maximum duration of 1 minute.
All ouputs are switched according to the commands on the SPI bus or the PWM inputs. The
SPI bus and the inputs are functional during the Jump-Start condition.
The over-temperature shutdown and over current protection of the device is not guaranteed
to stay functional for Vbat between 18 V and 27 V.
The reliability and the functionality of the L9733XP are not compromised when the Jump-
Start condition is not repeated for more than five times.
Table 3. Operating range
L9733 Operating conditions
Doc ID 11319 Rev 11 9/34
2.1.3 Operation at low battery condition

3.5 V  Vbat  4.5 V (-40 °C  Tj  150 °C);
All outputs are able to keep the status in according to the commands on the SPI bus or the
PWM inputs. Switching commands entered via the SPI bus might not be executed by the
L9733 at low-battery condition. The SPI bus and the inputs are functional during the Low-
Battery condition.
2.1.4 Operation at load dump condition

27 V  Vbat  40 V (-40 °C  Tj  150 °C)
There is not an internal circuit that switches OFF the drivers during load dump condition.
The over-temperature shutdown and over current protection of the device is not guaranteed
to stay functional during load dump condition.
2.1.5 Loss of protection against short to battery

When the battery supply voltage, Vbat (pin 14) is switched off during a short-to-battery
condition at a output in high-side configuration, the protection circuits are no longer
functional, and the L9733 may fail with EOS.
2.2 Absolute maximum ratings

This part may be irreparably damaged if taken outside the specified absolute maximum
ratings. Operation outside the absolute maximum ratings may also cause a decrease in
reliability.
Table 4. Absolute maximum ratings For the DRNx the MAX ASB value is the Max Clamp Voltage (see Table 6 on page 13 - DRNx Clamp
voltage). Device is only protected vs. GND.
Operating conditions L9733
10/34 Doc ID 11319 Rev 11
2.3 Thermal data

Table 5. Thermal data With 2s2p PCB thermally enhanced.
L9733 Electrical performance characteristics
Doc ID 11319 Rev 11 11/34 Electrical performance characteristics
These are the electrical capabilities this part was designed to meet. It is required that every
part meet these characteristics.
3.1 DC characteristics

Tamb = -40 to 125 °C, Vdd = 4.5 to 5.5 Vdc, Vbat = 4.5 to 18 Vdc (high-side configuration),
unless otherwise specified.
Table 6. DC characteristics
Electrical performance characteristics L9733
12/34 Doc ID 11319 Rev 11
Table 6. DC characteristics (continued)
L9733 Electrical performance characteristics
Doc ID 11319 Rev 11 13/34
Table 6. DC characteristics (continued)
Electrical performance characteristics L9733
14/34 Doc ID 11319 Rev 11
3.2 AC characteristics

Tamb = -40 to 125 °C, Vdd = 4.5 to 5.5 Vdc, Vbat = 4.5 to 18 Vdc, unless otherwise specified
RdsonDrn1-8  1.2 ; at Vbat between 3.5 V and 27 V and T between -40 °C and 150 °C Design Information, not tested.
Table 6. DC characteristics (continued)
Table 7. AC characteristics
L9733 Electrical performance characteristics
Doc ID 11319 Rev 11 15/34
Figure 2. Output turn on/off delays and slew rates
Table 7. AC characteristics (continued)
Electrical performance characteristics L9733
16/34 Doc ID 11319 Rev 11
3.3 SPI characteristics and timings

Tamb= -40 to 125 °C, Vdd = 4.5 to 5.5 Vdc, Vbat = 4.5 to 18 Vdc, unless otherwise specified
Table 8. SPI characteristics and timings Guaranteed by design.
L9733 Electrical performance characteristics
Doc ID 11319 Rev 11 17/34
Figure 3. DO loading for disable time measurement
Figure 4. Output loading for slew rate measurements
Figure 5. SPI input/output timings
Figure 6. SPI timing diagram
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