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L9341STN/a50avaiQUAD LOW SIDE DRIVER


L9341 ,QUAD LOW SIDE DRIVERELECTRICAL CHARACTERISTICS (Unless otherwise specified: 8V ≤ V ≤ 24V; 4.7V ≤ V ≤ 5.3V; –S CC40 °C ≤ ..
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L9341
QUAD LOW SIDE DRIVER
L9341
QUAD LOW SIDE DRIVER
AVANCE DATA

DU/DT AND DI/DT CONTROL
PWM CONTROLLED OUTPUT CURRENT
SHORT CURRENT PROTECTION AND DI-
AGNOSTIC
INTEGRATED FLYBACK DIODE
UNDERVOLTAGE SHUTDOWN
OVERVOLTAGE AND UNDERVOLTAGE DI-
AGNOSTIC
OVERTEMPERATURE DIAGNOSTIC
DESCRIPTION

The L9341 is a monolithic integrated circuit real-
ized in Multipower BCD-II mixed technology. The
driver is intended for inductive loads in synchro-
nous PWM applications, especially for valve driv-
ers. The output voltage and current rise and fall
slopes du/dt and di/dt are controlled.
BLOCK & APPLICATION DIAGRAM
ABSOLUTE MAXIMUM RATINGS
THERMAL DATA
Notes:
1. Schaffner transient specification: DIN 40839 test waveforms of the following type: 1, 2, 3a, 3b, 5 and 6.

The pulses are applied to the application circuit according to fig. 3.
2. The maximum output current results from the Schaffner pulses specified in note 1.
PIN CONNECTION (Top view)
L9341
ELECTRICAL CHARACTERISTICS (Unless otherwise specified: 8V ≤ VS ≤ 24V; 4.7V ≤ VCC ≤ 5.3V; –
40 °C ≤ Tj ≤ 150°C; IO ≤ 1A (note 3); IO ≤ 1.5A; Vsp = VS for t ≤ 400ms; VOUTP = VOUT for t ≤ 400ms;
Rext = 12.4KΩ ± 1%).
Notes:
3. The mean value is Io =
1 ∫ Io (t) dt
4. The outputs are switced off for Vcc ≤ Vccu. The logic is not reseted. For a reset, RES1 or RES2 must be used.
5. This current is measured in the GND - terminal when one single output is in flyback and consists of the supply current added to the value

of the output current source and the leakage current of the flyback diode. This leakage current is less than 1% of the nominal flyback current.
6. The PWM frequency is defined by an external capacitor. The PWM oscillator frequency is: fpwm =
fosc with fosc = Kf
Cosc ⋅ 1A/V and kin = 15 ⋅ 10-6;
the range is: 300Hz ≤ fpwm ≤ 3000Hz. The OSC Pin can be alternatively driven by an external TTL / CMOS signal.
7. For Iout ≥ Ioutl an internal comparator switches the corresponding output off for the current PWM cycle.
L9341
Figure 1: Logic Diagram of PWM Generation.
Figure 2: Output Switching Diagram.
Figure 3: Test Circuit for Schaffner Pulses.
L9341
Figure 4: Synchronous Serial Interface Protocol.
L9341
Figure 5: PWM Generation Function Table.
Figure 6: PWM Information From Microcontroller to QLSD.
L9341
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