L6758A-L6758ATR Fast Delivery |IC PHOENIX CO.,LIMITED

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L6758A-L6758ATR
High Performance (4+1) Dual Controller for VR12
July 2013 DocID023298 Rev 2 1/42
L6758A
High performance (4+1) dual controller for the VR12
Datasheet - production data
Features VR12 compliant with 25 MHz SVID bus rev 1.5 serialVID with programmable IMAX, TMAX,
VBOOT, ADDRESS Second generation LTB Technology™ Dual controller: two-to-four phase for core 1 phase for graphics (GFX) or system
agent (VSA) Single NTC design for TM, LL and IMON
thermal compensation (for each section) VFDE and GDC - gate drive control for
efficiency optimization DPM - dynamic phase management Dual remote sense 0.5% output voltage accuracy Fully-differential current sense across DCR AVP - adaptive voltage positioning Dual independent adjustable oscillator Dual current monitor Pre-biased output management 5 V supply, 12 V monitor Average and per-phase OC protection OV, UV and FB disconnection protection Dual VR_RDY VFQFPN48 6x6 mm package
Applications High-current VRM / VRD for desktops / servers
/ workstations / new generation CPUs
Description
L6758A is a dual controller designed to
power Intel® VR12 processors: all required
parameters are programmable through dedicated
pinstrapping.
The device features two-to-four phase
programmable operation for multi-phase sections
and a single-phase with independent control
loops. Both sections feature second generation
LTB Technology to provide fast load transient
response, minimizing and optimizing the output
filter composition.
The L6758A supports power state transitions
featuring VFDE, programmable DPM and GDC,
maintaining the best efficiency over all loading
conditions without compromising transient
responses. The device assures fast and
independent protection against load overcurrent,
under/overvoltage and feedback disconnections.
The device is available in VFQFPN48 package.

Table 1. Device summary
Contents L6758A
2/42 DocID023298 Rev 2
Contents Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . . . 4
1.1 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description and connection diagrams . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 VR12 serial data bus and IC configuration . . . . . . . . . . . . . . . . . . . . . . 15 Device description and operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Output voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.1 Multi-phase section: phase # programming . . . . . . . . . . . . . . . . . . . . . . . 21
6.2 Multi-phase section: current reading and current sharing loop . . . . . . . . 22
6.3 Multi-phase section: defining load-line . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.4 Multi-phase section: IMON information . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.5 Single-phase section: current reading . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.6 Single-phase section: defining load-line . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.7 Dynamic VID transition support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.8 DVID optimization: REF/SREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Output voltage monitoring and protection . . . . . . . . . . . . . . . . . . . . . . 27
7.1 Overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.2 Overcurrent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.2.1 Multi-phase section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.2.2 Overcurrent and power states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.2.3 Single-phase section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
DocID023298 Rev 2 3/42
L6758A Contents Single NTC thermal monitor and compensation . . . . . . . . . . . . . . . . . 30
8.1 Thermal monitor and VR_HOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
8.2 Thermal compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.3 TM and TCOMP design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Efficiency optimization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
9.1 Dynamic phase management (DPM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
9.2 Variable frequency diode emulation (VFDE) . . . . . . . . . . . . . . . . . . . . . . 33 Main oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 System control loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
11.1 Compensation network guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
11.2 LTB technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Typical application circuit and block diagram L6758A Typical application circuit and block diagram
1.1 Application circuit
Figure 1. Typical 4-phase application circuit
5/42L6758A Typical application circuit and block diagram
1.2 Block diagram
Figure 2. Block diagram

Partno	Mfg	Dc	Qty	Available	Descript
L6758A	ST	N/a	3376	avai	High Performance (4+1) Dual Controller for VR12
L6758ATR	ST	N/a	2257	avai	High Performance (4+1) Dual Controller for VR12