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L6747CTRSTN/a90avaiHigh current MOSFET driver


L6747CTR ,High current MOSFET driverblock diagramVCCBOOTEN70kUGATEHSPHASEL6747CVCCCONTROL LOGIC PWM PWM LGATELS& PROTECTIONS7kGNDDoc ID ..
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L6747CTR
High current MOSFET driver
April 2010 Doc ID 17127 Rev 1 1/15
L6747C

High current MOSFET driver
Features
Dual MOSFET driver for synchronous rectified
converters High driving current for fast external MOSFET
switching High frequency operation Enable pin Adaptive dead-time management Flexible gate-drive: 5 V to 12 V compatible High-impedance (HiZ) management for output
stage shutdown Preliminary overvoltage (OV) protection VFDFPN8 3x3 mm package
Applications
High current VRM / VRD for desktop / server /
workstation CPUs High current and high efficiency DC-DC
converters
Description

The L6747C is a flexible, high-frequency dual-
driver specifically designed to drive N-channel
MOSFETs connected in synchronous-rectified
buck topology.
Combined with ST PWM controllers, the driver
allows the implementation of complete voltage
regulator solutions for modern high-current CPUs
and for DC-DC conversion in general.
The L6747C embeds high-current drivers for both
high-side and low-side MOSFETS. The device
accepts a flexible power supply of 5 V to 12 V.
This allows optimization of the high-side and low-
side gate-drive voltage to maximize system
efficiency.
Anti shoot-through management prevents the
high-side and low-side MOSFETs from
conducting simultaneously and, combined with
adaptive dead-time control, minimizes the LS
body diode conduction time.
The L6747C features preliminary OV protection to
protect the load from dangerous overvoltage due
to MOSFET failures at startup.
The driver is available in a VFDFPN8 3x3 mm
package.
Table 1. Device summary
Contents L6747C
2/15 Doc ID 17127 Rev 1
Contents Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . . . 3 Pin information and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Pin information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Device description and operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1 High-impedance (HiZ) management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 Preliminary OV protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.3 BOOT capacitance design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.4 Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.5 Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
L6747C Typical application circuit and block diagram
Doc ID 17127 Rev 1 3/15 Typical application circuit and block diagram
Figure 1. L6747C typical application circuit
Figure 2. L6747C block diagram
Pin information and thermal data L6747C
4/15 Doc ID 17127 Rev 1 Pin information and thermal data
2.1 Pin information
Figure 3. Pin connection diagram (top view)
Table 2. Pin descriptions
L6747C Pin information and thermal data
Doc ID 17127 Rev 1 5/15
2.2 Thermal data
Table 3. Thermal data
Table 2. Pin descriptions (continued)
Electrical specifications L6747C
6/15 Doc ID 17127 Rev 1
3 Electrical specifications
3.1 Absolute maximum ratings
Table 4. Absolute maximum ratings
3.2 Electrical characteristics

VCC = 12 V±15%, TJ = 0 °C to 70 °C unless otherwise specified.

Table 5. Electrical characteristics
L6747C Electrical specifications
Doc ID 17127 Rev 1 7/15 Parameter(s) guaranteed by design, not fully tested in production
Table 5. Electrical characteristics (continued)
Device description and operation L6747C
8/15 Doc ID 17127 Rev 1 Device description and operation
The L6747C provides high-current driving control for both high-side and low-side N-channel
MOSFETs, connected as step-down DC-DC converters and driven by an external PWM
signal. The integrated high-current drivers allow the use of different types of power
MOSFETs (also multiple MOS to reduce the equivalent RDS(on)), maintaining fast switching
transition. The driver for the high-side MOSFET uses the BOOT pin for supply and the
PHASE pin for return. The driver for the low-side MOSFET uses the VCC pin for supply and
the PGND pin for return.
The driver includes anti-shoot-through and adaptive dead-time control to minimize low-side
body diode conduction time, maintaining good efficiency and eliminating the need for
Schottky diodes. When the high-side MOSFET turns off, the voltage on its source begins to
fall; when the voltage falls below the proper threshold, the low-side MOSFET gate drive
voltage is suddenly applied. When the low-side MOSFET turns off, the voltage at the LGATE
pin is sensed. When it drops below the proper threshold, the high-side MOSFET gate drive
voltage is suddenly applied. If the current flowing in the inductor is negative, the source of
the high-side MOSFET never drops. T o allow the low-side MOSFET to turn on even in this
case, a watchdog controller is enabled. If the source of the high-side MOSFET does not
drop, the low-side MOSFET is switched on, allowing the negative current of the inductor to
recirculate. This mechanism allows the system to regulate even if the current is negative.
Before VCC goes above the UVLO threshold, the L6747C keeps both the high-side and low-
side MOSFETS firmly OFF . Then, after the UVLO has been crossed, the EN and PWM
inputs take control over the driver’s operations.
The EN pin enables the driver. If low, it keeps all MOSFETs OFF (HiZ) regardless of the
status of PWM. When EN is high, the PWM input takes control. If externally set within the
HiZ window, the driver enters an HiZ state and both MOSFETS are kept in an OFF state
until PWM exits the HiZ window (see Figure 4).
After the UVLO threshold has been crossed and while in HiZ, the preliminary OV protection
is activated. If the voltage sensed through the PHASE pin goes above about 1.8 V, the low-
side MOSFET is latched ON in order to protect the load from dangerous overvoltage. The
driver status is reset from a PWM transition.
Driver power supply, as well as power conversion input, are flexible: 5 V and 12 V can be
chosen for high-side and low-side MOSFET voltage drive.
Figure 4. Timing diagram (EN = High)
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