L6732 ,Adjustable step-down controller with synchronous rectificationElectrical characteristics . . . . . 85 Device description . 105.1 Oscillator . 1 ..
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LC4064V-75T44C , 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
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LC4064V-75T48I , 3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
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L6732
Adjustable step-down controller with synchronous rectification
June 2008 Rev 6 1/37
L6732Adjustable step-down controller with synchronous rectification
Features Input voltage range from 1.8 V to 14 V Supply voltage range from 4.5 V to 14 V Adjustable output voltage down to 0.6 V
with ± 0.8 % accuracy over line voltage and
temperature (0 °C~125 °C) Fixed frequency voltage mode control TON lower than 100 ns 0 % to 100 % duty cycle External input voltage reference Soft-start and inhibit High current embedded drivers Predictive anti-cross conduction control Programmable high-side and low-side RDS(on)
sense over-current-protection Selectable switching frequency
250 kHz / 500 kHz Pre-bias start up capability Power good output Master/slave synchronization with 180° phase
shift Over voltage protection Thermal shutdown Package: HTSSOP16
Applications LCD and PDP TV High performance / high density DC-DC
modules Low voltage distributed DC-DC niPoL converters DDR memory supply Graphic cards
Table 1. Device summary
Contents L67322/37
Contents Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.1 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.1 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin connection and function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105.1 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2 Internal LDO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.3 Bypassing the LDO to avoid the voltage drop with low Vcc . . . . . . . . . . . 11
5.4 Internal and external references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.5 Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.6 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.7 Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.8 Monitoring and protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.9 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.10 Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.11 Minimum on-time (TON, MIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.12 Bootstrap anti-discharging system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.12.1 Fan's power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Application details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 216.1 Inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.2 Output capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.3 Input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.4 Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
L6732 demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
L6732 Contents
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7.1 20 A board description and PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.2 5 A board description and PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Summary description L6732
4/37
1 Summary description
The controller is an integrated circuit realized in BCD5 (BiCMOS-DMOS, version 5)
fabrication that provides complete control logic and protection for high performance step-
down DC-DC and niPoL converters.
It is designed to drive N-channel MOSFETs in a synchronous rectified buck topology. The
output voltage of the converter can be precisely regulated down to 600 mV with a maximum
tolerance of ±0.8 % and it is also possible to use an external reference from 0 V to 2.5 V.
The input voltage can range from 1.8 V to 14 V, while the supply voltage can range from
4.5 V to 14 V . High peak current gate drivers provide for fast switching to the external power
section, and the output current can be in excess of 20 A. The PWM duty cycle can range
from 0 % to 100 % with a minimum on-time (TON, MIN) lower than 100 ns making possible
conversions with very low duty cycle at high switching frequency. The device provides
voltage-mode control that includes a selectable frequency oscillator (250 kHz or 500 kHz).
The error amplifier features a 10 MHz gain-bandwidth-product and 5 V/µs slew-rate that
permits to realize high converter bandwidth for fast transient response. The device monitors
the current by using the RDS(on) of both the high-side and low-side MOSFET(s), eliminating
the need for a current sensing resistor and guaranteeing an effective over-current-protection
in all the application conditions. When necessary, two different current limit protections can
be externally set through two external resistors.
During the soft-start phase a constant current protection is provided while after the soft-start
the device enters in hiccup mode in case of over-current. During the soft-start, the sink
mode capability is disabled in order to allow a proper start-up also in pre-biased output
voltage conditions. After the soft-start the device can sink current. Other features are
power good, master/slave synchronization (with 180° phase shift), over-voltage-protection,
feed-back disconnection and thermal shutdown. The HTSSOP16 package allows the
realization of really compact DC/DC converters.
L6732 Summary description
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1.1 Functional description
Figure 1. Block diagram
