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L6574ST,STN/a25000avaiCFL/TL BALLAST DRIVER PREHEAT AND DIMMING
L6574DSTMN/a22avaiCFL/TL BALLAST DRIVER PREHEAT AND DIMMING


L6574 ,CFL/TL BALLAST DRIVER PREHEAT AND DIMMINGFEATUREScontrol a fluorescent bulb.HIGH ACCURACY CURRENT CONTROLLEDA dedicated timing section in th ..
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L6574D013TR ,CFL/TL BALLAST DRIVER PREHEAT AND DIMMINGL6574CFL/TL BALLAST DRIVER PREHEAT AND DIMMING■ HIGH VOLTAGE RAIL UP TO 600V■ dV/dt IMMUNITY ± 50 V ..
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L6574-L6574D
CFL/TL BALLAST DRIVER PREHEAT AND DIMMING
gerTpra'
CFL/TL BALLAST DRIVER PREHEAT AND DIMMING
HIGH VOLTAGE RAIL UP TO 600V
dV/dt IMMUNITY i 50 V/ns IN FULL TEM-
PERATURE RANGE
a DRIVER CURRENT CAPABILITY:
250mMA SOURCE
450mA SINK
n SWITCHING TIMES 80/40ns RISE/FALL
WITH 1nF LOAD
CMOS SHUT DOWN INPUT
UNDER VOLTAGE LOCK OUT
PREHEAT AND FREQUENCY SHlFTING TIMING
SENSE OP AMP FOR CLOSED LOOP CON-
TROL OR PROTECTION FEATURES
n HIGH ACCURACY CURRENT CONTROLLED
OSCILLATOR
n INTEGRATED BOOTSTRAP DIODE
n CLAMPING ON Vs.
n SO16, DIP 16 PACKAGE
DESCRIPTION
In order to ensure voltage ratings in excess of
600V, the L6574 is manufactured with BCD OFF
LINE technology, which makes it well suited for
lamp ballast applications.
BLOCK DIAGRAM
SO16N DIP16
ORDERING NUMBERS:
L6574D L6574
The device is intended to drive two power MOS-
FETS, in the classical half bridge topology, ensur-
ing all the features needed to drive and properly
control a fluorescent bulb.
A dedicated timing section in the L6574 allows
the user set the necessary parameters for proper
preheat and ignition of the lamp.
Also, an OP AMP is available to implement
closed loop control of the lamp current during
normal lamp burning.
An integrated bootstrap section, eliminating the
normally required bootstrap diode and the zener
clamping on Vs, makes the L6574 well suited for
low cost applications where few additional com-
ponents are needed to build a high performance
ballast.
N 1 V3001
OPAMP I
OPOUT I
UV BOOTSTRAP HVG HVG -
OPIN- DETECTION DRIVER DRIVER : T'CBOOT
o LOAD
DRIVING - VS
' DEAD
7 TIME
SHIFTER
Ifs Ipre LVG DRIVER
(i) i, GND
Vthpre
- VCO = "i..
PRE f l l 63339 <1
D9TIN493A
, CPRE
May 2001
PIN CONNECTION
CPRE E 1 16 Cl VBOOT
RPRE E 2 15 Cl HVG
CF E 3 14 Cl OUT
RING E 4 13 Cl N.C.
OPOUT I: 5 12 Cl Vs
OPIN- I: 6 11 Cl LVG
OPIN+ E 7 10 Cl GND
EN1 IE 8 9 Cl EN2
D97IN492
THERMAL DATA
Symbol Parameter DIP16 SO16N Unit
ij.amb Thermal Resistance Junction to ambient Max. 80 120 °C/W
PINS DESCRIPTION
N. Name Function
1 Cpre Preheat Timing Capacitor
2 Rpre Maximum Oscillation Frequency Setting. Low Impedence Voltage Source. See also Cf
3 Cf Oscillator Frequency Setting (see also Ring, Rpre)
4 Ring Minimum Oscillation Frequency Setting. Low Impedence Voltage Source. See also Cf
5 OPout Sense OP AMP Output. Low Impedence
6 OPin- Sense OP Amp Inverting Input. High Impedence
7 OPin+ Sense OP AMP Non Inverting Input High Impedence.
8 EN1 Half Bridge Enable
9 EN2 Half Bridge Enable
10 GND Ground
11 LVG Low Side Driver Output
12 Vs Supply Voltage with Internal Zener Clamp.
13 N.C. Non Connected
14 OUT High Side Driver Reference
15 HVG High Side Driver Output
16 Vboot Bootstrapped Supply Voltage
2/9 gr,
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