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L6207Q
PowerSPIN: DMOS dual full bridge driver
June 2013 DocID018993 Rev 3 1/27
L6207QDMOS dual full bridge driver
Datasheet - production data
Features Operating supply voltage from 8 to 52 V 5.6 A output peak current RDS(on) 0.3 typ. value at Tj = 25 °C Operating frequency up to 100 kHz Non-dissipative overcurrent protection Dual independent constant tOFF PWM current
controllers Slow decay synchronous rectification Cross conduction protection Thermal shutdown Undervoltage lockout Integrated fast freewheeling diodes
Applications Bipolar stepper motor Dual or quad DC motor
DescriptionThe L6207Q device is a DMOS dual full bridge
driver designed for motor control applications,
realized in BCDmultipower technology, which
combines isolated DMOS power transistors with
CMOS and bipolar circuits on the same chip.
The device also includes two independent
constant OFF time PWM current controllers that
perform the chopping regulation. Available in
a VFQFPN48 7 x 7 package, the L6207Q device
features thermal shutdown and a non-dissipative
overcurrent detection on the high-side Power
MOSFETs.
Contents L6207Q2/27 DocID018993 Rev 3
Contents Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105.1 Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2 Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
5.3 PWM current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.4 Slow decay mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.5 Non-dissipative overcurrent detection and protection . . . . . . . . . . . . . . . 16
5.6 Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Output current capability and IC power dissipation . . . . . . . . . . . . . . 21 Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
DocID018993 Rev 3 3/27
L6207Q Block diagram
1 Block diagram
Figure 1. Block diagram
Electrical data L6207Q
4/27 DocID018993 Rev 3
2 Electrical data
2.1 Absolute maximum ratings
2.2 Recommended operating conditions
Table 1. Absolute maximum ratings
Table 2. Recommended operating conditions
DocID018993 Rev 3 5/27
L6207Q Pin connection
3 Pin connection
Figure 2. Pin connection (top view)
Note: The exposed PAD must be connected to GND pin.
Table 3. Pin description
Pin connection L6207Q
6/27 DocID018993 Rev 3 Also connected at the output drain of the overcurrent and thermal protection MOSFET. Therefore, it must be driven putting in series a resistor with a value in the range of 2.2 k - 180 k, recommended 100 k.
Table 3. Pin description (continued)
DocID018993 Rev 3 7/27
L6207Q Electrical characteristics
4 Electrical characteristics
VS = 48 V, TA = 25 °C, unless otherwise specified.
Table 4. Electrical characteristics
Electrical characteristics L6207Q
8/27 DocID018993 Rev 3 Tested at 25 °C in a restricted range and guaranteed by characterization. See Figure3. Measured applying a voltage of 1 V to pin SENSE and a voltage drop from 2 V to 0 V to pin VREF. See Figure4.
Table 4. Electrical characteristics (continued)
DocID018993 Rev 3 9/27
L6207Q Electrical characteristics
Figure 3. Switching characteristic definition
Figure 4. Overcurrent detection timing definition
Circuit description L6207Q
10/27 DocID018993 Rev 3
5 Circuit description
5.1 Power stages and charge pump
The L6207Q device integrates two independent power MOSFET full bridges, each power
MOSFET has an RDS(ON) = 0.3 (typical value at 25 °C) with intrinsic fast freewheeling
diode. Cross conduction protection is implemented by using a deadtime (tDT = 1 µs typical
value) set by internal timing circuit between the turn-off and turn-on of two power MOSFETs
in one leg of a bridge.
Pins VSA and VSB must be connected together to the supply voltage (VS).
Using an N-channel power MOSFET for the upper transistors in the bridge requires a gate
drive voltage above the power supply voltage. The bootstrapped supply (VBOOT) is obtained
through an internal oscillator and a few external components to realize a charge pump
circuit, as shown in Figure 5. The oscillator output (pin VCP) is a square wave at 600 kHz
(typically) with 10 V amplitude. Recommended values/part numbers for the charge pump
circuit are shown in Table5.
Figure 5. Charge pump circuit
Table 5. Charge pump external component values
DocID018993 Rev 3 11/27
L6207Q Circuit description
5.2 Logic inputs
Pins IN1A, IN2A, IN1B and IN2B are TTL/CMOS and µC compatible logic inputs. The internal
structure is shown in Figure 6. Typical values for turn-on and turn-off thresholds are
respectively Vth(ON) = 1.8 V and Vth(OFF) = 1.3 V.
Pins ENA and ENB have identical input structures with the exception that the drains of the
overcurrent and thermal protection MOSFETs (one for bridge A and one for bridge B) are
also connected to these pins. Due to these connections, some care must be taken in driving
these pins. Two configurations are shown in Figure 7 and 8. If driven by an open drain
(collector) structure, a pull-up resistor REN and a capacitor CEN are connected, as shown in
Figure 7. If the driver is a standard push-pull structure, the resistor REN and the capacitor
CEN are connected, as shown in Figure 8. The resistor REN should be chosen in the range
from 2.2 k to 180 k. Recommended values for REN and CEN are respectively 100 k and
5.6 nF. More information on selecting the values is found in Section 5.5.
Figure 6. Logic inputs internal structure
Figure 7. EN and EN pins open collector driving
Figure 8. ENA and ENB pins push-pull driving
Circuit description L6207Q
5.3 PWM current control
The L6207Q device includes a constant OFF time PWM current controller for each of the
two bridges. The current control circuit senses the bridge current by sensing the voltage
drop across an external sense resistor connected between the source of the two lower
power MOSFET transistors and ground, as shown in Figure 9. As the current in the load
builds up, the voltage across the sense resistor increases proportionally. When the voltage
drop across the sense resistor becomes greater than the voltage at the reference input
(VREFA or VREFB ), the sense comparator triggers the monostable switching the low-side
MOSFET off. The low-side MOSFET remains off for the time set by the monostable and the
motor current recirculates in the upper path. When the monostable times out, the bridge
again turns on. As the internal deadtime, used to prevent cross conduction in the bridge,
delays the turn-on of the power MOSFET , the effective OFF time is the sum of the
monostable time plus the deadtime.
Figure 9. PWM current controller simplified schematic
Table 6. Truth table Valid only in case of load connected between OUT1 and OUT2. X = don’t care. High Z = high impedance output. GND (VS) = GND during tON, VS during tOFF.
13/27L6207Q Circuit description
Figure 10 shows the typical operating waveforms of the output current, the voltage drop
across the sensing resistor, the RC pin voltage and the status of the bridge. Immediately
after the low-side Power MOSFET turns on, a high peak current flows through the sensing
resistor due to the reverse recovery of the freewheeling diodes. The L6207Q device
provides a 1 s blanking time tBLANK that inhibits the comparator output so that this current
spike cannot prematurely retrigger the monostable.
Figure 10. Output current regulation waveforms
Circuit description L6207Q
14/27 DocID018993 Rev 3
