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L6207DSTN/a2941avaiDUAL DMOS FULL BRIDGE MOTOR DRIVER
L6207NSTN/a720avaiDUAL DMOS FULL BRIDGE MOTOR DRIVER
L6207PDSTN/a1240avaiDUAL DMOS FULL BRIDGE MOTOR DRIVER
L6207PDSTMN/a3151avaiDUAL DMOS FULL BRIDGE MOTOR DRIVER


L6207PD ,DUAL DMOS FULL BRIDGE MOTOR DRIVERBLOCK DIAGRAMVBOOTVBOOTVSAV VBOOT BOOTCHARGEVCPPUMPOVEROCDACURRENTDETECTIONOUT1AOUT2A10V 10VTHERMAL ..
L6207PD ,DUAL DMOS FULL BRIDGE MOTOR DRIVERfeatures a non-dissi-DESCRIPTIONThe L6207 is a DMOS Dual Full Bridge designed for pative overcurren ..
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LC321664BJ-70 ,1 MEG (65536 words x 16 bit) DRAM, fast page mode, byte writeFeatures. 65536 words M 16 bits configuration,. Single 5 V , 10% power supply.. All input and outpu ..
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L6207D-L6207N-L6207PD
DUAL DMOS FULL BRIDGE MOTOR DRIVER
1/19
L6207

May 2002 OPERATING SUPPLY VOLTAGE FROM 8 TO 52V 5.6A OUTPUT PEAK CURRENT (2.8A DC) RDS(ON) 0.3Ω TYP. VALUE @ Tj = 25 °C OPERATING FREQUENCY UP TO 100KHz NON DISSIPATIVE OVERCURRENT
PROTECTION DUAL INDEPENDENT CONSTANT TOFF PWM
CURRENT CONTROLLERS SLOW DECAY SYNCHRONOUS
RECTIFICATION CROSS CONDUCTION PROTECTION THERMAL SHUTDOWN UNDER VOLTAGE LOCKOUT INTEGRATED FAST FREE WHEELING DIODES
TYPICAL APPLICATIONS
BIPOLAR STEPPER MOTOR DUAL DC MOTOR
DESCRIPTION

The L6207 is a DMOS Dual Full Bridge designed for
motor control applications, realized in MultiPower-
BCD technology, which combines isolated DMOS
Power Transistors with CMOS and bipolar circuits on
the same chip. The device also includes two inde-
pendent constant off time PWM Current Controllers
that performs the chopping regulation. Available in
PowerDIP24 (20+2+2), PowerSO36 and SO24
(20+2+2) packages, the L6207 features a non-dissi-
pative overcurrent protection on the high side Power
MOSFETs and thermal shutdown.
BLOCK DIAGRAM

DMOS DUAL FULL BRIDGE DRIVER
WITH PWM CURRENT CONTROLLER
L6207
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ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
3/19
L6207
THERMAL DATA
PIN CONNECTIONS (Top View)

<1> Mounted on a multilayer FR4 PCB with a dissipating copper surface on the bottom side of 6 cm2 (with a thickness of 35 μm).
<2> Mounted on a multilayer FR4 PCB with a dissipating copper surface on the top side of 6 cm2 (with a thickness of 35 μm).
<3> Mounted on a multilayer FR4 PCB with a dissipating copper surface on the top side of 6 cm2 (with a thickness of 35 μm), 16 via holes
and a ground layer.
<4> Mounted on a multilayer FR4 PCB without any heat sinking surface on the board.
L6207
4/19
PIN DESCRIPTION
5/19
L6207

(*) Also connected at the output drain of the Overcurrent and Thermal protection MOSFET. Therefore, it has to be driven putting in series a
resistor with a value in the range of 500Ω - 22KΩ, recommended 10kΩ
ELECTRICAL CHARACTERISTICS

(Tamb = 25 °C, Vs = 48V, unless otherwise specified)
Output DMOS Transistors
Source Drain Diodes
Switching Characteristics
PIN DESCRIPTION (continued)
L6207
6/19
<(5)> See Fig. 1.
<(6)> See Fig. 2.Defined as the time between the voltage at the input of the current sense reaching the Vref threshold and the lower DMOS
switch beginning to turn off. The voltage at SENSE pin is increased instantaneously from Vref -10mV to Vref +10mV.
UVLO comp
Logic Input
Over Current Protection
Comparator and Monostable
ELECTRICAL CHARACTERISTICS (continued)

(Tamb = 25 °C, Vs = 48V, unless otherwise specified)
7/19
L6207
Figure 1. Switching Characteristic Definition
CIRCUIT DESCRIPTION
POWER STAGES and CHARGE PUMP

The L6207 integrates two independent Power MOS Full Bridges. Each Power MOS has an Rdson = 0.3ohm
(typical value @ 25°C), with intrinsic fast freewheeling diode. Cross conduction protection is achieved using a
dead time (td = 1μs typical) between the switch off and switch on of two Power MOS in one leg of a bridge.
Using N Channel Power MOS for the upper transistors in the bridge requires a gate drive voltage above the
power supply voltage. The Bootstrapped (VBOOT) supply is obtained through an internal Oscillator and few ex-
ternal components to realize a charge pump circuit as shown in Figure 3. The oscillator output (VCP) is a square
wave at 750kHz (typical) with 10V amplitude. Recommended values/part numbers for the charge pump circuit
are shown in Table1.
L6207
8/19
Table 1. Charge Pump External Components
Values
Figure 3. Charge Pump Circuit
LOGIC INPUTS

Pins IN1A, IN2B, IN1B and IN2B are TTL/CMOS and
uC compatible logic inputs. The internal structure is
shown in Fig. 4. Typical value for turn-on and turn-off
thresholds are respectively Vthon = 1.8V and Vthoff
= 1.3V.
Pins ENA and ENB have identical input structure with
the exception that the drains of the Overcurrent and
thermal protection MOSFETs (one for the Bridge A
and one for the Bridge B) are also connected to these
pins. Due to these connections some care needs to
be taken in driving these pins. The ENA and ENB in-
puts may be driven in one of two configurations as
shown in figures 5 or 6. If driven by an open drain
(collector) structure, a pull-up resistor REN and a ca-
pacitor CEN are connected as shown in Fig. 5. If the
driver is a standard Push-Pull structure the resistor
REN and the capacitor CEN are connected as shown
in Fig. 6. The resistor REN should be chosen in the
range from 500Ω to 22KΩ. Recommended values for
REN and CEN are respectively 10KΩ and 100nF.
More information on selecting the values is found in
the Overcurrent Protection section.
Figure 4. Logic Inputs Internal Structure
Figure 5. ENA and ENB Pins Open Collector
Driving
Figure 6. ENA and ENB Pins Push-Pull Driving
TRUTH TABLE
= Don't care
High Z = High Impedance Output
GND (Vs) = GND during Ton, Vs during Toff
(*) Valid only in case of load connected between OUT1 and OUT2
9/19
L6207
PWM CURRENT CONTROL

The L6207 includes a constant off time PWM current controller for each of the two bridges. The current control
circuit senses the bridge current by sensing the voltage drop across an external sense resistor connected be-
tween the source of the two lower power MOS transistors and ground, as shown in Fig. 10. As the current in the
motor builds up the voltage across the sense resistor increases proportionally. When the voltage drop across
the sense resistor becomes greater than the voltage at the reference input (VREFA or VREFB) the sense com-
parator triggers the monostable switching the bridge off. The power MOS remain off for the time set by the
monostable and the motor current recirculates around the upper half of the bridge, in Slow Decay Mode as de-
scribed in the next section. When the monostable times out the bridge will again turn on. Since the internal dead
time, used to prevent cross conduction in the bridge, delays the turn on of the power MOS, the effective off time
is the sum of the monostable time plus the dead time. The off time can be calculated from the equation:
Toff = 0.69 RC + TD
where R and C are the external component values and TD is the internally generated Dead Time (typically 1μs).
Figure 8 shows the typical operating waveforms of the output current, the voltage drop across the sensing re-
sistor, the RC pin voltage and the status of the bridge. More details regarding the Synchronous Rectification and
the output stage configuration are included in the next section.
The capacitor value chosen also effects the rise time of the voltage at the RC pin. The rise time will only be an
issue if the capacitor is not completely charged before the next time the monostable is triggered. Table 2 gives
the typical rise time and the maximum useable off time for several values of capacitors.
Immediately after the Power MOS turns on, a high peak current flows through the sensing resistor due to the
reverse recovery of the freewheeling diodes. The L6207 provides a 1μs Blanking Time that inhibits the compar-
ator output so that this current spike cannot prematurely retrigger the monostable.
Table 2. C Value Effect
Figure 7. PWM Current Controller Simplified Schematic
L6207
10/19
Figure 8. Output Current Regulation Waveforms
SLOW DECAY MODE

Figure 9 shows the operation of the bridge in the Slow Decay mode. At the start of the off time, the lower power
MOS is switched off and the current recirculates around the upper half of the bridge. Since the voltage across
the coil is low, the current decays slowly. After the dead time the upper power MOS is operated in the synchro-
nous rectification mode. When the monostable times out, the lower power MOS is turned on again after some
delay set by the dead time to prevent cross conduction.
Figure 9. Slow Decay Mode Output Stage Configurations
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