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KBMF01SC6 ST N/a10376avaiEMI FILTER AND LINE TERMINATION FOR PS/2 MOUSE OR KEYBOARD PORTS


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KBMF01SC6
EMI FILTER AND LINE TERMINATION FOR PS/2 MOUSE OR KEYBOARD PORTS
1/8
KBMFxxSC6

EMI FILTER AND LINE TERMINATION
FOR PS/2 MOUSE OR KEYBOARD PORTS
February 2002-Ed:1D
A.S.D.
FUNCTIONAL DIAGRAM

TM: ASDand TRANSIL aretrademarksof STMicroelectronics.
EMI Filter and line terminationfor mouse and key-
board ports on: Desktop computers Notebooks Workstations Servers
MAIN APPLICATION
Integrated low pass filters for Data and Clock
lines Integrated ESD protection Integrated pull-up resistors Small package size Breakdown voltage: VBR =6Vmin
FEATURES
the implementationof computer systems,
the radiated and conducted EMI shouldbe kept
within the required levelsas statedby the FCC
regulations.In additionto the requirementsof
EMC compatibility, the computing devices are
requiredto tolerate ESD events and remain
operational without user intervention.
The KBMF implementsa low pass filterto limit EMI
levels and provide ESD protection which exceeds
IEC 61000-4-2 level4 standard. The device also
implements the pullup resistors neededto bias the
data and clock lines. The package is the
SOT23-6L whichis ideal for situations where
board spaceisata premium.
DESCRIPTION
EMI/ RFI noise suppression ESD protection exceedingIEC61000-4-2 level4 High flexibilityin the designof high density
boards
BENEFITS
KBMFxxSC6
IEC 61000-4-2(R= 330ΩC= 150pF), level4
±15 kV (air discharge)kV (contact discharge)
MIL STD 883C, Method 3015-6
Class3 C= 100pF R= 1500Ω positive strikes and3 negative strikes (F=1Hz)
COMPLIES WITH THE FOLLOWING ESD
STANDARDS:
ABSOLUTE MAXIMUM RATINGS (Tamb = 25°C)
ELECTRICAL CHARACTERISTICS (Tamb = 25°C)
KBMFxxSC6
Fig. A1:
Measurements configuration
Fig. A2:
KBMFxxSC6 attenuation curve
TECHNICAL INFORMATION

The KBMFxxSC6 ensurea filtering protection against ElectroMagnetic and RadioFrequency Interferences
thankstoits low-pass filter structure. This filteris characterizedby the following parameters: cut-off frequency Insertion loss high frequency rejection
EMI FILTERING

The KBMFxxSC6is particularly optimizedto perform ESD protection. ESD protectionis basedon the use device which clampsat:
Vouput V RIBR dPP=+ .
This protection functionis splittedin2 stages. As shownin figure A3, the ESD strikes are clampedby the
first stage S1 and thenits remaining overvoltageis appliedto the second stage through the resistorR.
Sucha configuration makes the output voltage very lowat the Voutput level.
ESD PROTECTION
Fig. A3:
ESD clamping behavior
KBMFxxSC6 havea good approximationof the remaining voltagesat both Vinput and Voutput stages, we give the
typical dynamical resistance value Rd. By taking into account these following hypothesis: Rt>Rd, Rg>Rd
and Rload>Rd,it gives these formulas:
Vinput RV RV
gBR dg= + ..
Voutput RV R Vinput
SBR d= + ..
The resultsof the calculation done for VPP=8kV, Rg=330Ω (IEC 61000-4-2 standard), Vbr=7V
(typ.) and Rd= 1ohm (typ.) give:
Vinput= 31.2V
Voutput= 7.8V
This confirms the very low remaining voltage across the devicetobe protected.Itis also importantto note
thatin this approximation the parasitic inductance effect was not taken into account. This couldbe few
tenthsof volts during fewnsat the input side. This parasitic effectis not presentat the output side due the
low current involved after the resistance RS.
The measurements done here after show very clearly (Fig. A5) the high efficiencyof the ESD protection:no influenceof the parasitic inductanceson output stage Voutput clamping voltage very closeto Vbr (positive strike) and -Vf (negative strike)
Fig. A4:
Measurement conditions
KBMFxxSC6
Fig. A5:
Remaining voltage at both stages S1 (Vinput) and S2 (Voutput) during ESD surge.
Please note that the KBMFxxSC6is not only actingfor positive ESD surges but alsofor negative ones. For
these kindof disturbancesit clamps closeto ground voltageas shownin Fig. A5b.
The early ageing and destructionof IC’sis often dueto latch-up phenomena whichis mainly inducedby
dV/dt. Thankstoits structure, the KBMFxxSC6 providesa high immunityto latch-up phenomena by
smoothing very fast edges.
LATCH-UP PHENOMENA
CROSSTALK BEHAVIOR
Fig. A6:
Crosstalk phenomena
The crosstalk phenomenais dueto the coupling between2 lines. The coupling factor( β12or β21) increases
when the gap across lines decreases, thisis the reason why we provide crosstalk measurements for
monolithic deviceto guarantee negligeable crosstalk between the lines.In the example above the ex-
pected signalon load RL2is α2VG2,in fact the real voltageat this point has gotan extra value β21VG1. This
partof the VG1 signal representsthe effectof the crosstalk phenomenonof the line1on the line2. This phe-
nomenon hastobe taken into account when the drivers impose fast digital dataor high frequency analog
signalsin the disturbing line. The perturbed line willbe more affectedifit works with low voltage signalor
high load impedance (few kΩ).
KBMFxxSC6
Fig. A7:
Analog Crosstalk measurements configu-
ration
Fig. A8:
Typical Analog Crosstalk measurement
Figure A7 gives the measurement circuitfor the analog crosstalk application.In figure A8, the curve shows
the effectof the Data lineon the CLK line.In usual frequency rangeof analog signals (upto 100MHz) the
effecton disturbed lineis less than -37dB.
Fig. A9:
Digital crosstalk measurements configu-
ration
Fig. A10:
Digital crosstalk measurements
FigureA9 shows the measurement circuit usedto quantify the crosstalk effectina classical digital applica-
tion.
Figure A10 shows thatin sucha condition signal from0to 5V and rise timeof few ns, the impacton the
other lineis less than 50mV peakto peak. (Below the logic high threshold voltage).The measurements per-
formed with falling edges gives the results within the same range.
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