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IR21091IRN/a200avaiHalf Bridge Driver, Soft Turn-On, Single Input Plus Shut-Down, Programmable 0.5-5us Deadtime in a 8-pin DIP package
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IR21091-IR21091S
Half Bridge Driver, Soft Turn-On, Single Input Plus Shut-Down, Programmable 0.5-5us Deadtime in a 8-pin DIP package
Data Sheet No. P060191 revD
International
ISER Rectifier IR21091(S) & (PbF)
HALF-BRIDGE DRIVER
Features Product Summary
q Floating channel designed for bootstrap operation
Fully operational to +600V VOFFSET 600V max.
Tolerant to negative transient voltage
dV/dt immune Io+/- 120 mA / 250 mA
q Gate drive supply range from 10 to 20V
q Undervoltage lockout for both channels VOUT 10 - 20V
q 3.3V, 5V and 15V input logic compatible ton/off (typ ) 680 8 170 ns
q Cross-conduction prevention logic .
o Matched propagation delay for both channels Dead time 500 ns
q High side output in phase with IN input
q Logic and power ground +/- 5V offset.
q Internal 500ns dead-time, and programmable
up to 5us with one external RDT resistor
q Lower di/dt gate driver for better noise immunity
q The dual function DT/SD pin input turns off both Packages
channels.
q Available in Lead-Free
(programmable up to 5uS)
Description
The IR21091(S) are high voltage, high speed power
MOSFET and IGBT drivers with dependant high and
low side referenced output channels. Proprietary HVIC
and latch immune CMOS technologies enable rugge-
dized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to
3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-
conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high
side qonfi uration which_operates up to 600 volts.
Typica Connection
8 Lead PDIP 8 Lead SOIC
up to 600V
DT/SD I/s LOAD
COM LO
lR21091(S)
(Refer to Lead Assignments for correct conhguration). This/These diagram(s) show electrical connections
only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
1

IR21091(S) & (PbF) International
TOR iiectifier
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
VB High side floating absolute voltage -O.3 625
vs High side floating supply offset voltage Vs - 25 VB + 0.3
VH0 High side floating output voltage Vs - 0.3 VB + 0.3
VCC Low side and logic mted supply voltage -0.3 25
Wo Low side output voltage -0.3 Vcc + 0.3 V
DT/SD Programmable dead-time and shut-down pin voltage vss - 0.3 VCC + 0.3
VlN Logic input voltage Vss - 0.3 Vcc + 0.3
dVs/dt Allowable offset supply voltage transient - 50 V/ns
PD Package power dissipation @ TA s: +25°C (8 Lead PDIP) - 1.0
(8 Lead SOC) - 0.625 W
RthJA Thermal resistance, junction to ambient (8 Lead PDIP) - 125 'C/W
(8 Lead SOIC) - 200
TJ Junction temperature - 150
Ts Storage temperature -50 150 "C
TL Lead temperature (soldering, 10 seconds) - 300
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The vs offset rating are tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
VB High side floating supply absolute voltage Vs + 10 Vs + 20
Vs High side floating supply offset voltage Note 1 600
VH0 High side floating output voltage Vs VB
Vcc Low side and logic fixed supply voltage 10 20 V
VLo Low side output voltage 0 Vcc
" Logic input voltage vss Vcc
DT/SD Programmable dead-time and shut-down pin voltage vss Vcc
TA Ambient temperature -40 125 °C
Note 1: Logic operational tor Vs of -5 to +600V. Logic state held tor Vs of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2

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