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IPP14N03LA |IPP14N03LAinfineon N/a5000avaiLow Voltage MOSFETs


IPP14N03LA ,Low Voltage MOSFETsapplicationsI 30 AD• N-channel - Logic level• Excellent gate charge x R product (FOM)DS(on)• Very l ..
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IPP14N03LA
Low Voltage MOSFETs
CP""''"
Infineon
lechnologies
IPB14NO3LA
|P|14N03LA, |PP14N03LA
optiMosh Power-Transistor
Product Summary
Features VDS 25 V
. Ideal for high-frequency dc/dc converters RDSWmax (SMD version) 13.6 mQ
. Qualified according to JEDECI) for target applications
l 30 A
. N-channel - Logic level
. Excellent gate charge x RDSM product (FOM)
. Very low on-resistance R won)
. . P-T0263-3-2 P-T0262-3-1 P-TO220-3-1
. Superior thermal resistance
. 175 "C operating temperature
. dv/dt rated 2s
Type Package Ordering Code Marking drain
IPB14N03LA P-T0263-3-2 Q67042-S4156 14N03LA
FI14N03LA P-T0262-3-1 Q67042-S4157 14N03LA pin 1
|PP14N03LA P-T0220-3-1 Q67042-S4158 14N03LA gnurgce
Maximum ratings, at Tj=25 "C, unless otherwise specified
Parameter Symbol Conditions Value Unit
Continuous drain current h, TC=25 oc') 30 A
Tc=100 ''C 30
Pulsed drain current ID,pulse TC=25 °C3) 210
Avalanche energy, single pulse E AS I 0:24 A, Rcs=25 f2 60 mJ
I 0:30 A, VDS=20 V,
Reverse diode dv/dt dv/dt dildt=200 Alps, 6 kV/ps
Trmax=175 ''C
Gate source voltage“ VGS +20 V
Power dissipation Ptot TC=25 ''C 46
Operating and storage temperature Ts, Tstg -55 ... 175 ''C
IEC climatic category; DIN IEC 68-1 55/175/56
l) J-STD20 and JESD22
Rev. 1.4 page 1 2004-03-23
CP""''"
Infineon
lechnologies
IPB14NO3LA
|P|14N03LA, |PP14N03LA
Parameter Symbol Conditions Values Unit
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case Rm - - 3.2 K/W
SMD version, device on PCB RNA minimal footprint - - 62
6 cm2 cooling area5) - - 40
Electrical characteristics, at Tj=25 "C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage V(BR)DSS VGs=0 V, 10:1 mA 25 - - V
Gate threshold voltage Vsath) VDS=VGS, ID=20 pA 1.2 1.6 2
V =25 V, V =0 V,
Zero gate voltage drain current loss Is, 0 GS - 0.1 1 HA
Tr=25 C
VDS=25 V, VGS=0 V,
Tr=125 "C - 10 100
Gate-source leakage current less Vss--20 V, VDS=0 V - 10 100 nA
Drain-source on-state resistance Rosmn) VGS=4.5 V, I 0:20 A - 18.5 23.1 mg
Vss=4.5 V, [0:20 A,
SMD version - 18.2 22.7
VGS=10V, ID=30A - 11.6 13.9
VGS=10 V, ID=30 A,
SMD version - 11.3 13.6
Gate resistance RG - 0.9 - f2
V >2ll R ,
Transconductance " I 33' I DI DS(on)max 17 35 - S
ID--30 A
2) Current is limited by bondwire; with an Rmuc=3.2 K/Wthe chip is able to carry 45 A.
3) See figure 3
4) lemax=150 ''C and duty cycle D<0.25 for VGS<-5 V
5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 pm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.4
page 2
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