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IP4776CZ38NXPN/a17300avaiFully integrated HDMI interface with level shifter, ESD and backdrive protection


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IP4776CZ38
Fully integrated HDMI interface with level shifter, ESD and backdrive protection
1. General description
The IP4776CZ38 is designed for HDMI host-interface protection. The IP4776CZ38
includes level shifting for the DDC channels and backdrive protection for HDMI as well as
high-level ESD protection diodes for the TMDS signal lines.
The level shifting function is required when the receiver operates at a supply voltage lower
than the external devices to protect the I/Os against overvoltages. The IP4776CZ38
contains four N-channel MOSFETs to provide this level shifting function.
Furthermore, all TMDS intra-pairs are protected by a special diode configuration offering
an ultra low line capacitance of 0.7 pF only. These diodes provide protection to
downstream components from ESD voltages up to ±8 kV contact according to the
IEC 61000-4-2, level 4 standard.
2. Features and benefits
Pb-free and RoHS compliant, Dark Green Integrated high-level ESD protection, level shifting and backdrive protection All TMDS lines with integrated rail-to-rail clamping diodes with downstream
ESD protection of ±8 kV according to IEC 61000-4-2, level 4 standard Matched 0.5 mm trace spacing Bidirectional level shifting N-channel FETs provided for DDC clock and data channels TMDS lines with ≤ 0.05 pF matching of capacitance between the TMDS pairs Ultra low line capacitance of 0.7 pF per channel HDMI 1.3 compliant Backdrive protection 38-pin TSSOP lead-free package
3. Applications
The IP4776CZ38 is designed for HDMI receiver and transmitter port protection, level
shifting and backdrive protection e.g.: TV Graphics card Set-top box DVD Digital media adapter Game console
IP4776CZ38
Fully integrated HDMI interface with level shifter, ESD and
backdrive protection
Rev. 6 — 7 January 2011 Product data sheet
NXP Semiconductors IP4776CZ38
Fully integrated HDMI interface with level shifter
4. Ordering information

5. Functional diagram

Table 1. Ordering information

IP4776CZ38 TSSOP38 plastic thin shrink small outline package; 38 leads;
body width 4.4 mm; lead pitch 0.5 mm
SOT510-1
NXP Semiconductors IP4776CZ38
Fully integrated HDMI interface with level shifter
6. Pinning information
6.1 Pinning

6.2 Pin description

Table 2. Pin description

VCC(5V0) 1 supply voltage
VCC(3V3) 2 bias supply voltage for the level shifters
GND 3 ground reference[1]
TMDS_D2+ 4 D2+ TMDS ESD protection[2]
TMDS_GND 5 ground reference[1]
n.c. 6 not connected[2]
TMDS_D1+ 7 D1+ TMDS ESD protection[2]
TMDS_GND 8 ground reference[1]
n.c. 9 not connected[2]
TMDS_D0+ 10 D0+ TMDS ESD protection[2]
TMDS_GND 11 ground reference[1]
n.c. 12 not connected[2]
TMDS_CLK+ 13 CLK+ TMDS ESD protection[2]
TMDS_GND 14 ground reference[1]
n.c. 15 not connected[2]
NXP Semiconductors IP4776CZ38
Fully integrated HDMI interface with level shifter

[1] Pins GND and TMDS_GND are internally connected.
[2] This pin always has to be connected to the pin on the opposite location of the IC via a PCB track to
guarantee correct functionality; see Figure 3, Figure 4 and Figure5.
[3] VCC(3V3) referenced logic level in.
[4] VCC(5V0) referenced logic level out.
CEC_IN 16 CEC input[3]
DDC_CLK_IN 17 DDC clock input[3]
DDC_DAT_IN 18 DDC data input[3]
HOT_PLUG_DET_IN 19 hot plug detection input[3]
HOT_PLUG_DET_OUT 20 hot plug detection output[4]
DDC_DAT_OUT 21 DDC data output[4]
DDC_CLK_OUT 22 DDC clock output[4]
CEC_OUT 23 CEC output[3]
TMDS_CLK− 24 CLK− TMDS ESD protection[2]
TMDS_GND 25 ground reference[1]
n.c. 26 not connected[2]
TMDS_D0− 27 D0− TMDS ESD protection[2]
TMDS_GND 28 ground reference[1]
n.c. 29 not connected[2]
TMDS_D1− 30 D1− TMDS ESD protection[2]
TMDS_GND 31 ground reference[1]
n.c. 32 not connected[2]
TMDS_D2− 33 D2− TMDS ESD protection[2]
TMDS_GND 34 ground reference[1]
n.c. 35 not connected[2]
GND 36 ground reference[1]
TMDS_BIAS 37 bias for TMDS ESD protection and bias for level shifter output
ESD protection. This pin must be connected to a 0.1 μF
capacitor.
n.c. 38 not connected
Table 2. Pin description …continued
NXP Semiconductors IP4776CZ38
Fully integrated HDMI interface with level shifter
7. Limiting values

[1] Signal pins:
TMDS_D2+, TMDS_D2−, TMDS_D1+, TMDS_D1−, TMDS_D0+, TMDS_D0−,
TMDS_CLK+, TMDS_CLK−,
CEC_OUT,
DDC_DAT_OUT,
DDC_CLK_OUT,
HOT_PLUG_DET_OUT.
[2] This measurement is performed with a 0.1 μF external capacitor on pin TMDS_BIAS.
8. Recommended operating conditions

9. Characteristics

Table 3. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VCC supply voltage GND − 0.5 5.5 V input voltage at input pins GND − 0.5 5.5 V
VESD electrostatic discharge
voltage
signal pins; IEC 61000-4-2, level 4 [1]
contact [2] −8+8 kV
air discharge [2] −15 +15 kV
all other pins; MIL-STD-883 Method 3015
(human body model)
contact −2+2 kV
air discharge −2+2 kV
Tstg storage temperature −55 +125 °C
Table 4. Recommended operating conditions

Tamb ambient temperature −40 - +85 °C
Table 5. Characteristics

Tamb =25 °C; unless otherwise specified.
ICC(5V0) supply current (5.0V) VCC(5V0)= 5.0V --130 μA
ICC(3V3) supply current (3.3V) VCC(3V3) =3.3V - 1 5 μA
Ibck(out-VCC5V0) back current from
output/ TMDS pins to
VCC(5V0)
signal pins; powered down; VCC(5V0) VBRzd Zener diode breakdown
voltage
I=1mA 6 - 9 V
IL(r) reverse leakage current per TMDS channel; VI= 3.0V --1 μA forward voltage - 0.7 - V
Cch(TMDS) TMDS channel
capacitance
VCC(5V0)=5 V; f=1 MHz; Vbias =2.5V [2] -0.7 -pF
NXP Semiconductors IP4776CZ38
Fully integrated HDMI interface with level shifter

[1] Signal pins:
TMDS_D2+, TMDS_D2−, TMDS_D1+, TMDS_D1−, TMDS_D0+, TMDS_D0−,
TMDS_CLK+, TMDS_CLK−,
CEC_OUT,
DDC_DAT_OUT,
DDC_CLK_OUT,
HOT_PLUG_DET_OUT.
[2] This parameter is guaranteed by design.
[3] This measurement is performed with a 0.1 μF external capacitor on pin TMDS_BIAS.
[4] For level shifting N-FET.
ΔCch(TMDS) TMDS channel
capacitance difference
VCC(5V0)=5 V; f=1 MHz; Vbias =2.5V [2] -0.05 - pF
Cch(mutual) mutual channel
capacitance
between signal pin and pin n.c.;
VCC(5V0)=0 V; f=1 MHz; Vbias =2.5V
[2] -0.07 - pF
CI(ch-GND)(levsh) level shifting input
capacitance from
channel to ground
VCC(5V0)=0 V; f=1 MHz; Vbias =2.5V [2]- 46pF
Rdyn dynamic resistance I=1 A; IEC 61000-4-5/9
positive transient - 2.4 - Ω
negative transient - 1.3 - Ω
VCL(ch)trt(pos) positive transient
channel clamping
voltage
VESD =8kV [3] -8 -V
ΔVon on-state voltage drop VCC(3V3) =2.5 V; VS =GND; IDS =3 mA [4] -85 140 mV
Table 5. Characteristics …continued

Tamb =25 °C; unless otherwise specified.
NXP Semiconductors IP4776CZ38
Fully integrated HDMI interface with level shifter
10. Application information

NXP Semiconductors IP4776CZ38
Fully integrated HDMI interface with level shifter

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