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IP1203
Single Output Full Function Sychronous Buck Power Block.
PD- 97108
International
TOR Rectifier iP1203PbF
tPal/Wi"' Single Output Full Function
Synchronous Buck Power Block
TECHNOLOGY Integrated Power Semiconductors,
PWM Control & Passives
Features
. 5.5V to 13.2V Input Voltage
. 0.8V to 8V Output Voltage
. 15A Maximum Load Capability
. 200-400kHz Nominal Switching Frequency
. Over Current Hiccup
. External Synchronization Capable
. Overvoltage Protection
. Over Temperature Protection
. Internal Features Minimize Layout Sensitivity
. Very Small Outline 9mm x 9mm x 2.3mm
iP1203PbF Power Block
Description
The iP1203PbF is a fully optimized solution for medium current synchronous buck applications requiring up to
15A. It includes full function PWM control, with optimized power semiconductor chipsets and associated
passives, achieving high power density. Very few external components are required to create a complete
synchronous buck power supply.
iPOWIRT'V' technology offers designers an innovative space-saving solution for applications requiring high
power densities. iPOWIR technology eases design for applications where component integration offers benefits
in performance and functionality. iPOWIR technology solutions are also optimized internally for layout, heat
transfer and component selection.
. . . . . . . Pin Number
iP1 203PbF Simplified Application Schematic (SeePage18) PinName PinDescriptian
1, 23 Vw Input voltage connection pins
D VIN DC D 2,3,4,5,7,17,20,21 PGND Power Ground plnS
I 6 Vet: PWM controller power supply pin. Internally generated.
= -hpass Requires a 2.2m external bypass capacitor
3 v "
E UClrpsss D will disable the output. Cannot be cycled to unlatch OVP trip
; F543 9 CC Output of the error amplifier
3 PGOOD
f3 ss Fl 203PbF 10 FB Inverting input of the error amplifier
I 11 FB Out ut overvolla e sense in.
T cc cy-] s p g p
Switching frequency setting pin. For RT selection, refer to Fig.9 of the
Ey-cy Rr datasheet
= =- Power Good pin. Open collector, requires external puIII-up. If function not
fl V 713 13 PGOOD needed pin can be left floating
Ery-ry smc g Rer
I 14 V Non inverting input of the error amplifier (reference Voltage pin). Connect a
I I REF 100pF cap from this pin to PGND.
= -- 15 SYNC External Clock synchronization pin. Set free running frequency to 80% of
the SYNC frequency, When not in use, leave pin Mating
16 OCSET Output overcurrent trip threshold pin
PACKAGE INTERFACE PARTS PER PER T & R 18,19 Vsw Output inductor connection pins
DESCRIPTION CONNECTION BAG REEL ORIENTATION
. 22 Vsws Test pad, for internal use, short to VSW
iP1203PbF LGA 1O - Fi 26
iP1 203TRPbF LG A --- 1000 g 24 VINS Test pad, for internal use, short to VIN
8/11/06
International
I P1 203 P b F All specifications @ 25°C (unless otherwise specified) tQR Rectifier
Absolute Maximum Ratings
Parameter Symbol Min Typ Max Units Conditions
VIN V.N -0.3 - 15
Feedback FB -O.3 - 6
Output Overvoltage Sense PBS -0.3 - 6 V
PGOOD -O.3 - 15
Soft Start SS -0.3 - 6
SYNC -O.3 -- 6
Output RMS Current Ioutvsw - - 15 A See Fig.3
Block Temperature TBLK -10 - 125 °C
Recommended Operating Conditions
Parameter Symbol Min Typ Max Units Conditions
Input Voltage Range VIN 5.5 - 13.2 V
- - 15 A TPca = TCASE = 90°C. See Fig.3
t t RM C t lout
Ou pu S urren VSW 11 A Tecis = 90°C, TCASE = no airflow, no
heatsink.
0.8 -- 8.0 FOVVIN=12V
Output Voltage Range OUT 0.8 3.3 V For VIN = 5.5V
Electrical Specifications © VIN = 12V
Parameter Symbol Min Typ Max Units Conditions
fsw = 300kHz, vIN = 12V, Tm: 25°C
Power Loss PLOSS - 3.75 4.9 W Kaur = 1.5V, lour = 15A, See Fig.1O
vIN = 12V, vow: 1.5V
Over Current Shutdown Ioc - 25 - A fsw = 300KHz, ROCSET = 40.2kQ
HICCUP Duty Cycle Dchcup - 5 - %
t 5 vIN =12v, Vour = 1.5V.
Soft Start Time ss - ms 053:0.1pF
Reference Voltage VREF - 0.8 - V
TBLK = -10°C to 125°C
VOUT ACC1 -3 - 3 = =
Vow Accuracy - % VIN 12V, Vour 1.5V
V -2 2 TBLK = (Y'C to 70°C
OUT_ACC2 - VIN: 12V, VOUT = 1.5V
Error Amplifier
Source/Sink Current IERR 60 “A
Error Amplifier
Transconductance gm 2000 11th
Out ut Overvolta e Shutdown
Thrgshold g OVP 1.1 x vOUT 1.15 x Voor 1.2 x Kaur V
PGOOD Trip Threshold VTLPGOOD - 0.85 x VOUT V FB ramping down
PGOOD Output Low Voltage VLo_PGooo - - 0.3 V ISINK=2mA
2
