HYE25L128160AC-8 ,128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGESFeature byt 7.5 8 nsCK3,MINpartial array activation during Self-Refresht 5.4 6 nsAC3,MAX Data Mask ..
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HYE25L128160AC-8
128-MBIT SYNCHRONOUS LOW-POWER DRAM IN CHIPSIZE PACKAGES
HYB/E25L128160AC
128-MBit Mobile-RAMINFINEON Technologies12003-02
The HYB/E25L128160AC Mobile-RAMs are a new generation of low power, four bank
Synchronous DRAM’s organized as 4 banks×2Mbit x16 with additional features for mobile
applications. These synchronous Mobile-RAMs achieve high speed data transfer rates by
employing a chip architecture that prefetches multiple bits and then synchronizes the output data to
a system clock. The chip is fabricated using the Infineon advanced process technology.
The device adds new features to the industry standards set for synchronous DRAM products.
Parts of the memory array can be selected for Self-Refresh and the refresh period during Self-
Refresh is programmable in 4 steps which drastically reduces the self refresh current, depending on
the case temperature of the components in the system application. In addition a “Deep Power Down
Mode” is available. Operating the four memory banks in an interleave fashion allows random access
operation to occur at higher rate. A sequential and gapless data rate is possible depending on burst
length, CAS latency and speed grade of the device. The device operates from a 2.5V power supply
for the core and 1.8V for the bus interface.
The Mobile-RAM is housed in a FBGA “chip-size” package. The Mobile-RAM is available in the
commercial (00 to 700C) and Extended ( -25oC to +85oC) temperature range.
High Performance:8Mbit x 16 organisationVDD = 2.5V, VDDQ = 1.8V / 2.5VFully Synchronous to Positive Clock EdgeFour Banks controlled by BA0 & BA1Programmable CAS Latency: 1, 2, 3Programmable Wrap Sequence: Sequential
or InterleaveDeep Power Down ModeAutomatic and Controlled Precharge
CommandProgrammable Burst Length: 1, 2, 4, 8 and
full pageProgrammable Power Reduction Feature by
partial array activation during Self-RefreshData Mask for byte controlAuto Refresh (CBR) 4096 Refresh Cycles / 64msSelf Refresh with programmble refresh periodPower Down and Clock Suspend ModeRandom Column Address every CLK
(1-N Rule)54-FBGA , with 9 x 6 ball array with 3
depopulated rows, 9 x 8 mmOperating Temperature Range
Commerical ( 00 to 700C)
Extended ( -25oC to +85oC)
128-MBit Synchronous Low-Power DRAM in Chipsize Packages
Datasheet (Rev. 2003-02)
HYB/E25L128160AC
128-MBit Mobile-RAMINFINEON Technologies22003-02
Ordering Information
Commercial temperature range:
Extended temperature range:
Pin Definitions and Functions
HYB/E25L128160AC
128-MBit Mobile-RAMINFINEON Technologies32003-02
Pin Configuration for x16 devices:< Top-view >
123789ABCDEFGHJ
HYB/E25L128160AC
128-MBit Mobile-RAMINFINEON Technologies42003-02
Functional Block Diagrams
Block Diagram: 8Mb x16 SDRAM (12 / 9 / 2 addressing)
HYB/E25L128160AC
128-MBit Mobile-RAMINFINEON Technologies52003-02
Signal Pin Description
