HYB514175BJ-50 ,-256k x 16-Bit EDO-DRAM256k · 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60Advanced Information• 262 144 words by 16-bit organiz ..
HYB514175BJ-55 ,256k x 16-Bit EDO-DRAM256k · 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60Advanced Information• 262 144 words by 16-bit organiz ..
HYB514175BJ-60 ,256k x 16 Bit EDO DRAM 5 V 60 ns256k · 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60Advanced Information• 262 144 words by 16-bit organiz ..
HYB514256BJ-60 , 256 K x 4-Bit Dynamic RAM Low Power 256 K x 4-Bit Dynamic RAM
HYB514265BJ-40 , 256K x 16-Bit EDO-Dynamic RAM
HYB514265BJ-400 , 256K x 16-Bit EDO-Dynamic RAM
ICS9UMS9610CKLFT , PC MAIN CLOCK
ICSLV810FILFT , Buffer/Clock Driver
ICT49FCT3805ASO , 3.3V CMOS BUFFER/CLOCK DRIVER
ICTE-18 ,Diode TVS Single Uni-Dir 18V 1.5KW 2-Pin Case 41A-04 Boxapplications0.210 (5.3) • High temperature soldering guaranteed:O0.190 (4.8) 265 C/10 seconds, 0.37 ..
ICTE-5 ,Diode TVS Single Uni-Dir 5V 1.5KW 2-Pin Case 41A-04 Box Document Number 883562 23-May-03ICTE5.0 thru ICTE18C, 1N6373 thru 1N6378 & 1N6382 thru 1N6386Visha ..
ICTE-5 ,Diode TVS Single Uni-Dir 5V 1.5KW 2-Pin Case 41A-04 BoxThermal Characteristics (T = 25°C unless otherwise noted)AParameter Symbol Limit UnitPeak pulse pow ..
HYB514175BJ-50-HYB514175BJ-55-HYB514175BJ-60
256k x 16 Bit EDO DRAM 5 V 60 ns
SIEMENS
256k M 16-Bit EDO-DRAM
Advanced Information
. 262 144 words by 16-bit organization
. 0 to 70 °C operating temperature
. Fast access and cycle time
. R/VS access time:
50 ns (-50 version)
55 ns (-55 version)
60 ns (-60 version)
. m access time:
13 ns (-50 & -55 version)
15 ns (-60 version)
. Cycle time:
89 ns (-50 version)
94 ns (-55 version)
104 ns (-60 version)
. Hyper page mode (EDO) cycle time
20 ns (-50 & -55 version)
25 ns (-60 version)
. High data rate
50 MHz (-50 & -55 version)
40 MHz (-60 version)
. Single + 5 V (i 10 %) supply with a built-in
VBB generator
Semiconductor Group
HYB 514175BJ-50l-551-60
Low Power dissipation
max. 1100 mW active (-50 version)
max. 1045 mW active (-55 version)
max. 935 mW active (-60 version)
Standby power dissipation
11 mW standby (TTL)
5.5 mW max. standby (CMOS)
Output unlatched at cycle end allows
two-dimensional chip selection
Read, write, read-modify write,
C/VS-before-R/js refresh, RVs-only
refresh, hidden-refresh and hyper page
(EDO) mode capability
2 mm W control
All inputs and outputs TTL-compatible
512 refresh cycles/16 ms
Plastic Packages:
P-SOJ-40-1 400 mil width
Sill EM EN 5 HYB 514175BJ/BJL-50l-55l-60
256k M 16 EDO-DRAM
The HYB 514175BJ is the new generation dynamic RAM organized as 262 144 words by 16-bit.
The HYB 514175BJ utilizes CMOS silicon gate process as well as advanced circuit techniques to
provide wide operation margins, both internally and for the system user. Multiplexed address inputs
permit the HYB 514175BJ to be packed in a standard plastic 400 mil wide P-SOJ-40-1 package.
This package size provides high system bit densities and is compatible with commonly used
automatic testing and insertion equipment. System oriented features include single + 5 V (i 10 %)
power supply, direct interfacing with high performance logic device families such as Schottky TTL.
Ordering Information
Type Ordering Code Package Description
HYB 514175BJ-50 Q67100-Q2072 P-SOJ-40-1 400 mil 50 ns 256k x 16 EDO-DRAM
HYB 514175BJ-55 Q67100-Q2100 P-SOJ-40-1 400 mil 55 ns 256K x 16 EDO-DRAM
HYB 514175BJ-60 Q67100-Q2073 P-SOJ-40-1 400 mil 60 ns 256k x 16 EDO-DRAM
Truth Table
RAS LCAS UCAS WE tittE IIO1 - IIO8 II09 - IIO16 Operation
H H H H H High-Z High-Z Standby
L H H H H High-Z High-Z Refresh
L L H H L Dout High-Z Lower byte read
L H L H L High-Z Dout Upper byte read
L L L H L Dout Dout Word read
L L H L H Din Don't care Lower byte write
L H L L H Don't care Din Upper byte write
L L L L H Din Din Word write
L L L H H High-Z High-Z -
Pin Names
A0 - A8 Address Inputs
Ris Row Address Strobe
m, LC-AS Column Address Strobe
W ReadNVrite Input
E Output Enable
l/OI -I/O16 Data Input/Output
Vcc Power Supply (+ 5 V)
VSS Ground (0 V)
N.C. No Connection
Semiconductor Group 2 1998-10-01
