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HDMIULC6-4SC6 |HDMIULC64SC6STN/a168000avaiUltra large bandwidth ESD protection


HDMIULC6-4SC6 ,Ultra large bandwidth ESD protectionFeatures BUS■ High efficiency due to low residual voltage ■ 4 line 15 kV ESD protectionwhen confron ..
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HDMIULC6-4SC6
Ultra large bandwidth ESD protection
July 2006 Rev 2 1/11
HDMIULC6-4SC6

Ultra large bandwidth ESD protection
Main applications
HDMI ports at 1.65 Gb/s and up to 3.2 Gb/s IEEE 1394a, b, or c up to 3.2 Gb/s USB 2.0 ports up to 480 Mb/s (Hi-Speed) Ethernet port: 10/100/1000 Mb/s Video line protection
Description

The HDMIULC6-4SC6 is a monolithic, application
specific discrete device dedicated to ESD
protection of the HDMI connection. It also offers
the same high level of protection for IEEE 1394a
and IEEE 1394b/c, USB 2.0, Ethernet links, and
video lines.
Its ultra high cutoff frequency (5.3 GHz) secures a
high level of signal integrity. The device topology
provides this integrity without compromising the
complete protection of ICs against the most
stringent ESD strikes.
Features
4 line 15 kV ESD protection Protects VBUS when applicable Ultra high bandwidth - no inluence on signal
rise and fall times - maximised number of signal
harmonics Very low leakage current: 0.5 µA max. Fast response time compared with varistors SOT23-6L package RoHS compliant
Complies with these standards:
IEC 61000-4-2 level 4 15 kV air discharge 8 kV (and up to 15 kV) contact discharge
Functional diagram
Benefits
ESD standards compliance guaranteed at
device level, hence greater immunity at system
level ESD protection of VBUS when applicable. High efficiency due to low residual voltage
when confronted by an ESD surge Minimized rise and fall times for maximum data
integrity Consistent D+ / D- signal balance: Ultra low impact on intra-, inter-pair skew Matching high bit rate HDMI requirements
and ready for future evolution Low PCB space occupation - 9 mm² maximum
foot print Low leakage current for longer operation of
battery powered devices Higher reliability offered by monolithic
integration
Order code
Characteristics HDMIULC6-4SC6
2/11
1 Characteristics



Table 1. Absolute ratings
Table 2. Electrical characteristics (Tamb = 25° C)
HDMIULC6-4SC6 Characteristics
3/11


Figure 1. Line capacitance versus line
voltage (typical values)
Figure 2. Line capacitance versus frequency
(typical values)
Figure 3. Relative variation of leakage
current versus junction
temperature (typical values)
Figure 4. Frequency response
Application examples HDMIULC6-4SC6
4/11
2 Application examples
Figure 5. HDMI Digital single link application using HDMIULC6-4SC6
Figure 6. T1/E1/Ethernet protection
HDMIULC6-4SC6 Application examples
5/11
2.1 PCB layout considerations

For HDMI applications, VCC should not be connected. In this case the capacitor C in
Figure 7. is not needed.
Figure 7. PCB layout considerations (VCC connection is application dependent)

A differential impedance of 100 Ω must be respected in the layout. Both lines of the
differential pair should have the same length.
Figure 8. Footprint dimensions (in mm)


Technical information HDMIULC6-4SC6
6/11
3 Technical information
3.1 Surge protection

The HDMIULC6-4SC6 is particularly optimized to perform ESD surge protection based on
the rail to rail topology.
The clamping voltage VCL can be calculated as follows:
with: VF = VT + Rd.Ip
(VF forward drop voltage) / (VT forward drop threshold voltage)
and VTRANSIL = VBR + Rd_TRANSIL . IP
Calculation example

We assume that the value of the dynamic resistance of the clamping diode is typically:
Rd = 0.5 Ω and VT = 1.1 V.
We assume that the value of the dynamic resisteance of the transil diode is typically
Rd_TRANSIL = 0.5 Ω and VBR = 6.1 V
For an IEC 61000-4-2 surge Level 4 (Contact Discharge: Vg= 8 kV , Rg= 330 Ω),
VBUS = +5 V , and, in first approximation, we assume that: Ip = Vg / Rg = 24 A.
We find:
Note: The calculations do not take into account phenomena due to parasitic inductances.
3.2 Surge protection application example

If we consider that the connections from the pin VBUS to VCC, from I/O to data line, and from
GND to PCB GND plane are two tracks 10 mm long and 0.5 mm wide, we can assume that
the parasitic inductances, LVBUS, LI/O, and LGND, of these tracks are about 6 nH. So when an
IEC 61000-4-2 surge occurs on the data line, due to the rise time of this spike (tr = 1 ns), the
voltage VCL has an extra value equal to LI/O.dI/dt + LGND.dI/dt.
The dI/dt is calculated as: dI/dt = Ip/tr = 24 A/ns for an IEC 61000-4-2 surge level 4 (contact
discharge Vg = 8 kV, Rg = 330 Ω
The over voltage due to the parasitic inductances is:
LI/O.dI/dt = LGND.dI/dt = 6 x 24 = 144 V
By taking into account the effect of these parasitic inductances due to unsuitable layout, the
clamping voltage will be:
We can reduce as much as possible these phenomena with simple layout optimization.
VCL+ = VTRANSIL + VF for positive surges
VCL- = - VF for negative surges
VCL+ = +31.2 V
VCL- = -13.1 V
VCL+ = +31.2 + 144 +144 = 319.2 V
VCL- = -13.1 - 144 -144 = -301.1 V
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