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Partno Mfg Dc Qty AvailableDescript
HCF4042BEYSTN/a3000avaiQUAD CLOCKED "D" LATCH
HCF4042M013TR ST N/a52500avaiQUAD CLOCKED "D" LATCH


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HCF4042BEY-HCF4042M013TR
QUAD CLOCKED "D" LATCH
1/9September 2001 CLOCK POLARITY CONTROL Q AND Q OUTPUTS COMMON CLOCK LOW POWER TTL COMPATIBLE STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO
20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT I = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION

The HCF4042B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
The HCF4042B types contains four latch circuit,
each strobes by a common clock. Complementary
buffered outputs are available from each circuit.
The impedance of the n and p channel output
devices is balanced and all outputs are electrically
identical.
Information present at the data input is transferred
to outputs Q and Q during the CLOCK level which
is programmed by the POLARITY input. For
POLARITY = 0 the transfer occurs during the 0
CLOCK level and for POLARITY = 1 the transfer
occurs during the 1 CLOCK level. The outputs
follow the data input providing the CLOCK and
POLARITY levels defined above are present.
When a CLOCK transition occurs (positive for
POLARITY = 0 and negative for POLARITY = 1)
the information present at the input during the
CLOCK transition is retained at the outputs until
an opposite CLOCK transition occurs.
HCF4042B

QUAD CLOCKED D LATCH
PIN CONNECTION
ORDER CODES
HCF4042B
2/9
IINPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
FUNCTIONAL DIAGRAM
TRUTH TABLE
HCF4042B
3/9
LOGIC BLOCK DIAGRAM

This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
HCF4042B
4/9
DC SPECIFICATIONS

The Noise Margin for both "1" and "0" level is: 1V min. with VDD=5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
HCF4042B
5/9
DYNAMIC ELECTRICAL CHARACTERISTICS (T
amb = 25°C, CL = 50pF, RL = 200KΩ, tr = tf = 20 ns)
(*) Typical temperature coefficient for all VDD value is 0.3 %/°C.
HCF4042B
6/9
TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)
RL = 200KΩ
RT = ZOUT of pulse generator (typically 50Ω)

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