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HCF4026BFST?N/a40avai7-SEGMENT DISPLAY OUTPUTS DECADE COUNTERS/DIVIDERS WITH DECODED


HCF4026BF ,7-SEGMENT DISPLAY OUTPUTS DECADE COUNTERS/DIVIDERS WITH DECODEDapplications wherelow power dissipation and/or low package count areimportant. Inputs common to bot ..
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HD64F2328VTE25 , Old Company Name in Catalogs and Other Documents
HD64F2328VTE25 , Old Company Name in Catalogs and Other Documents
HD64F2633F25 , Series of Microcomputers (MCUs: microcomputer units)
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HCF4026BF
7-SEGMENT DISPLAY OUTPUTS DECADE COUNTERS/DIVIDERS WITH DECODED
HCC/HCF4026B
HCC/HCF40 33B

7-SEGMENT DISPLAY OUTPUTS
DECADE COUNTERS/DIVIDERS WITH DECODED
DESCRIPTION
COUNTER AND 7-SEGMENT DECODINGIN
ONE PACKAGE. EASILYINTERFACED WITH 7-SEGMENT DIS-
PLAY TYPES. FULLY STATIC COUNTER OPERATION: DC 6MHz (typ.) AT VDD= 10V. IDEAL FOR LOW-POWER DISPLAYS. DISPLAY ENABLE OUTPUT- 4026B. ”RIPPLE BLANKING” ANDLAMP TEST- 4033B. QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE. STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS. 5V, 10V, AND 15V PARAMETRIC RATING. INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE. 100% TESTED FOR QUIESCENT CURRENT. MEETS ALLREQUIREMENTS OF JEDECTEN-
TATIVESTANDARDN°13A, ”STANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
The HCC4026B/4033B (extended temperature
range) and HCF4026B/4033B (intermediate tem-
perature range) are monolithic integrated circuits,
availablein 16-lead dual in-line plasticor ceramic
package and plastic micro package. The
HCC/HCF4026B
and HCC/HCF4033B each con-
sistofa 5-stage Johnson decade counter andan
output decoder which converts the Johnson codeto 7-segment decoded output for driving one stagea numerical display. These devices are particu-
larly advantageousin display applications where
lowpower dissipation and/or low package count are
important. Inputs common to both types are
CLOCK, RESET,& CLOCK INHIBIT; common out-
puts are CARRY OUT and the seven decoded out-
puts(a,b,c,d,e,f,g). Additional inputs and outputs
for theHCC/HCF4026B include DISPLAY ENABLE
input and DISPLAY ENABLE and UNGATED ”C-
SEGMENT” outputs. Signals peculiar to the
HCC/HCF4033B
are RIPPLE-BLANKING INPUT
(Plastic Package)
(Ceramic Frit Seal Package)
(Plastic Chip Carrier)
ORDER CODES:

HCC40XXBF HCF40XXBM1
HCF40XXBEY HCF40XXBC1
PIN CONNECTIONS
WITH; DISPLAY ENABLE 4026B
RIPPLE BLANKING 4033B
4026B
4033B

(Micro Package)
cade countertoits zero count. The counteris ad-
vanced one countat the positive clock signal tran-
sitionif the CLOCK INHIBIT signalis low. Counter
advancement via the clock lineis inhibited when the
CLOCK INHIBIT signalis high. Antilock gatingis
providedon the JOHNSON counter, thus assuring
proper counting sequence. The CARRY-OUT (Cout)
signal completes one cycle every ten CLOCK
INPUT cycles andis usedto clock the succeeding
decade directlyina multi-decade counting chain.
The seven decoded outputs(a,b,c,d,e,f,g) illumi-
nate the proper segmentsina seven segment dis-
play device used for representing the decimal
numbers0to9. The 7-segment outputsgo highon
selectionin the HCC/HCF4033B;in the HCC/-
HCF4026B
these outputs go high only when the
DISPLAY ENABLEINis high.
HCC/HCF4026B
- When the DISPLAY ENABLEIN low the seven decoded outputs are forced lowre-
gardlessof the stateof the counter. Activationof the
display only when required resultsin significant
power savings. This system also facilitates im-
plementationof display-character multiplexing. The
CARRY OUT and UNGATED ”C-SEGMENT” sig-
nals are not gatedby the DISPLAY ENABLE and
therefore are available continuously. This featureis requirementin implemen tationof certain divider
functions suchas divide-by-60 and divide-by-12.
HCC/HCF4033B
-The HCC/HCF4033B hasprovi-
sionsfor automatic blankingof the non-significant
zerosina multi-digit decimal number which results an easily readable display consistent with
normal writing practice. For example, the number
0050.07000in an eight digit display wouldbe dis-
playedas 50.07. Zero suppression on the integer
sideis obtainedby connecting the RBI terminalof
the HCC/HCF4033B associated with the most sig-
nificant digitin the displaytoa low-level voltageand
connecting the RBOterminalof that stageto the RBI
terminalof the HCC/HCF4033Bin the next-lower
significant positionin the display. This procedureis
continuedfor each succeeding HCC/HCF4033Bon
the integer sideof the display. On the fraction side the display the RBIof the HCC/HCF4033B asso-
ciated with the least significantbitis connectedtoa
low-level voltage and the RBOof that HCC/-
HCF4033B
is connectedto the RBI terminalof the
HCC/HCF4033B
inthe next more-significant-bit po-
sition. Again, this procedureis continued for all
HCC/HCF4033B’s
on the fraction sideof the dis-
play.Ina purely fractional number the zero immedi-
ately preceding the decimal point canbe displayed connecting the RBIof that stagetoa high level
voltage (insteadofto the RBOof the next more-sig-
nificant-stage). For example: optional zero →
0.7346. Likewise, the zeroina number such as
763.0 can bedisplayed byconnecting the RBIof the
HCC/HCF4033B
associated withittoa high-l evel
voltage. Ripple blankingof non-significant zeros
provides an appre ciable savingsin display power.
The HCC/HCF4033B hasa LAMP TEST input
which, when connectedtoa high-level voltage,
overrides normal decoder operation and enablesa
checktobe madeon possible display malfunctions putting the seven outputsin the high state.
HCC/HCF4026B/4033B
FUNCTIONAL DIAGRAMS
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit

VDD* Supply Voltage: HCC Types
HCF
Types 0.5to+20 0.5to+18 Input Voltage – 0.5to VDD+ 0.5 V DC Input Current (any one input) ±10 mA
Ptot Total Power Dissipation (per package)
Dissipation per Output Transistor
for Top= Full Package-temperature Range
Top Operating Temperature: HCC Types
HCF
Types55to+ 125
–40to+85
Tstg Storasge Temperature –65to+ 150 °C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit

VDD Supply Voltage: HCC Types
HCF
Types
3to18
3to15 Input Voltage 0to VDD V
Top Operating Temperature: HCC Types
HCF
Types55to+ 125
–40to+85
4026B 4033B

Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damageto the device. Thisisa stress
rating only and functional operationofthe deviceat theseor any other conditions above those indicatedinthe operational sec-
tionsof this specificationisnot implied. Exposureto absolute maximum rating conditionsfor external periods may affect device
reliability. Allvoltagesvaluesare referredtoVSS pinvoltage.
HCC/HCF4026B/4033B
LOGIC DIAGRAMS
4026B
4033B
HCC/HCF4026B/4033B
4026B
4033B
TIMING DIAGRAMS
HCC/HCF4026B/4033B
STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)
Test Conditions Value VO |IO|VDD TLow* 25°CTHigh*Symbol Parameter

(V) (V) (μA) (V) Min. Max. Min. Typ. Max. Min. Max.
Unit
Quiescent
Current HCC
Types5 5 5 0.04 5 150
0/10 10 10 0.04 10 300
0/15 15 20 0.04 20 600
0/20 20 100 0.08 100 3000
HCF
Types5 5 20 0.04 20 150
0/10 10 40 0.04 40 300
0/15 15 80 0.04 80 600
VOH Output High
Voltage5 <1 5 4.95 4.95 4.950/10 <1 10 9.95 9.95 9.95
0/15 <1 15 14.95 14.95 14.95
VOL Output Low
Voltage
5/0 <1 5 0.05 0.05 0.0510/0 <1 10 0.05 0.05 0.05
15/0 <1 15 0.05 0.05 0.05
VIH Input High
Voltage
0.5/4.5 <1 5 3.5 3.5 3.51/9 <1 10 7 7 7
1.5/13.5<1 15 11 11 11
VIL Input Low
Voltage
4.5/0.5 <1 5 1.5 1.5 1.59/1 <1 10 3 3 3
13.5/1.5<1 15 4 4 4
IOH Output
Drive
Current HCC
Types5 2.5 5 –2 – 1.6– 3.2 –1.155 4.6 5 – 0.64 – 0.51–1 – 0.36
0/10 9.5 10 –1.6 –1.3–2.6 –0.9
0/15 13.5 15 –4.2 –3.4–6.8 –2.4
HCF
Types5 2.5 5 – 1.53 – 1.36–3.2 –1.15 4.6 5 – 0.52 – 0.44–1 – 0.36
0/10 9.5 10 –1.3 –1.1–2.6 –0.9
0/15 13.5 15 –3.6 –3.0–6.8 –2.4
IOL Output
Sink
Current
HCC
Types5 0.4 5 0.64 0.51 1 0.36
0/10 0.5 10 1.6 1.3 2.6 0.9
0/15 1.5 15 4.2 3.4 6.8 2.4
HCF
Types5 0.4 5 0.52 0.44 1 0.36
0/10 0.5 10 1.3 1.1 2.6 0.9
0/15 1.5 15 3.6 3.0 6.8 2.4
IIH,IIL Input
Leakage
Current
HCC
Types 0/18
Any Input ± 0.1 ±10–5± 0.1 ±1HCF
Types 0/15 15 ± 0.3 ±10–5± 0.3 ±1 Input Capacitance Any Input 5 7.5 pF
(*) TLow=– 55°Cfor HCC device:– 40°Cfor HCF device.
HCC/HCF4026B/4033B
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb =25°C,CL= 50pF, RL= 200kΩ,
typical temperature coefficientforall VDD valuesis 0.3%/°C,all input rise and fall times= 20ns)
ValueSymbol Parameter Test Conditions
VDD
(V) Min. Typ. Max. Unit
CLOCKED OPERATION

tPLH,tPHL Propagation Delay Time
Carry Out Line
5250 50010 100 200 75 150
tPLH,tPHL Propagation Delay Time
Decode Out Lines
5350 70010 125 250 90 180
tTHL,tTLH Transition Time
Carry Out Line
5100 20010 50 100 25 50
fCL* Maximum Clock Input Frequency 5 2.5 5
MHz10 5.5 11 8 16
tWC Clock Pulse Width 5 110 27010 50 100 40 80
tr,tf Clock Input Riseor Fall Time 5
Unlimited μs
RESET OPERATION

tPLH, Propagation Delay Time
Carry Out Line
5275 55010 120 240 80 160
tPLH,tPHL Propagation Delay Time
Decode Out Lines
5300 60010 125 250 90 180
tWR Reset Pulse Width 5 100 12010 50 100 25 50
trem Reset Removal Time 5 0 3010 0 15 0 10 Measured with respectto carry output line.
HCC/HCF4026B/4033B
Typical Output Low (sink) Current. MinimumOutput Low(sink) Current Characteristics.
Typical Output High (source) Current Charac-
teristics. Minimum Output High (source) Current Charac-
teristics.
TYPICAL APPLICATIONS

Interfacing with Filament Fluorescent Display. Detailof Typical Flip-flop Stagefor Both Types.
HCC/HCF4026B/4033B
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