FIN1027 ,3.3V LVDS 2-Bit High Speed Differential DriverFIN1027 3.3V LVDS 2-Bit High Speed Differential DriverApril 2001Revised September 2001FIN10273.3V L ..
FIN1027AMX ,3.3V LVDS 2-Bit High Speed Differential DriverFeaturesThis dual driver is designed for high speed interconnects
FIN1027
3.3V LVDS 2-Bit High Speed Differential Driver
FIN1027 3.3V LVDS 2-Bit High Speed Differential Driver April 2001 Revised September 2001 FIN1027 3.3V LVDS 2-Bit High Speed Differential Driver General Description Features This dual driver is designed for high speed interconnectsGreater than 600Mbs data rate utilizing Low Voltage Differential Signaling (LVDS) technol-3.3V power supply operation ogy. The driver translates LVTTL signal levels to LVDS lev- 0.5ns maximum differential pulse skew els with a typical differential output swing of 350 mV which 1.5ns maximum propagation delay provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed trans-Low power dissipation fer of clock or data.Power-Off protection The FIN1027 can be paired with its companion receiver,Meets or exceeds the TIA/EIA-644 LVDS standard the FIN1028, or with any other LVDS receiver. Flow-through pinout simplifies PCB layout 8-Lead SOIC package saves space Ordering Code: Order Number Package Number Package Description FIN1027M M08A 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pin Descriptions Connection Diagram Pin Name Description D , D LVTTL Data Inputs IN1 IN2 D , D Non-inverting Driver Outputs OUT1+ OUT2+ D , D Inverting Driver Outputs OUT1− OUT2− V Power Supply CC GND Ground Function Table Input Outputs D D D IN OUT+ OUT− LL H HH L OPEN L H H = HIGH Logic Level TOP VIEW L = LOW Logic Level X = Don’t Care © 2001 DS500501
