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ESDAULC6-3BP6
ESD Protection for high speed interface
July 2007 Rev 1 1/11
ESDAULC6-3BP6
ESDAULC6-3BF2ESD protection for high speed interface
Main applicationsWhere transient overvoltage protection in ESD
sensitive equipment is required, such as: Computers Printers Communication systems Cellular phones handsets and accessories Video equipment
Features Ultra low capacitance 1.25 pF max. Bi-directional protection RoHS package
DescriptionThe ESDAULC6-3Bxx is a monolithic application
specific discrete device dedicated to ESD
protection of high speed interfaces such as
USB2.0.
The device is ideal for applications where both
reduced print circuit board space and power
absorption capability are required.
Benefits Ultra low capacitance bidirectional ESD
protection Low PCB space consumption:
2.5 mm2 max footprint (1.7 mm2 for Flip-Chip) Enhanced ESD protection: 15 kV contact discharge 15 kV air discharge No insertion loss to 3.0 GHz Ultra low leakage current High reliability offered by monolithic integration
Figure 1. Functional diagram
Figure 2. Pin configuration
Complies with the following standards:
Table 1. Order codes
IEC 61000-4-2 level 4:8 kV (contact discharge)
15 kV (air discharge)
MIL STD 883G-Method 3015-7: class 3BHBM (Human Body Model)
Characteristics ESDAULC6-3BP6, ESDAULC6-3BF22/11
1 Characteristics
Table 2. Absolute maximum ratings For a surge greater than the maximum values, the diode will fail in short-circuit.
Table 3. Electrical characteristics (Tamb = 25° C) Same value for I/O to I/O and I/O to GND
ESDAULC6-3BP6, ESDAULC6-3BF2 Characteristics 3/11
Figure 3. Relative variation of peak pulse
power versus initial junction
temperature (SOT-666)
Figure 4. Relative variation of peak pulse
power versus initial junction
temperature (Flip-Chip)
Figure 5. Peak pulse power versus
exponential pulse duration
(SOT-666)
Figure 6. Peak pulse power versus
exponential pulse duration
(Flip-Chip)
Figure 7. Clamping voltage versus peak
pulse current (typical values)
(SOT-666)
Figure 8. Clamping voltage versus peak
pulse current (typical values)
(Flip-Chip)
Characteristics ESDAULC6-3BP6, ESDAULC6-3BF24/11
Figure 9. Junction capacitance versus
reverse voltage applied (typical
values) (SOT-666)
Figure 10. Junction capacitance versus
reverse voltage applied (typical
values) (Flip-Chip)
Figure 11. Relative variation of leakage
current versus junction
temperature (typical values)
(SOT-666)
Figure 12. Relative variation of leakage
current versus junction
temperature (typical values)
(Flip-Chip)
Figure 13. Remaining voltage after
ESDAULC6-3BP6 during ESD
15 kV positive surge (air
discharge) (SOT-666)
Figure 14. Remaining voltage after
ESDAULC6-3BF2 during ESD
15 kV positive surge (air
discharge) (Flip-Chip)
ESDAULC6-3BP6, ESDAULC6-3BF2 Characteristics 5/11
Figure 15. Remaining voltage after
ESDAULC6-3BP6 during ESD
15 kV negative surge (air
discharge) (SOT-666)
Figure 16. Remaining voltage after
ESDAULC6-3BF2 during ESD
15 kV negative surge (air
discharge) (Flip-Chip)
Figure 17. S21 attenuation measurement
results of each channel (SOT-666)
Figure 18. S21 attenuation measurement
results of channel 1
(Flip-Chip)
Figure 19. Analog crosstalk measurements
between channels (SOT-666)
Figure 20. Analog crosstalk measurements
between channels (Flip-Chip)
Application examples ESDAULC6-3BP6, ESDAULC6-3BF26/11
2 Application examples
Figure 21. USB2.0 (high speed) protection application schematic
Figure 22. Audio jack protection application schematic
Figure 23.
