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ESDALC6V1-5M6
Low capacitance TRANSIL array for ESD protection
ESDALC6V1M6, ESDALC6V1-5M64- and 5-line low capacitance T ransil™ arrays for ESD protection
Features High ESD protection level High integration Suitable for high density boards 4 unidirectional Transil diodes
(ESDALC6V1M6) 5 unidirectional Transil diodes
(ESDALC6V1-5M6) Breakdown voltage VBR = 6.1 V min Low diode capacitance (12 pF typ at 0 V) Low leakage current < 70 nA Very small PCB area: 1.45 mm² 500 microns pitch Lead-free package
Complies with the following standards IEC 61000-4-2 15 kV (air discharge) 8 kV (contact discharge) MIL STD 883G- Method 3015-7: class3B >8 kV (human body model)
ApplicationsWhere transient overvoltage protection in ESD
sensitive equipment is required, such as: Computers Printers Communication systems Cellular phone handsets and accessories Video equipment
Figure 1. Functional diagram
DescriptionThe ESDALC6V1xxM6 are monolithic arrays
designed to protect up to 4 or 5 lines against ESD
transients.
The device is ideal for applications where both
reduced print circuit board space and power
absorption capability are required.
TM: T ransil is a trademark of STMicroelectronics
Characteristics ESDALC6V1M6, ESDALC6V1-5M6
1 Characteristics
Table 1. Absolute maximum ratings (Tamb = 25 °C) For a surge greater than the maximum values, the diode will fail in short-circuit.
Table 2. Electrical characteristics (Tamb = 25 °C) ΔVBR = αT * (Tamb - 25 °C) * VBR (25 °C)
ESDALC6V1M6, ESDALC6V1-5M6 Characteristics
Figure 2. Relative variation of peak pulse
power versus initial junction
temperature
Figure 3. Peak pulse power versus
exponential pulse duration
Figure 4. Clamping voltage versus peak
pulse current (typical values,
8/20 µs waveform)
Figure 5. Forward voltage drop versus peak
forward current (typical values)
Figure 6. Junction capacitance versus
reverse voltage applied (typical
values)
Figure 7. Relative variation of leakage
current versus junction
temperature (typical values)
Ordering information scheme ESDALC6V1M6, ESDALC6V1-5M6 Ordering information scheme
Figure 12. Ordering information scheme
Figure 8. S21 attenuation measurement
results of each channel
Figure 9. Analog crosstalk measurements
between channels
Figure 10. ESD response to IEC 6100-4-2
(+15 kV air discharge) on each
channel
Figure 11. ESD response to IEC 6100-4-2
(-15 kV air discharge) on each
channel
ESDALC6V1M6, ESDALC6V1-5M6 Package information
3 Package information Epoxy meets UL94, V0 Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: .
ECOPACK® is an ST trademark.
Figure 13. Footprint dimensions in mm [inches]
Table 3. Package dimensions ± 0.1 mm ± 0.05 mm
Package information ESDALC6V1M6, ESDALC6V1-5M6
Figure 14. Tape and reel specificationNote: Product marking may be rotated by 90° for assembly plant differentiation. In no case should
this product marking be used to orient the component for its placement on a PCB. Only pin1
mark is to be used for this purpose.
