DS90CR213 ,21-Bit Channel LinkDS90CR213/DS90CR21421-BitChannelLinkÐ66MHzPRELIMINARYDecember1996DS90CR213/DS90CR21421-BitChannelLi ..
DS90CR213MTD ,21-Bit Channel LinkGeneral Descriptionnector physical size and cost, and reduces shielding require-The DS90CR213 trans ..
DS90CR214 ,21-Bit Channel LinkFeaturesof TTL data are transmitted at a rate of 462 Mbps per LVDSY66 MHz Clock Supportdata channel ..
DS90CR214MTD ,21-Bit Channel LinkDS90CR213/DS90CR214 21-Bit Channel Link—66 MHzJuly 1997DS90CR213/DS90CR21421-Bit Channel Link—66 MH ..
DS90CR214MTD ,21-Bit Channel LinkBlock DiagramsDS90CR213DS90CR214DS012888-27DS012888-1Order Number DS90CR213MTDOrder Number DS90CR21 ..
DS90CR214MTD ,21-Bit Channel LinkFeaturesLVDS data streams back into 21 bits of CMOS/TTL data. Ata transmit clock frequency of 66 MH ..
DS90CR213-DS90CR214
21-Bit Channel Link
TL/F/12888
DS90CR213/DS90CR214
21-Bit
Channel
LinkÐ66
MHz
PRELIMINARY
December 1996
DS90CR213/DS90CR214
21-Bit Channel LinkÐ66 MHz
General Description
The DS90CR213 transmitter converts21bitsof CMOS/TTL
datainto three LVDS (Low Voltage Differential Signalling)
data streams.A phase-locked transmit clockis transmitted parallel withthe data streams overa fourth LVDS link.
Every cycleofthe transmit clock21bitsof input dataare
sampled and transmitted. The DS90CR214 receiver con-
vertsthe LVDS data streams backinto21bitsof CMOS/
TTL data.Ata transmit clock frequencyof66 MHz,21bits TTLdataare transmittedatarateof462 Mbpsper LVDS
data channel. Usinga66 MHz clock,the data throughputis
1.386 Gbit/s (173 Mbytes/s).
The multiplexingofthe data lines providesa substantialca-
ble reduction. Long distance parallel single-ended buses
typically requirea ground wireper active signal (and have
very limited noise rejection capability). Thus,fora 21-bit
wide dataandone clock,upto44 conductorsare required.
Withthe Channel Link chipsetasfewas9 conductors(3
data pairs,1 clockpair anda minimumofone ground)are
needed. This providesan 80% reductionin required cable
width, which providesa system cost savings, reduces con-
nector physical size and cost, and reduces shieldingre-
quirementsduetothe cable’s smaller form factor.
The21 CMOS/TTL inputs can supporta varietyof signal
combinations.For example,5 4-bit nibbles (bytea parity)2 9-bit (bytea3 parity)and1 control.
Features66 MHz Clock SupportUpto173 Mbytes/s bandwidth Chipset(TxaRx) power consumption k250 mW (typ) Power-down mode (k0.5 mW total)Upto 1.386 Gbit/s data throughput Narrowbus reduces cable sizeand cost 290mV swing LVDS devicesforlow EMI PLL requiresno external components Low profile 48-lead TSSOP package Rising edge data strobe Compatible with TIA/EIA-644 LVDS Standard
Block Diagrams
DS90CR213 DS90CR214
TL/F/12888–1
Order Number DS90CR213MTD
SeeNS Package Number MTD48
OrderNumber DS90CR214MTD
See NSPackageNumberMTD48
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1996National SemiconductorCorporation RRD-B30M17/Printed inU.S.A. http://
