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DS40MB200SQ/NOPB |DS40MB200SQNOPBNSN/a15avaiDual 4.0 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization 48-WQFN -40 to 85


DS40MB200SQ/NOPB ,Dual 4.0 Gbps 2:1/1:2 CML Mux/Buffer with Transmit Pre-Emphasis and Receive Equalization 48-WQFN -40 to 85 SNLS144J–JUNE 2005–REVISED JANUARY 20165 Pin Configuration and FunctionsNJU Package48-Pin WQFNTop ..
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DS42MB200TSQ/NOPB ,Dual 4.25 Gbps 2:1/1:2 CML Mux/Buffer w/ Tx Pre-Emphasis & Rx Equalization 48-WQFN -40 to 85PIN DESCRIPTIONS (continued)Pin Name Pin Number I/O DescriptionSIA_1+ 16 I Inverting and non-invert ..
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DS40MB200SQ/NOPB
Dual 4 Gb/s 1:2 Mux/Buffer with Onput Wqualization and Output Pre-Emphasis
PRE_S
LO_0 ±
MUX_S0
SIA_0 ±
SIB_0 ±
LB0A
LB0B
SOA_0 ±
SOB_0 ±LI_0 ±
PRE_S
PRE_L
LO_1 ±
MUX_S1
SIA_1 ±
SIB_1 ±
LB1A
SOA_1 ±
PRE_L
Port 0
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SNLS144J –JUNE
DS40MB200 Dual 4-Gbps 2:1/1:2 CML MUX/Buffer With Transmit Pre-Emphasis
Receive Equalization Features 3 Description

The DS40MB200 deviceisa dual signal conditioning 1-Gbpsto 4-Gbps Low Jitter Operation 2:1 multiplexer (MUX) and 1:2 fan-out buffer designed• Fixed Input Equalization for usein backplane-redundancy applications. Signal• Programmable Output Pre-Emphasis conditioning features include continuous time linear
equalization (CTLE) and programmable output pre-• Independent Switch and Line Side Pre-Emphasis emphasis, extending data communication in FR4Controls backplanesat rates upto4 Gbps. Each input stage• Programmable Switch-Side Loopback Mode has a fixed equalizer to reduce intersymbol• On-Chip Terminations interference distortion from board traces. 3.3-V Supply All output drivers have four selectable stepsof pre-• ESD Ratingof 6-kV HBM emphasisto compensate for transmission losses from
long FR4 backplanes and reduce deterministic jitter.• 48-leadless WQFN Package(7 mm×7 mm) The pre-emphasis levels can be independently• 0°Cto +85°C Operating Temperature Range controlled for the line-side and switch-side drivers.
The internal loopback paths from switch-side inputto2 Applications switch-side output enable at-speed system testing.All
receiver inputs are internally terminated with 100-Ω• Backplaneor Cable Driver
differential terminating resistors. All drivers are• Redundancy and Signal Conditioning Applications internally terminated with 50Ωto VCC.• XAUI(1)
(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Simplified Block Diagram
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