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DS3988DALLASN/a47avai8-Channel Cold-Cathode Fluorescent Lamp Controller
DS3988T+MAXIMN/a1500avai8-Channel Cold-Cathode Fluorescent Lamp Controller


DS3988T+ ,8-Channel Cold-Cathode Fluorescent Lamp ControllerELECTRICAL CHARACTERISTICS(V = +4.5V to +5.5V, T = -40°C to +85°C.)CC APARAMETER SYMBOL CONDITIONS ..
DS3991Z+PP ,Low-Cost CCFL ControllerApplications♦ Strike Frequency BoostLCD PC Monitors♦ 100% to < 10% Dimming RangeLCD TVs♦ Low Cost♦ ..
DS3991Z+PP ,Low-Cost CCFL ControllerFeatures♦ CCFL Controller for Backlighting LCD PanelsThe DS3991 is a controller for cold-cathode fl ..
DS3992 ,Two-Channel, Push-Pull CCFL ControllerApplications♦ 100% to < 10% Dimming RangeLCD PC Monitors♦ 4.5V to 5.5V Single-Supply OperationLCD-T ..
DS3992Z-09N+ ,Two-Channel, Push-Pull CCFL ControllerFeatures♦ Two-Channel CCFL Controller for BacklightingThe DS3992 is a low-cost, two-channel control ..
DS3992Z-09N+T , Two-Channel, Push-Pull CCFL Controller
EC2-12NU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-24 ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-24NU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-4.5NJ ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-4.5NU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE
EC2-4.5TNU ,COMPACT AND LIGHTWEIGHT, SMALL MOUNTING SIZE, HIGH BREAKDOWN VOLTAGE


DS3988-DS3988T+
8-Channel Cold-Cathode Fluorescent Lamp Controller
General Description
The DS3988 is an 8-channel controller for cold-cathode
fluorescent lamps (CCFLs) used to backlight liquid
crystal displays (LCDs) in TV and PC monitor applica-
tions. The DS3988 supports configurations of 1 to 8
lamps, and multiple DS3988 controllers can be cascad-
ed to support applications requiring more than 8 lamps.
Applications

LCD Televisions
LCD PC Monitors
Features
High-Density CCFL Controller for LCD TV and PC
Monitor Backlights
Can Be Easily Cascaded to Support More Than
8 Lamps
Minimal External ComponentsAnalog Brightness ControlPer-Channel Lamp Control Ensures Equal
Brightness Among Lamps and Maximizes Lamp
Life
Gate Driver Phasing Minimizes DC Supply Current
Surges
Per-Channel Lamp Fault Monitoring for Lamp
Open, Lamp Overcurrent, Failure to Strike, and
Overvoltage Conditions
Accurate (±5%) Independent On-Board Oscillators
for Lamp Frequency (40kHz to 80kHz) and DPWM
Burst Dimming Frequency (22.5Hz to 440Hz)
Can Be Synchronized to External Sources for the
Lamp and DPWM Frequencies
<10% to 100% Dimming RangeProgrammable Soft-Start Minimizes Audible
Transformer Noise
I2C-Compatible Serial Port and On-Board
Nonvolatile (NV) Memory Allow Device
Customization
8-Byte NV User Memory for Storage of Serial
Numbers and Date Codes
4.5V to 5.5V Single-Supply Operation-40°C to +85°C Temperature Range48-Lead TQFP (7mmx 7mm) Package
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller

OVD8
LCM8
GA8
OVD7
GA7
OVD6
LCM6
GA6
GB6
LCM7
GB7
GB8LCM1
OVD1
GA2
GB2
LCM2
OVD2
GA3
OVD3
GB3
LCM3
GB1
GA11
OVD4
GND
GA5
LCM5
GND
OVD5
LCM4
GB4GA4
GND
SVMBRIGHTGNDPOSCPSYNCA0LOSCLSYNCFAULTSDASCLV
48-LEAD TQFP
7 x 7 x 1.0mm

GB5
TOP VIEW47464544434241403938371415161718192021222324
DS3988
Pin Configuration

Rev 0; 4/05
Ordering Information
Typical Operating Circuit appears at end of data sheet.
PARTTEMP RANGEPIN-PACKAGE

DS3988T-40°C to +85°C48 TQFP
DS3988T+-40°C to +85°C48 TQFP
+Denotes lead-free package.
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS

(TA= -40°C to +85°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Voltage on VCC, SDA, and SCL
Relative to Ground.............................................-0.5V to +6.0V
Voltage on Leads Other than VCC,
SDA, and SCL…………………………..-0.5V to (VCC+ 0.5V),
not to exceed +6.0V
Operating Temperature Range...........................-40°C to +85°C
EEPROM Programming Temperature Range.........0°C to +70°C
Storage Temperature Range.............................-55°C to +125°C
Soldering Temperature...................See J-STD-020 Specification
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Supply VoltageVCC(Note 1)4.55.5V
Input Logic 1VIH0.7 x
VCC
VCC +
0.3V
Input Logic 0VIL-0.30.3 x
VCCV
SVM Voltage RangeVSVM-0.3VCC +
0.3V
BRIGHT Voltage RangeVBRIGHT-0.3VCC +
0.3V
LCM Voltage RangeVLCM(Note 2)-0.3VCC +
0.3V
OVD Voltage RangeVOVD(Note 2)-0.3VCC +
0.3V
Gate-Driver Output Charge
LoadingQG20nC
ELECTRICAL CHARACTERISTICS

(VCC= +4.5V to +5.5V, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Supply CurrentICCGA, GB loaded with 600pF,
8 channels active1520mA
Input Leakage (Digital Pins)IL-1.0+1.0µA
Output Leakage (SDA, FAULT)ILOHigh impedance-1.0+1.0µA
VOL1IOL1 = 3mA0.4Low-Level Output Voltage
(SDA, Fault)VOL2IOL2 = 6mA0.6V
Low-Level Output Voltage
(PSYNC, LSYNC)VOL3IOL3 = 4mA0.4V
Low-Level Output Voltage
(GA, GB)VOL4IOL4 = 4mA0.4V
High-Level Output Voltage
(PSYNC, LSYNC)VOH1IOH1 = -1mAVCC
- 0.4V
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller
ELECTRICAL CHARACTERISTICS (continued)

(VCC= +4.5V to +5.5V, TA= -40°C to +85°C.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

High-Level Output Voltage
(GA, GB)VOH2IOH2 = -1mAVCC
- 0.4V
UVLO Threshold—VCC RisingVUVLOR4.3V
UVLO Threshold—VCC FallingVUVLOF3.7V
UVLO HysteresisVUVLOH100mV
SVM ThresholdVSVMT1.82.02.2V
SVM HysteresisVSVMH50mV
LCM and OVD Source Current4µA
LCM and OVD Sink Current4µA
LCM and OVD DC Bias VoltageVDCB1.35V
LCM and OVD Input ResistanceRDCB50kΩ
Lamp Off ThresholdVLOT(Note 3)0.30.40.5V
Lamp Overcurrent ThresholdVLOC(Note 3)1.82.02.2V
Lamp Regulation ThresholdVLRT(Note 3)0.91.01.1V
OVD ThresholdVOVDT(Note 3)0.91.01.1V
Lamp Frequency RangefLF:OSC4080kHz
Lamp Frequency Source
Frequency TolerancefLFS:TOLLOSC resistor ±2% over temperature-5+5%
Lamp Frequency Receiver
Duty CyclefLFR:DUTY4060%
DPWM Frequency RangefD:OSC22.5440.0Hz
DPWM Source Frequency
TolerancefDSR:TOLPOSC resistor ±2% over temperature-5+5%
DPWM Receiver Duty CyclefDFE:DUTY4060%
DPWM Receiver
Frequency RangefDR:OSC22.5440.0Hz
DPWM Receiver
Minimum Pulse WidthtDR:MIN(Note 4)25µs
BRIGHT Voltage—Minimum
BrightnessVBMIN0.5V
BRIGHT Voltage—Maximum
BrightnessVBMAX2.0V
Gate-Driver Output Rise/Fall TimetR/tFCL = 600pF100ns
GAn and GBn Duty Cycle(Note 5)44%
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller2C AC ELECTRICAL CHARACTERISTICS (See Figure9)

(VCC= +4.5V to +5.5V, timing referenced to VIL(MAX)and VIH(MIN), TA= -40°C to +85°C.)
Note 1:
All voltages are referenced to ground, unless otherwise noted. Currents into the IC are positive, out of the IC negative.
Note 2:
During fault conditions, the AC-coupled feedback values are allowed to be outside the Absolute Max Rating of the LCM or
OVD pin for up to 1 second.
Note 3:
Voltage with respect to VDCB.
Note 4:
This is the minimum pulse width guaranteed to generate an output burst, which will generate the DS3988’s minimum burst
duty cycle. This duty cycle may be greater than the duty cycle of the PSYNC input. Once the duty cycle of the PSYNC
input is greater than the DS3988’s minimum duty cycle, the output’s duty cycle will track the PSYNC’s duty cycle. Leaving
PSYNC low (0% duty cycle) disables the GAn and GBn outputs in DPWM Slave mode.
Note 5:
This is the maximum lamp frequency duty cycle that will be generated at any of the GAn or GBn outputs.
Note 6:
I2C interface timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I2C stan-
dard-mode timing.
Note 7:
After this period, the first clock pulse can be generated.
Note 8:
CB—total capacitance allowed on one bus line in picofarads.
Note 9:
EEPROM write time applies to all the EEPROM memory. EEPROM write begins after a stop condition occurs.
Note 10:
Guaranteed by design.
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

SCL Clock FrequencyfSCL(Note 6)0400kHz
Bus Free Time Between Stop and
Start ConditionstBUF1.3µs
Hold Time (Repeated) Start
ConditiontHD:STA(Note 7)0.6µs
Low Period of SCLtLOW1.3µs
High Period of SCLtHIGH0.6µs
Data Hold TimetHD:DAT00.9µs
Data Setup TimetSU:DAT100ns
Start Setup TimetSU:STA0.6µs
SDA and SCL Rise TimetR(Note 8)20 +
0.1CB300ns
SDA and SCL Fall TimetF(Note 8)20 +
0.1CB300ns
Stop Setup TimetSU:STO0.6µs
SDA and SCL Capacitive
LoadingCB(Note 8)400pF
EEPROM Write TimetW(Note 9)2030ms
NONVOLATILE MEMORY CHARACTERISTICS

(VCC= +4.5V to +5.5V)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

EEPROM Write Cycles+70°C (Note 10)50,000Cycles
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller
ACTIVE SUPPLY CURRENT
vs. SUPPLY VOLTAGE

DS3988 toc01
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
fLF:OSC = 71kHz
GATE QC = 3.5nCDPWM = 100%
DPWM = 50%
DPWM = 10%
SVM = 0V
ACTIVE SUPPLY CURRENT
vs. TEMPERATURE

DS3988 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)3510-15
fLF:OSC = 71kHz
GATE QC = 3.5nCDPWM = 100%
VCC = 4.5V
VCC = 5.0VVCC = 5.5V
INTERNAL FREQUENCY CHANGE
vs. TEMPERATURE

DS3988 toc03
TEMPERATURE (°C)
FREQUENCY CHANGE (%)35-1510
LAMP FREQUENCY
DPWM FREQUENCY
TYPICAL OPERATION AT 12V

DS3988 toc0410μs
5.0V GA
10μs
5.0V GB
10μs
2.0V LCM
10μs
2.0V OVD
BURST DIMMING AT 150Hz AND 10%

DS3988 toc081ms
5.0V GA
1ms
5.0V GB
1ms
2.0V LCM
1ms
2.0V OVD
TYPICAL OPERATION AT 15V

DS3988 toc0510μs
5.0V GA
10μs
5.0V GB
10μs
2.0V LCM
10μs
2.0V OVD
TYPICAL OPERATION AT 18V

DS3988 toc0610μs
5.0V GA
10μs
5.0V GB
10μs
2.0V LCM
10μs
2.0V OVD
TYPICAL STARTUP WITH SVM

DS3988 toc072ms
2.0V SVM
2ms
5.0V GB
2ms
2.0V LCM
2ms
2.0V OVD
Typical Operating Characteristics

(VCC= +5.0V, TA= +25°C, unless otherwise noted.)
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controllerypical Operating Characteristics (continued)

(VCC= +5.0V, TA= +25°C, unless otherwise noted.)
BURST DIMMING AT 150Hz AND 50%

DS3988 toc091ms
5.0V GA
1ms
5.0V GB
1ms
2.0V LCM
1ms
2.0V OVD
SOFT-START AT VINV = 18V

DS3988 toc1050μs
5.0V GA
50μs
5.0V GB
50μs
2.0V LCM
50μs
2.0V OVD
LAMP STRIKE—EXPANDED VIEW

DS3988 toc111ms
5.0V GA
1ms
5.0V GB
1ms
2.0V LCM
1ms
2.0V OVD
LAMP STRIKE WITH OPEN LAMP
AUTORETRY ENABLED

DS3988 toc1250ms
5.0V GA
50ms
5.0V GB
50ms
2.0V LCM
50ms
2.0V OVD
LAMP STRIKE WITH OPEN LAMP
AUTORETRY DISABLED

DS3988 toc1350ms
5.0V GA
50ms
5.0V GB
50ms
2.0V LCM
50ms
2.0V OVD
STAGGERED BURST DIMMING START

DS3988 toc14
0.1ms
5.0V GA1
0.1ms
5.0V GA2
0.1ms
5.0V GA3
0.1ms
5.0V GA4
LAMP-OUT (LAMP OPENED)
AUTORETRY DISABLED

DS3988 toc15
0.5ms
5.0V GA
0.5ms
5.0V GB
0.5ms
2.0V LCM
0.5ms
2.0V OVD
LAMP-OUT (LAMP OPENED)
AUTORETRY ENABLED

DS3988 toc16
50ms
5.0V GA
50ms
5.0V GB
50ms
2.0V LCM
50ms
2.0V OVD
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller
Pin Description
PINS BY CHANNEL (n = 1–8)NAMECH 1CH 2CH 3CH 4CH 5CH 6CH 7CH 8DESCRIPTION

GAn1591419252933
MOSFET A Gate Drive. Connect directly to logic-
level mode n-channel MOSFET. Leave open if
channel is unused.
GBn26101520263034
MOSFET B Gate Drive. Connect directly to logic-
level mode n-channel MOSFET. Leave open if
channel is unused.
LCMn37111621273135
Lamp Current Monitor Input. Lamp current is
monitored by measuring a voltage across a
resistor placed in series with the low-voltage side
of the lamp. Leave open if channel is unused.
OVDn48121722283236
Overvoltage Detection. Lamp voltage is
monitored through a capacitor-divider placed on
the high-voltage side of the transformer. Leave
open if channel is unused.
NAMEPINDESCRIPTION

GND13, 18,
24, 45Ground Connection
VCC23, 48Power-Supply Connection
SDA37Serial Data Input/Output. I2C bidirectional data pin, which requires a pullup resistor to realize high logic
levels.
SCL38Serial Clock Input. I2C clock input.
FAULT39Fault Output. Active-low, open-drain, requires external pullup resistor to realize high logic levels.
LSYNC40
Lamp Frequency Input/Output. This pin is the input for an externally sourced lamp frequency when the
DS3988 is configured as a lamp frequency receiver. If the DS3988 is configured as a lamp frequency source
(i.e., the lamp frequency is generated internally), the frequency is output on this pin for use by other lamp
frequency receiver DS3988s.
LOSC41Lamp Oscillator Resistor Adjust. A resistor to ground on this lead sets the frequency of the lamp oscillator.42Address Select Input. Determines the DS3988’s I2C slave address.
PSYNC43
DPWM Input/Output. This pin is the input for an externally generated DPWM signal when the DS3988 is
configured as a DPWM receiver. If the DS3988 is configured as a DPWM source (i.e., the DPWM signal is
generated internally), the DPWM signal is output on this pin for use by other DPWM receiver DS3988s.
POSC44
DPWM Oscillator Resistor Adjust. A resistor to ground on this lead sets the frequency of the DPWM oscillator
(dimming clock). This lead can optionally accept a 22.5Hz to 440Hz clock as the source timing for the
internal DPWM signal.
BRIGHT46Analog Brightness Control Input. Used to control DPWM dimming. Ground when using a PWM signal at
PSYNC to control brightness.
SVM47Supply Voltage Monitor Input. Used to monitor the inverter voltage for undervoltage conditions.
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller
Functional Diagram

I2C-
COMPATIBLE
INTERFACE8-BYTE USER MEMORY
EEPROM
SYSTEM
ENABLE/POR
EIGHT
INDEPENDENT
CCFL
CONTROLLERS
CHANNEL FAULT
CHANNEL ENABLE
[40kHz
TO 80kHz]8-PHASE
GENERATOR
x512
PLL
MUX
RGSO BIT
AT CR1.4
RAMP
GENERATOR
MUX
POSCS BIT
AT CR1.1
MUX
DPSS BIT
AT CR1.3
DPWM
SIGNAL
GND
GBn
GAnMOSFET
GATE
DRIVERS
OVDn
OVERVOLTAGE
DETECTION
LCMn
LAMP CURRENT
MONITOR
FAULT
HANDLING
40kHz TO 80kHz
SDAI2C DEVICE
CONFIGURATION
PORT
LAMP FREQUENCY
INPUT/OUTPUT
EXTERNAL RESISTOR
LAMP FREQUENCY SET
DPWM SIGNAL
INPUT/OUTPUT
ANALOG BRIGHTNESS
CONTROL
EXTERNAL RESISTOR
DPWM FREQUENCY SET/
DPWM CLOCK INPUT
SCL
FAULT
LSYNC
LOSC
PSYNC
BRIGHT
POSC
[20.48MHz TO 40.96MHz]
22.5Hz TO 440Hz
40kHz TO 80kHz
OSCILLATOR (±5%)
22.5Hz TO 440Hz
OSCILLATOR (±5%)
LFSS BIT AT
CR1.2
DPSS BIT
AT CR1.3
UVLOVCC
[4.5V TO 5.5V]
SVM
SUPPLY VOLTAGE
MONITOR
2.0V
CONTROL REGISTERS
DS3988
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller

DS3988
OVERVOLTAGE
LAMP OVERCURRENT
LSE BIT AT CR1.0
LAMP REGULATION
CHANNEL ENABLE
CHANNEL FAULT
DIGITAL
CCFL
CONTROLLER
LAMP OUT
1 OF 8 CHANNELS
400mV
LCM
LAMP CURRENT
MONITOR
1.0V
2.0V
1.0V
256 LAMP CYCLE
INTEGRATOR
PEAK
DETECT/
HOLD
PEAK
DETECT
OVD
OVERVOLTAGE
DETECTION
MOSFET
GATE
DRIVERSGB
GATE
DRIVERS
256 LAMP CYCLE
INTEGRATOR
DPWM SIGNAL
512 x LAMP FREQUENCY
[20.48MHz TO 40.96MHz]
PHASED LAMP FREQUENCY
[40kHz TO 80kHz]
Figure1. Per Channel Logic Diagram
Detailed Description

The DS3988 uses a push-pull drive scheme to convert
a DC voltage (5V to 24V) to the high-voltage (600VRMS
to 1200VRMS) AC waveform that is required to power
the CCFLs. The push-pull drive scheme uses a minimal
number of external components, which reduces
assembly cost and makes the printed circuit board (PC
board) design easy to implement. The push-pull drive
scheme also provides an efficient DC-to-AC conversion
and produces near-sinusoidal waveforms.
Each DS3988 channel drives two logic-level n-channel
MOSFETs that are connected between the ends of a
step-up transformer and ground (see Figure1 and the
Typical Operating Circuit). The transformer has a cen-
ter tap on the primary side that is connected to a DC
voltage supply. The DS3988 alternately turns on the
two MOSFETs to create the high-voltage AC waveform
on the secondary side. By varying the duration of the
MOSFET turn-on times, the controller is able to accu-
rately control the amount of current flowing through the
CCFL.
A resistor in series with the CCFL’s ground connection
enables current monitoring. The voltage across this
resistor is fed to the lamp current monitor (LCM) input
on the DS3988. The DS3988 compares the peak resistor
voltage against an internal reference voltage to deter-
mine the duty cycle for the MOSFET gates. Each CCFL
receives independent current monitoring and control,
which results in equal brightness across all of the lamps
and maximizes the lamp’s brightness and lifetime.
EEPROM Registers and I2C-Compatible
Serial Interface

The DS3988 uses an I2C-compatible serial interface for
communication with the on-board EEPROM configura-
tion registers and user memory. The configuration regis-
ters—four Soft-Start Profile registers (SSP1/2/3/4) and
two Control Registers (CR1/2)—allow the user to cus-
tomize many DS3988 parameters such as the soft-start
ramp rate, the lamp and dimming frequency sources,
fault-monitoring options, and channel enabling/disabling.
The eight bytes of nonvolatile user memory can be used
to store manufacturing data such as date codes, serial
numbers, or product identification numbers.
The device is shipped from the factory with the configu-
ration registers programmed to a set of default configu-
ration parameters. To inquire about custom factory
programming, email [email protected].
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller
Channel Phasing

The lamp-frequency MOSFET gate turn-on times are
equally phased among the eight channels during the
burst period. This reduces the inrush current that would
result from all lamps switching simultaneously, and
hence eases the design requirements for the DC sup-
ply. Figure2 details how the eight channels are
phased. Note that it is the lamp-frequency signals that
are phased, NOT the DPWM signals.
Lamp Dimming Control (DPWM)

The DS3988 uses a digital pulse-width modulated
(DPWM) signal (22.5Hz to 440Hz) to provide efficient
and precise lamp dimming. During the high period of
the DPWM cycle, the lamps are driven at the selected
lamp frequency (40kHz to 80kHz) as shown in Figure6.
This part of the cycle is called the “burst” period
because of the lamp frequency burst that occurs dur-
ing this time. During the low period of the DPWM cycle,
the controller disables the MOSFET gate drivers so the
lamps are not driven. This causes the current to stop
flowing in the lamps, but the time is short enough to keep
the lamps from de-ionizing. Dimming is increased/
decreased by adjusting (i.e., modulating) the duty cycle
of the DPWM signal.
The DS3988 can generate its own DPWM signal internally
(set DPSS = 0 in CR1), which can then be sourced to
other DS3988s if required, or the DPWM signal can be
supplied from an external source (set DPSS = 1 in CR1). 345678234567812345678
VARIABLE
MOSFET
GATE DUTY
CYCLE8
GA1
CHANNEL
SEQUENCE
GB1
GA2
GB2
GA3
GB3
GA4
GB4
GA5
GB5
GA6
GB6
GA7
GB7
GA8
GB8
MOSFET GATE-
DRIVE SIGNALS AT
LAMP FREQUENCY
DIMMING CLOCK (DPWM)
FREQUENCY
Figure2. Channel Phasing Detail
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller

To generate the DPWM signal internally, the DS3988
requires a clock (referred to as the dimming clock) to
set the DPWM frequency. The user can supply the dim-
ming clock by setting POSCS = 1 in CR1 and applying
an external 22.5Hz to 440Hz signal at the POSC pin, or
DS3988’s clock can be generated by the DS3988’s
oscillator (set POSCS = 0 in CR1), in which case the
frequency is set by an external resistor at the POSC
pin. These two dimming clock options are shown in
Figure3. Regardless of whether the dimming clock is
generated internally or sourced externally, the POSC1
and POSC2 bits in CR2 must be set to match the
desired dimming clock frequency.
When the DPWM signal is generated internally, its duty
cycle (and, thus, the lamp brightness) is controlled by a
user-applied analog voltage at the BRIGHT input. A
BRIGHT voltage less than 0.5V will cause the DS3988 to
operate with the minimum burst duty cycle, providing
the lowest brightness setting, while any voltage greater
than 2.0V will cause a 100% burst duty cycle (i.e., lamps
always being driven), which provides the maximum
brightness. For voltages between 0.5V and 2V the duty
cycle will vary linearly between the minimum and 100%.
The internally generated DPWM signal is available at
the PSYNC I/O pin (set RGSO = 0 in CR1) for sourcing
to other DS3988s, if any, in the circuit. This allows all
DS3988s in the system to be synchronized to the same
DPWM signal. The DS3988 that is generating the
DPWM signal for other DS3988s in the system is
referred to as the DPWM source.
When the DPWM signal is provided by an external
source, either from the PSYNC pin of another DS3988 or
from some other user-generated source, it is input into the
PSYNC I/O pin of the DS3988. In this mode, the BRIGHT
and POSC inputs are disabled and should be grounded
(see Figure4). When multiple DS3988s are used in a
design, DS3988s configured to use externally generated
DPWM signals are referred to as DPWM receivers.
Lamp Frequency Configuration

The DS3988 can generate its own lamp frequency clock
internally (set LFSS = 0 in CR1), which can then be
sourced to other DS3988s if required, or the lamp clock
can be supplied from an external source (set LFSS = 1 in
CR1). When the lamp clock is internally generated, the
frequency (40kHz to 80kHz) is set by an external resistor
at the LOSC. In this case, the DS3988 can act as a lamp
frequency source because the lamp clock is output at
the LSYNC I/O pin for synchronizing any other DS3988s
configured as lamp frequency receivers.
The DS3988 acts as a lamp frequency receiver when
the lamp clock is supplied externally. In this case, a
40kHz to 80kHz clock must be supplied at the LSYNC
I/O. The external clock can originate from the LSYNC
I/O of a DS3988 configured as a lamp frequency
source or from some other source.
BRIGHT
PSYNC (OUTPUT)
POSC
2.0V
0.5V
22.5Hz TO 440Hz
RESISTOR TO SET THE
DIMMING FREQUENCY
DPWM
SIGNAL
ANALOG DIMMING
CONTROL VOLTAGE
RESISTOR-SET DIMMING CLOCK
BRIGHT
PSYNC (OUTPUT)
POSC
2.0V
0.5V
22.5Hz TO 440Hz
22.5Hz to 440Hz
DPWM
SIGNAL
EXTERNAL
DIMMING CLOCK
ANALOG DIMMING
CONTROL VOLTAGE
EXTERNAL DIMMING CLOCK
Figure3. DPWM Source Configuration Options
BRIGHT
PSYNC (OUTPUT)
POSC
22.5Hz TO 440Hz
DPWM
SIGNAL
Figure4. The DPWM Receiver Configuration
DS3988
8-Channel Cold-Cathode
Fluorescent Lamp Controller
Configuring Systems with
Multiple DS3988s

The source and receiver options for the lamp frequency
clock and DPWM signal allow multiple DS3988s to be
synchronized in systems requiring more than 8 lamps.
The lamp and dimming clocks can either be generated
on board the DS3988 using external resistors to set the
frequency, or they can be sourced by the host system
to synchronize the DS3988 to other system resources.
Figure5 shows various multiple DS3988 configurations
that allow both lamp and/or DPWM synchronization for
all DS3988s in the system.
2.0VBRIGHT
LAMP FREQUENCY SOURCE
DPWM SOURCE
PSYNC
LSYNC
POSC
LOSC
0.5V
RESISTOR-SET
DIMMING
FREQUENCY
RESISTOR-SET
LAMP FREQUENCY
DS3988
BRIGHT
LAMP FREQUENCY RECEIVER
DPWM RECEIVER
PSYNC
LSYNC
POSC
LOSC
DS3988
2.0VBRIGHT
LAMP FREQUENCY SOURCE
DPWM SOURCE
PSYNC
LSYNC
POSC
LOSC
0.5V
ANALOG
BRIGHTNESS
ANALOG
BRIGHTNESS
RESISTOR-SET
LAMP FREQUENCY
DIMMING CLOCK
(22.5Hz TO 440Hz)
DPWM SIGNAL
(22.5Hz TO 440Hz)
DS3988
BRIGHT
LAMP FREQUENCY RECEIVER
DPWM RECEIVER
PSYNC
LSYNC
POSC
LOSC
DS3988
BRIGHT
LAMP FREQUENCY SOURCE
DPWM RECEIVER
PSYNC
LSYNC
POSC
LOSCRESISTOR-SET
LAMP FREQUENCY
DS3988
BRIGHT
LAMP FREQUENCY RECEIVER
DPWM RECEIVER
PSYNC
LSYNC
POSC
LOSC
DS3988
2.0VBRIGHT
LAMP FREQUENCY RECEIVER
DPWM SOURCE
PSYNC
LSYNC
POSC
LOSC
0.5V
RESISTOR-SET
DIMMING FREQUENCY
DS3988
BRIGHT
LAMP FREQUENCY RECEIVER
DPWM RECEIVER
PSYNC
LSYNC
POSC
LOSC
DS3988
2.0VBRIGHT
LAMP FREQUENCY RECEIVER
DPWM SOURCE
PSYNC
LSYNC
POSC
LOSC
0.5V
ANALOG
BRIGHTNESS
ANALOG
BRIGHTNESS
LAMP CLOCK
(40kHz TO 80kHz)
DIMMING CLOCK
(22.5Hz TO 440Hz)
LAMP CLOCK
(40kHz TO 80kHz)
DPWM SIGNAL
(22.5Hz TO 440Hz)
LAMP CLOCK
(40kHz TO 80kHz)
DS3988
BRIGHT
LAMP FREQUENCY RECEIVER
DPWM RECEIVER
PSYNC
LSYNC
POSC
LOSC
DS3988
BRIGHT
LAMP FREQUENCY RECEIVER
DPWM RECEIVER
PSYNC
LSYNC
POSC
LOSC
DS3988
BRIGHT
LAMP FREQUENCY RECEIVER
DPWM RECEIVER
PSYNC
LSYNC
POSC
LOSC
DS3988
Figure5. Frequency Configuration Options for Designs Using Multiple DS3988s
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